SConscript revision 13898:bef1a83c6504
1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer; 10# redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution; 13# neither the name of the copyright holders nor the names of its 14# contributors may be used to endorse or promote products derived from 15# this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Steve Reinhardt 30 31Import('*') 32 33DebugFlag('Activity') 34DebugFlag('Commit') 35DebugFlag('Context') 36DebugFlag('Decode') 37DebugFlag('DynInst') 38DebugFlag('ExecEnable', 39 'Filter: Enable exec tracing (no tracing without this)') 40DebugFlag('ExecCPSeq', 'Format: Instruction sequence number') 41DebugFlag('ExecEffAddr', 'Format: Include effective address') 42DebugFlag('ExecFaulting', 'Trace faulting instructions') 43DebugFlag('ExecFetchSeq', 'Format: Fetch sequence number') 44DebugFlag('ExecOpClass', 'Format: Include operand class') 45DebugFlag('ExecRegDelta') 46DebugFlag('ExecResult', 'Format: Include results from execution') 47DebugFlag('ExecSymbol', 'Format: Try to include symbol names') 48DebugFlag('ExecThread', 'Format: Include thread ID in trace') 49DebugFlag('ExecTicks', 'Format: Include tick count') 50DebugFlag('ExecMicro', 'Filter: Include microops') 51DebugFlag('ExecMacro', 'Filter: Include macroops') 52DebugFlag('ExecUser', 'Filter: Trace user mode instructions') 53DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions') 54DebugFlag('ExecAsid', 'Format: Include ASID in trace') 55DebugFlag('ExecFlags', 'Format: Include instruction flags in trace') 56DebugFlag('Fetch') 57DebugFlag('IntrControl') 58DebugFlag('O3PipeView') 59DebugFlag('PCEvent') 60DebugFlag('Quiesce') 61DebugFlag('Mwait') 62 63CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr', 64 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta', 65 'ExecResult', 'ExecSymbol', 'ExecThread', 66 'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel', 67 'ExecAsid', 'ExecFlags' ]) 68CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 69 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro', 70 'ExecFaulting', 'ExecUser', 'ExecKernel' ]) 71CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 72 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecMacro', 'ExecFaulting', 73 'ExecUser', 'ExecKernel' ]) 74 75if env['TARGET_ISA'] == 'null': 76 SimObject('IntrControl.py') 77 Source('intr_control_noisa.cc') 78 Return() 79 80# Only build the protocol buffer instructions tracer if we have protobuf support 81if env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86': 82 SimObject('InstPBTrace.py') 83 Source('inst_pb_trace.cc') 84 85SimObject('CheckerCPU.py') 86 87SimObject('BaseCPU.py') 88SimObject('CPUTracers.py') 89SimObject('FuncUnit.py') 90SimObject('IntrControl.py') 91SimObject('TimingExpr.py') 92 93Source('activity.cc') 94Source('base.cc') 95Source('cpuevent.cc') 96Source('exetrace.cc') 97Source('exec_context.cc') 98Source('func_unit.cc') 99Source('inteltrace.cc') 100Source('intr_control.cc') 101Source('nativetrace.cc') 102Source('pc_event.cc') 103Source('profile.cc') 104Source('quiesce_event.cc') 105Source('reg_class.cc') 106Source('static_inst.cc') 107Source('simple_thread.cc') 108Source('thread_context.cc') 109Source('thread_state.cc') 110Source('timing_expr.cc') 111 112SimObject('DummyChecker.py') 113SimObject('StaticInstFlags.py') 114Source('checker/cpu.cc') 115Source('dummy_checker.cc') 116DebugFlag('Checker') 117