SConscript revision 11162:63d53fd63269
110816SN/A# -*- mode:python -*- 29288SN/A 39288SN/A# Copyright (c) 2006 The Regents of The University of Michigan 49288SN/A# All rights reserved. 59288SN/A# 69288SN/A# Redistribution and use in source and binary forms, with or without 79288SN/A# modification, are permitted provided that the following conditions are 89288SN/A# met: redistributions of source code must retain the above copyright 99288SN/A# notice, this list of conditions and the following disclaimer; 109288SN/A# redistributions in binary form must reproduce the above copyright 119288SN/A# notice, this list of conditions and the following disclaimer in the 129288SN/A# documentation and/or other materials provided with the distribution; 134486SN/A# neither the name of the copyright holders nor the names of its 144486SN/A# contributors may be used to endorse or promote products derived from 154486SN/A# this software without specific prior written permission. 164486SN/A# 174486SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 184486SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 194486SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 204486SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 214486SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 224486SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 234486SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 244486SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 254486SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 264486SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 274486SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 284486SN/A# 294486SN/A# Authors: Steve Reinhardt 304486SN/A 314486SN/AImport('*') 324486SN/A 334486SN/Aif env['TARGET_ISA'] == 'null': 344486SN/A SimObject('IntrControl.py') 354486SN/A Source('intr_control_noisa.cc') 364486SN/A Return() 374486SN/A 384486SN/A# Only build the protocol buffer instructions tracer if we have protobuf support 394486SN/Aif env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86': 4011053Sandreas.hansson@arm.com SimObject('InstPBTrace.py') 414486SN/A Source('inst_pb_trace.cc') 423102SN/A 438833SN/ASimObject('CheckerCPU.py') 442826SN/A 458831SN/ASimObject('BaseCPU.py') 469796SN/ASimObject('CPUTracers.py') 471615SN/ASimObject('FuncUnit.py') 482826SN/ASimObject('IntrControl.py') 491366SN/ASimObject('TimingExpr.py') 5011053Sandreas.hansson@arm.com 519338SN/ASource('activity.cc') 5210816SN/ASource('base.cc') 5310816SN/ASource('cpuevent.cc') 5410816SN/ASource('exetrace.cc') 5510816SN/ASource('exec_context.cc') 5610816SN/ASource('func_unit.cc') 5710816SN/ASource('inteltrace.cc') 5810816SN/ASource('intr_control.cc') 591310SN/ASource('nativetrace.cc') 6010816SN/ASource('pc_event.cc') 6110816SN/ASource('profile.cc') 6210816SN/ASource('quiesce_event.cc') 6310816SN/ASource('reg_class.cc') 6410816SN/ASource('static_inst.cc') 6510816SN/ASource('simple_thread.cc') 6610816SN/ASource('thread_context.cc') 676122SN/ASource('thread_state.cc') 6810816SN/ASource('timing_expr.cc') 6910884SN/A 7010816SN/ASimObject('DummyChecker.py') 7110816SN/ASimObject('StaticInstFlags.py') 725875SN/ASource('checker/cpu.cc') 7310816SN/ASource('dummy_checker.cc') 7410816SN/ADebugFlag('Checker') 7510816SN/A 7610025SN/ADebugFlag('Activity') 7710025SN/ADebugFlag('Commit') 7810816SN/ADebugFlag('Context') 7910816SN/ADebugFlag('Decode') 8010816SN/ADebugFlag('DynInst') 8110816SN/ADebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)') 8210816SN/ADebugFlag('ExecCPSeq', 'Format: Instruction sequence number') 8310816SN/ADebugFlag('ExecEffAddr', 'Format: Include effective address') 8410816SN/ADebugFlag('ExecFaulting', 'Trace faulting instructions') 8510816SN/ADebugFlag('ExecFetchSeq', 'Format: Fetch sequence number') 8611053Sandreas.hansson@arm.comDebugFlag('ExecOpClass', 'Format: Include operand class') 8711197Sandreas.hansson@arm.comDebugFlag('ExecRegDelta') 8811197Sandreas.hansson@arm.comDebugFlag('ExecResult', 'Format: Include results from execution') 8911197Sandreas.hansson@arm.comDebugFlag('ExecSymbol', 'Format: Try to include symbol names') 9011197Sandreas.hansson@arm.comDebugFlag('ExecThread', 'Format: Include thread ID in trace') 9111053Sandreas.hansson@arm.comDebugFlag('ExecTicks', 'Format: Include tick count') 9211053Sandreas.hansson@arm.comDebugFlag('ExecMicro', 'Filter: Include microops') 9311053Sandreas.hansson@arm.comDebugFlag('ExecMacro', 'Filter: Include macroops') 9411197Sandreas.hansson@arm.comDebugFlag('ExecUser', 'Filter: Trace user mode instructions') 9511197Sandreas.hansson@arm.comDebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions') 9611197Sandreas.hansson@arm.comDebugFlag('ExecAsid', 'Format: Include ASID in trace') 9711197Sandreas.hansson@arm.comDebugFlag('ExecFlags', 'Format: Include instruction flags in trace') 9811197Sandreas.hansson@arm.comDebugFlag('Fetch') 9911197Sandreas.hansson@arm.comDebugFlag('IntrControl') 10011197Sandreas.hansson@arm.comDebugFlag('O3PipeView') 10111197Sandreas.hansson@arm.comDebugFlag('PCEvent') 10211197Sandreas.hansson@arm.comDebugFlag('Quiesce') 10311197Sandreas.hansson@arm.comDebugFlag('Mwait') 10411197Sandreas.hansson@arm.com 10511197Sandreas.hansson@arm.comCompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr', 10611199Sandreas.hansson@arm.com 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta', 10711199Sandreas.hansson@arm.com 'ExecResult', 'ExecSymbol', 'ExecThread', 10811199Sandreas.hansson@arm.com 'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel', 10911199Sandreas.hansson@arm.com 'ExecAsid', 'ExecFlags' ]) 11011199Sandreas.hansson@arm.comCompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 11111199Sandreas.hansson@arm.com 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro', 11211199Sandreas.hansson@arm.com 'ExecFaulting', 'ExecUser', 'ExecKernel' ]) 11311199Sandreas.hansson@arm.comCompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 114 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecMacro', 'ExecFaulting', 115 'ExecUser', 'ExecKernel' ]) 116