SConscript revision 6365
112855Sgabeblack@google.com# -*- mode:python -*-
212855Sgabeblack@google.com
312855Sgabeblack@google.com# Copyright (c) 2006 The Regents of The University of Michigan
412855Sgabeblack@google.com# All rights reserved.
512855Sgabeblack@google.com#
612855Sgabeblack@google.com# Redistribution and use in source and binary forms, with or without
712855Sgabeblack@google.com# modification, are permitted provided that the following conditions are
812855Sgabeblack@google.com# met: redistributions of source code must retain the above copyright
912855Sgabeblack@google.com# notice, this list of conditions and the following disclaimer;
1012855Sgabeblack@google.com# redistributions in binary form must reproduce the above copyright
1112855Sgabeblack@google.com# notice, this list of conditions and the following disclaimer in the
1212855Sgabeblack@google.com# documentation and/or other materials provided with the distribution;
1312855Sgabeblack@google.com# neither the name of the copyright holders nor the names of its
1412855Sgabeblack@google.com# contributors may be used to endorse or promote products derived from
1512855Sgabeblack@google.com# this software without specific prior written permission.
1612855Sgabeblack@google.com#
1712855Sgabeblack@google.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1812855Sgabeblack@google.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1912855Sgabeblack@google.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2012855Sgabeblack@google.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2112855Sgabeblack@google.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2212855Sgabeblack@google.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2312855Sgabeblack@google.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2412855Sgabeblack@google.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2512855Sgabeblack@google.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2612855Sgabeblack@google.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2712855Sgabeblack@google.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2812855Sgabeblack@google.com#
2912855Sgabeblack@google.com# Authors: Steve Reinhardt
3012855Sgabeblack@google.com
3112855Sgabeblack@google.comImport('*')
3212855Sgabeblack@google.com
3312855Sgabeblack@google.com#################################################################
3412855Sgabeblack@google.com#
3512855Sgabeblack@google.com# Generate StaticInst execute() method signatures.
3612855Sgabeblack@google.com#
3712855Sgabeblack@google.com# There must be one signature for each CPU model compiled in.
3812855Sgabeblack@google.com# Since the set of compiled-in models is flexible, we generate a
3912855Sgabeblack@google.com# header containing the appropriate set of signatures on the fly.
4012855Sgabeblack@google.com#
4112855Sgabeblack@google.com#################################################################
4212855Sgabeblack@google.com
4312855Sgabeblack@google.com# CPU model-specific data is contained in cpu_models.py
4412855Sgabeblack@google.com# Convert to SCons File node to get path handling
4512855Sgabeblack@google.commodels_db = File('cpu_models.py')
4612855Sgabeblack@google.com# slurp in contents of file
4712855Sgabeblack@google.comexecfile(models_db.srcnode().abspath)
4812855Sgabeblack@google.com
4912855Sgabeblack@google.com# Template for execute() signature.
5012855Sgabeblack@google.comexec_sig_template = '''
5112855Sgabeblack@google.comvirtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
5212855Sgabeblack@google.comvirtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
5312855Sgabeblack@google.com{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
5412855Sgabeblack@google.comvirtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
5512855Sgabeblack@google.com{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
5612855Sgabeblack@google.comvirtual Fault completeAcc(Packet *pkt, %(type)s *xc,
5712855Sgabeblack@google.com                          Trace::InstRecord *traceData) const
5812855Sgabeblack@google.com{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
5912855Sgabeblack@google.com'''
6012855Sgabeblack@google.com
6112855Sgabeblack@google.commem_ini_sig_template = '''
6212855Sgabeblack@google.comvirtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
6312855Sgabeblack@google.com{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
6412855Sgabeblack@google.comvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
6512855Sgabeblack@google.com'''
6612855Sgabeblack@google.com
6712855Sgabeblack@google.commem_comp_sig_template = '''
6812855Sgabeblack@google.comvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
6912855Sgabeblack@google.com'''
7012855Sgabeblack@google.com
7112855Sgabeblack@google.com# Generate a temporary CPU list, including the CheckerCPU if
7212855Sgabeblack@google.com# it's enabled.  This isn't used for anything else other than StaticInst
7312855Sgabeblack@google.com# headers.
7412855Sgabeblack@google.comtemp_cpu_list = env['CPU_MODELS'][:]
7512855Sgabeblack@google.com
7612855Sgabeblack@google.comif env['USE_CHECKER']:
7712855Sgabeblack@google.com    temp_cpu_list.append('CheckerCPU')
78    SimObject('CheckerCPU.py')
79
80# Generate header.
81def gen_cpu_exec_signatures(target, source, env):
82    f = open(str(target[0]), 'w')
83    print >> f, '''
84#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
85#define __CPU_STATIC_INST_EXEC_SIGS_HH__
86'''
87    for cpu in temp_cpu_list:
88        xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
89        print >> f, exec_sig_template % { 'type' : xc_type }
90    print >> f, '''
91#endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
92'''
93
94# Generate string that gets printed when header is rebuilt
95def gen_sigs_string(target, source, env):
96    return "Generating static_inst_exec_sigs.hh: " \
97           + ', '.join(temp_cpu_list)
98
99# Add command to generate header to environment.
100env.Command('static_inst_exec_sigs.hh', models_db,
101            Action(gen_cpu_exec_signatures, gen_sigs_string,
102                   varlist = temp_cpu_list))
103
104env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
105env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
106
107# List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
108# and one of these are not being used.
109CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
110
111SimObject('BaseCPU.py')
112SimObject('FuncUnit.py')
113SimObject('ExeTracer.py')
114SimObject('IntelTrace.py')
115SimObject('NativeTrace.py')
116
117Source('activity.cc')
118Source('base.cc')
119Source('cpuevent.cc')
120Source('exetrace.cc')
121Source('func_unit.cc')
122Source('inteltrace.cc')
123Source('nativetrace.cc')
124Source('pc_event.cc')
125Source('quiesce_event.cc')
126Source('static_inst.cc')
127Source('simple_thread.cc')
128Source('thread_context.cc')
129Source('thread_state.cc')
130
131if env['FULL_SYSTEM']:
132    SimObject('IntrControl.py')
133
134    Source('intr_control.cc')
135    Source('profile.cc')
136
137    if env['TARGET_ISA'] == 'sparc':
138        SimObject('LegionTrace.py')
139        Source('legiontrace.cc')
140
141if env['USE_CHECKER']:
142    Source('checker/cpu.cc')
143    TraceFlag('Checker')
144    checker_supports = False
145    for i in CheckerSupportedCPUList:
146        if i in env['CPU_MODELS']:
147            checker_supports = True
148    if not checker_supports:
149        print "Checker only supports CPU models",
150        for i in CheckerSupportedCPUList:
151            print i,
152        print ", please set USE_CHECKER=False or use one of those CPU models"
153        Exit(1)
154
155TraceFlag('Activity')
156TraceFlag('Commit')
157TraceFlag('Context')
158TraceFlag('Decode')
159TraceFlag('DynInst')
160TraceFlag('ExecEnable')
161TraceFlag('ExecCPSeq')
162TraceFlag('ExecEffAddr')
163TraceFlag('ExecFetchSeq')
164TraceFlag('ExecOpClass')
165TraceFlag('ExecRegDelta')
166TraceFlag('ExecResult')
167TraceFlag('ExecSpeculative')
168TraceFlag('ExecSymbol')
169TraceFlag('ExecThread')
170TraceFlag('ExecTicks')
171TraceFlag('ExecMicro')
172TraceFlag('ExecMacro')
173TraceFlag('Fetch')
174TraceFlag('IntrControl')
175TraceFlag('PCEvent')
176TraceFlag('Quiesce')
177
178CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
179    'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ])
180CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
181    'ExecEffAddr', 'ExecResult', 'ExecMicro' ])
182