SConscript revision 4494
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Steve Reinhardt
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
335628Sgblack@eecs.umich.edu#################################################################
344486Sbinkertn@umich.edu#
354486Sbinkertn@umich.edu# Generate StaticInst execute() method signatures.
364776Sgblack@eecs.umich.edu#
374486Sbinkertn@umich.edu# There must be one signature for each CPU model compiled in.
384202Sbinkertn@umich.edu# Since the set of compiled-in models is flexible, we generate a
395474Snate@binkert.org# header containing the appropriate set of signatures on the fly.
404202Sbinkertn@umich.edu#
414202Sbinkertn@umich.edu#################################################################
424202Sbinkertn@umich.edu
434202Sbinkertn@umich.edu# CPU model-specific data is contained in cpu_models.py
445522Snate@binkert.org# Convert to SCons File node to get path handling
455522Snate@binkert.orgmodels_db = File('cpu_models.py')
465780Ssteve.reinhardt@amd.com# slurp in contents of file
474202Sbinkertn@umich.eduexecfile(models_db.srcnode().abspath)
484202Sbinkertn@umich.edu
494202Sbinkertn@umich.edu# Template for execute() signature.
504202Sbinkertn@umich.eduexec_sig_template = '''
514202Sbinkertn@umich.eduvirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
524202Sbinkertn@umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
534202Sbinkertn@umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
544202Sbinkertn@umich.eduvirtual Fault completeAcc(Packet *pkt, %s *xc,
554202Sbinkertn@umich.edu                          Trace::InstRecord *traceData) const
564202Sbinkertn@umich.edu{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
574826Ssaidi@eecs.umich.edu'''
584202Sbinkertn@umich.edu
595016Sgblack@eecs.umich.edumem_ini_sig_template = '''
604486Sbinkertn@umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
614486Sbinkertn@umich.edu'''
624202Sbinkertn@umich.edu
634202Sbinkertn@umich.edumem_comp_sig_template = '''
645192Ssaidi@eecs.umich.eduvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
655192Ssaidi@eecs.umich.edu'''
665192Ssaidi@eecs.umich.edu
675192Ssaidi@eecs.umich.edu# Generate a temporary CPU list, including the CheckerCPU if
685192Ssaidi@eecs.umich.edu# it's enabled.  This isn't used for anything else other than StaticInst
695192Ssaidi@eecs.umich.edu# headers.
705192Ssaidi@eecs.umich.edutemp_cpu_list = env['CPU_MODELS'][:]
715192Ssaidi@eecs.umich.edu
725192Ssaidi@eecs.umich.eduif env['USE_CHECKER']:
735192Ssaidi@eecs.umich.edu    temp_cpu_list.append('CheckerCPU')
745192Ssaidi@eecs.umich.edu
755192Ssaidi@eecs.umich.edu# Generate header.  
765192Ssaidi@eecs.umich.edudef gen_cpu_exec_signatures(target, source, env):
775192Ssaidi@eecs.umich.edu    f = open(str(target[0]), 'w')
785192Ssaidi@eecs.umich.edu    print >> f, '''
79#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
80#define __CPU_STATIC_INST_EXEC_SIGS_HH__
81'''
82    for cpu in temp_cpu_list:
83        xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
84        print >> f, exec_sig_template % (xc_type, xc_type, xc_type)
85    print >> f, '''
86#endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
87'''
88
89# Generate string that gets printed when header is rebuilt
90def gen_sigs_string(target, source, env):
91    return "Generating static_inst_exec_sigs.hh: " \
92           + ', '.join(temp_cpu_list)
93
94# Add command to generate header to environment.
95env.Command('static_inst_exec_sigs.hh', models_db,
96            Action(gen_cpu_exec_signatures, gen_sigs_string,
97                   varlist = temp_cpu_list))
98
99env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
101
102# List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
103# and one of these are not being used.
104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
105
106SimObject('BaseCPU.py')
107SimObject('FuncUnit.py')
108
109Source('activity.cc')
110Source('base.cc')
111Source('cpuevent.cc')
112Source('exetrace.cc')
113Source('func_unit.cc')
114Source('op_class.cc')
115Source('pc_event.cc')
116Source('quiesce_event.cc')
117Source('static_inst.cc')
118Source('simple_thread.cc')
119Source('thread_state.cc')
120
121if env['FULL_SYSTEM']:
122    SimObject('IntrControl.py')
123
124    Source('intr_control.cc')
125    Source('profile.cc')
126
127if env['USE_CHECKER']:
128    Source('checker/cpu.cc')
129    checker_supports = False
130    for i in CheckerSupportedCPUList:
131        if i in env['CPU_MODELS']:
132            checker_supports = True
133    if not checker_supports:
134        print "Checker only supports CPU models",
135        for i in CheckerSupportedCPUList:
136            print i,
137        print ", please set USE_CHECKER=False or use one of those CPU models"
138        Exit(1)
139