SConscript revision 4240
12086SN/A# -*- mode:python -*- 22086SN/A 35268Sksewell@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan 42086SN/A# All rights reserved. 52086SN/A# 62086SN/A# Redistribution and use in source and binary forms, with or without 72086SN/A# modification, are permitted provided that the following conditions are 82086SN/A# met: redistributions of source code must retain the above copyright 92086SN/A# notice, this list of conditions and the following disclaimer; 102086SN/A# redistributions in binary form must reproduce the above copyright 112086SN/A# notice, this list of conditions and the following disclaimer in the 122086SN/A# documentation and/or other materials provided with the distribution; 132086SN/A# neither the name of the copyright holders nor the names of its 142086SN/A# contributors may be used to endorse or promote products derived from 152086SN/A# this software without specific prior written permission. 162086SN/A# 172086SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182086SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192086SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202086SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212086SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222086SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232086SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242086SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252086SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262086SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272086SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt 302665Ssaidi@eecs.umich.edu 312686Sksewell@umich.eduImport('*') 322086SN/A 334202Sbinkertn@umich.edu################################################################# 342086SN/A# 354202Sbinkertn@umich.edu# Generate StaticInst execute() method signatures. 364202Sbinkertn@umich.edu# 376313Sgblack@eecs.umich.edu# There must be one signature for each CPU model compiled in. 384997Sgblack@eecs.umich.edu# Since the set of compiled-in models is flexible, we generate a 395222Sksewell@umich.edu# header containing the appropriate set of signatures on the fly. 404202Sbinkertn@umich.edu# 415222Sksewell@umich.edu################################################################# 424997Sgblack@eecs.umich.edu 434997Sgblack@eecs.umich.edu# CPU model-specific data is contained in cpu_models.py 445192Ssaidi@eecs.umich.edu# Convert to SCons File node to get path handling 455192Ssaidi@eecs.umich.edumodels_db = File('cpu_models.py') 464202Sbinkertn@umich.edu# slurp in contents of file 477799Sgblack@eecs.umich.eduexecfile(models_db.srcnode().abspath) 487799Sgblack@eecs.umich.edu 495222Sksewell@umich.edu# Template for execute() signature. 505222Sksewell@umich.eduexec_sig_template = ''' 515222Sksewell@umich.eduvirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; 525222Sksewell@umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const 535222Sksewell@umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 545222Sksewell@umich.eduvirtual Fault completeAcc(Packet *pkt, %s *xc, 557799Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 565222Sksewell@umich.edu{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 574202Sbinkertn@umich.edu''' 584202Sbinkertn@umich.edu 594202Sbinkertn@umich.edumem_ini_sig_template = ''' 604202Sbinkertn@umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 612086SN/A''' 624202Sbinkertn@umich.edu 634202Sbinkertn@umich.edumem_comp_sig_template = ''' 644202Sbinkertn@umich.eduvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 654202Sbinkertn@umich.edu''' 664202Sbinkertn@umich.edu 674202Sbinkertn@umich.edu# Generate a temporary CPU list, including the CheckerCPU if 68# it's enabled. This isn't used for anything else other than StaticInst 69# headers. 70temp_cpu_list = env['CPU_MODELS'][:] 71 72if env['USE_CHECKER']: 73 temp_cpu_list.append('CheckerCPU') 74 75# Generate header. 76def gen_cpu_exec_signatures(target, source, env): 77 f = open(str(target[0]), 'w') 78 print >> f, ''' 79#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 80#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 81''' 82 for cpu in temp_cpu_list: 83 xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 84 print >> f, exec_sig_template % (xc_type, xc_type, xc_type) 85 print >> f, ''' 86#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 87''' 88 89# Generate string that gets printed when header is rebuilt 90def gen_sigs_string(target, source, env): 91 return "Generating static_inst_exec_sigs.hh: " \ 92 + ', '.join(temp_cpu_list) 93 94# Add command to generate header to environment. 95env.Command('static_inst_exec_sigs.hh', models_db, 96 Action(gen_cpu_exec_signatures, gen_sigs_string, 97 varlist = temp_cpu_list)) 98 99env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 101 102# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 103# and one of these are not being used. 104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 105 106Source('activity.cc') 107Source('base.cc') 108Source('cpuevent.cc') 109Source('exetrace.cc') 110Source('func_unit.cc') 111Source('op_class.cc') 112Source('pc_event.cc') 113Source('quiesce_event.cc') 114Source('static_inst.cc') 115Source('simple_thread.cc') 116Source('thread_state.cc') 117 118if env['FULL_SYSTEM']: 119 Source('intr_control.cc') 120 Source('profile.cc') 121 122if env['USE_CHECKER']: 123 Source('checker/cpu.cc') 124 checker_supports = False 125 for i in CheckerSupportedCPUList: 126 if i in env['CPU_MODELS']: 127 checker_supports = True 128 if not checker_supports: 129 print "Checker only supports CPU models", 130 for i in CheckerSupportedCPUList: 131 print i, 132 print ", please set USE_CHECKER=False or use one of those CPU models" 133 Exit(1) 134