SConscript revision 12109
12155SN/A# -*- mode:python -*- 22155SN/A 32155SN/A# Copyright (c) 2006 The Regents of The University of Michigan 42155SN/A# All rights reserved. 52155SN/A# 62155SN/A# Redistribution and use in source and binary forms, with or without 72155SN/A# modification, are permitted provided that the following conditions are 82155SN/A# met: redistributions of source code must retain the above copyright 92155SN/A# notice, this list of conditions and the following disclaimer; 102155SN/A# redistributions in binary form must reproduce the above copyright 112155SN/A# notice, this list of conditions and the following disclaimer in the 122155SN/A# documentation and/or other materials provided with the distribution; 132155SN/A# neither the name of the copyright holders nor the names of its 142155SN/A# contributors may be used to endorse or promote products derived from 152155SN/A# this software without specific prior written permission. 162155SN/A# 172155SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182155SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192155SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202155SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212155SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222155SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232155SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242155SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252155SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262155SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272155SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt 302155SN/A 312155SN/AImport('*') 322155SN/A 332155SN/Aif env['TARGET_ISA'] == 'null': 342155SN/A SimObject('IntrControl.py') 352155SN/A Source('intr_control_noisa.cc') 362155SN/A Return() 372178SN/A 382178SN/A# Only build the protocol buffer instructions tracer if we have protobuf support 392178SN/Aif env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86': 402178SN/A SimObject('InstPBTrace.py') 412178SN/A Source('inst_pb_trace.cc') 422178SN/A 432178SN/ASimObject('CheckerCPU.py') 442178SN/A 452178SN/ASimObject('BaseCPU.py') 462178SN/ASimObject('CPUTracers.py') 472178SN/ASimObject('FuncUnit.py') 482178SN/ASimObject('IntrControl.py') 492155SN/ASimObject('TimingExpr.py') 502178SN/A 512155SN/ASource('activity.cc') 522155SN/ASource('base.cc') 532178SN/ASource('cpuevent.cc') 542155SN/ASource('exetrace.cc') 552155SN/ASource('exec_context.cc') 562623SN/ASource('func_unit.cc') 572623SN/ASource('inteltrace.cc') 582623SN/ASource('intr_control.cc') 592623SN/ASource('nativetrace.cc') 602623SN/ASource('pc_event.cc') 612155SN/ASource('profile.cc') 622155SN/ASource('quiesce_event.cc') 632292SN/ASource('reg_class.cc') 642292SN/ASource('static_inst.cc') 652292SN/ASource('simple_thread.cc') 662292SN/ASource('thread_context.cc') 672292SN/ASource('thread_state.cc') 682292SN/ASource('timing_expr.cc') 692292SN/A 702292SN/ASimObject('DummyChecker.py') 712766Sktlim@umich.eduSimObject('StaticInstFlags.py') 722766Sktlim@umich.eduSource('checker/cpu.cc') 732766Sktlim@umich.eduSource('dummy_checker.cc') 742921Sktlim@umich.eduDebugFlag('Checker') 752921Sktlim@umich.edu 762766Sktlim@umich.eduDebugFlag('Activity') 772766Sktlim@umich.eduDebugFlag('Commit') 782766Sktlim@umich.eduDebugFlag('Context') 792178SN/ADebugFlag('Decode') 802155SN/ADebugFlag('DynInst') 812155SN/ADebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)') 822155SN/ADebugFlag('ExecCPSeq', 'Format: Instruction sequence number') 832155SN/ADebugFlag('ExecEffAddr', 'Format: Include effective address') 842155SN/ADebugFlag('ExecFaulting', 'Trace faulting instructions') 852155SN/ADebugFlag('ExecFetchSeq', 'Format: Fetch sequence number') 862766Sktlim@umich.eduDebugFlag('ExecOpClass', 'Format: Include operand class') 872155SN/ADebugFlag('ExecRegDelta') 882623SN/ADebugFlag('ExecResult', 'Format: Include results from execution') 892155SN/ADebugFlag('ExecSymbol', 'Format: Try to include symbol names') 902155SN/ADebugFlag('ExecThread', 'Format: Include thread ID in trace') 912155SN/ADebugFlag('ExecTicks', 'Format: Include tick count') 922155SN/ADebugFlag('ExecMicro', 'Filter: Include microops') 932178SN/ADebugFlag('ExecMacro', 'Filter: Include macroops') 942178SN/ADebugFlag('ExecUser', 'Filter: Trace user mode instructions') 952178SN/ADebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions') 962766Sktlim@umich.eduDebugFlag('ExecAsid', 'Format: Include ASID in trace') 972178SN/ADebugFlag('ExecFlags', 'Format: Include instruction flags in trace') 982178SN/ADebugFlag('Fetch') 992178SN/ADebugFlag('IntrControl') 1002178SN/ADebugFlag('O3PipeView') 1012766Sktlim@umich.eduDebugFlag('PCEvent') 1022766Sktlim@umich.eduDebugFlag('Quiesce') 1032766Sktlim@umich.eduDebugFlag('Mwait') 1042788Sktlim@umich.edu 1052178SN/ACompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr', 1062733Sktlim@umich.edu 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta', 1072733Sktlim@umich.edu 'ExecResult', 'ExecSymbol', 'ExecThread', 1082817Sksewell@umich.edu 'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel', 1092733Sktlim@umich.edu 'ExecAsid', 'ExecFlags' ]) 1102178SN/ACompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 1112178SN/A 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro', 1122178SN/A 'ExecFaulting', 'ExecUser', 'ExecKernel' ]) 1132178SN/ACompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 1142178SN/A 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecMacro', 'ExecFaulting', 1152178SN/A 'ExecUser', 'ExecKernel' ]) 1162155SN/A