SConscript revision 11765
12139SN/A# -*- mode:python -*-
22139SN/A
32139SN/A# Copyright (c) 2006 The Regents of The University of Michigan
42139SN/A# All rights reserved.
52139SN/A#
62139SN/A# Redistribution and use in source and binary forms, with or without
72139SN/A# modification, are permitted provided that the following conditions are
82139SN/A# met: redistributions of source code must retain the above copyright
92139SN/A# notice, this list of conditions and the following disclaimer;
102139SN/A# redistributions in binary form must reproduce the above copyright
112139SN/A# notice, this list of conditions and the following disclaimer in the
122139SN/A# documentation and/or other materials provided with the distribution;
132139SN/A# neither the name of the copyright holders nor the names of its
142139SN/A# contributors may be used to endorse or promote products derived from
152139SN/A# this software without specific prior written permission.
162139SN/A#
172139SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182139SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192139SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202139SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212139SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222139SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232139SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242139SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252139SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262139SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272139SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu#
292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt
302139SN/A
312139SN/AImport('*')
322139SN/A
332139SN/Aif env['TARGET_ISA'] == 'null':
342139SN/A    SimObject('IntrControl.py')
352139SN/A    Source('intr_control_noisa.cc')
362152SN/A    Return()
372152SN/A
382152SN/A# Only build the protocol buffer instructions tracer if we have protobuf support
392152SN/Aif env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86':
402139SN/A    SimObject('InstPBTrace.py')
412139SN/A    Source('inst_pb_trace.cc')
422139SN/A
432139SN/ASimObject('CheckerCPU.py')
442139SN/A
452152SN/ASimObject('BaseCPU.py')
462152SN/ASimObject('CPUTracers.py')
472139SN/ASimObject('FuncUnit.py')
482139SN/ASimObject('IntrControl.py')
492139SN/ASimObject('TimingExpr.py')
502439SN/A
512439SN/ASource('activity.cc')
522439SN/ASource('base.cc')
532139SN/ASource('cpuevent.cc')
542439SN/ASource('exetrace.cc')
552460SN/ASource('exec_context.cc')
562439SN/ASource('func_unit.cc')
572171SN/ASource('inteltrace.cc')
582439SN/ASource('intr_control.cc')
592439SN/ASource('nativetrace.cc')
602170SN/ASource('pc_event.cc')
612139SN/ASource('profile.cc')
622139SN/ASource('quiesce_event.cc')
632139SN/ASource('reg_class.cc')
642139SN/ASource('static_inst.cc')
652139SN/ASource('simple_thread.cc')
662139SN/ASource('thread_context.cc')
672139SN/ASource('thread_state.cc')
682139SN/ASource('timing_expr.cc')
692139SN/A
702139SN/ASimObject('DummyChecker.py')
712139SN/ASimObject('StaticInstFlags.py')
722139SN/ASource('checker/cpu.cc')
732139SN/ASource('dummy_checker.cc')
742139SN/ADebugFlag('Checker')
752139SN/A
762139SN/ADebugFlag('Activity')
772139SN/ADebugFlag('Commit')
782139SN/ADebugFlag('Context')
792139SN/ADebugFlag('Decode')
802139SN/ADebugFlag('DynInst')
812139SN/ADebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)')
822139SN/ADebugFlag('ExecCPSeq', 'Format: Instruction sequence number')
832139SN/ADebugFlag('ExecEffAddr', 'Format: Include effective address')
842139SN/ADebugFlag('ExecFaulting', 'Trace faulting instructions')
852178SN/ADebugFlag('ExecFetchSeq', 'Format: Fetch sequence number')
862139SN/ADebugFlag('ExecOpClass', 'Format: Include operand class')
872139SN/ADebugFlag('ExecRegDelta')
882139SN/ADebugFlag('ExecResult', 'Format: Include results from execution')
892139SN/ADebugFlag('ExecSymbol', 'Format: Try to include symbol names')
902139SN/ADebugFlag('ExecThread', 'Format: Include thread ID in trace')
912139SN/ADebugFlag('ExecTicks', 'Format: Include tick count')
922139SN/ADebugFlag('ExecMicro', 'Filter: Include microops')
932152SN/ADebugFlag('ExecMacro', 'Filter: Include macroops')
942152SN/ADebugFlag('ExecUser', 'Filter: Trace user mode instructions')
952152SN/ADebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
962152SN/ADebugFlag('ExecAsid', 'Format: Include ASID in trace')
972152SN/ADebugFlag('ExecFlags', 'Format: Include instruction flags in trace')
982152SN/ADebugFlag('Fetch')
992152SN/ADebugFlag('IntrControl')
1002152SN/ADebugFlag('O3PipeView')
1012152SN/ADebugFlag('PCEvent')
1022152SN/ADebugFlag('Quiesce')
1032152SN/ADebugFlag('Mwait')
1042152SN/A
1052504SN/ACompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
1062504SN/A    'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
1072504SN/A    'ExecResult', 'ExecSymbol', 'ExecThread',
1082504SN/A    'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel',
1092152SN/A    'ExecAsid', 'ExecFlags' ])
1102504SN/ACompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
1112152SN/A    'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro',
1122152SN/A    'ExecFaulting', 'ExecUser', 'ExecKernel' ])
1132152SN/ACompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
1142152SN/A    'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecMacro', 'ExecFaulting',
1152152SN/A    'ExecUser', 'ExecKernel' ])
1162152SN/A