SConscript revision 11696 
12086SN/A# -*- mode:python -*-
22086SN/A
35268Sksewell@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
42086SN/A# All rights reserved.
52086SN/A#
62086SN/A# Redistribution and use in source and binary forms, with or without
72086SN/A# modification, are permitted provided that the following conditions are
82086SN/A# met: redistributions of source code must retain the above copyright
92086SN/A# notice, this list of conditions and the following disclaimer;
102086SN/A# redistributions in binary form must reproduce the above copyright
112086SN/A# notice, this list of conditions and the following disclaimer in the
122086SN/A# documentation and/or other materials provided with the distribution;
132086SN/A# neither the name of the copyright holders nor the names of its
142086SN/A# contributors may be used to endorse or promote products derived from
152086SN/A# this software without specific prior written permission.
162086SN/A#
172086SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182086SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192086SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202086SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212086SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222086SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232086SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242086SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252086SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262086SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272086SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu#
292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt
302665Ssaidi@eecs.umich.edu
312686Sksewell@umich.eduImport('*')
322086SN/A
334202Sbinkertn@umich.eduif env['TARGET_ISA'] == 'null':
342086SN/A    SimObject('IntrControl.py')
354202Sbinkertn@umich.edu    Source('intr_control_noisa.cc')
368775Sgblack@eecs.umich.edu    Return()
379022Sgblack@eecs.umich.edu
388758Sgblack@eecs.umich.edu# Only build the protocol buffer instructions tracer if we have protobuf support
394202Sbinkertn@umich.eduif env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86':
408775Sgblack@eecs.umich.edu    SimObject('InstPBTrace.py')
418745Sgblack@eecs.umich.edu    Source('inst_pb_trace.cc')
426313Sgblack@eecs.umich.edu
438775Sgblack@eecs.umich.eduSimObject('CheckerCPU.py')
448775Sgblack@eecs.umich.edu
458775Sgblack@eecs.umich.eduSimObject('BaseCPU.py')
468758Sgblack@eecs.umich.eduSimObject('CPUTracers.py')
478775Sgblack@eecs.umich.eduSimObject('FuncUnit.py')
488758Sgblack@eecs.umich.eduSimObject('IntrControl.py')
498775Sgblack@eecs.umich.eduSimObject('TimingExpr.py')
508775Sgblack@eecs.umich.edu
514997Sgblack@eecs.umich.eduSource('activity.cc')
524202Sbinkertn@umich.eduSource('base.cc')
538758Sgblack@eecs.umich.eduSource('cpuevent.cc')
544997Sgblack@eecs.umich.eduSource('exetrace.cc')
558745Sgblack@eecs.umich.eduSource('exec_context.cc')
569384SAndreas.Sandberg@arm.comSource('func_unit.cc')
578775Sgblack@eecs.umich.eduSource('inteltrace.cc')
584997Sgblack@eecs.umich.eduSource('intr_control.cc')
595192Ssaidi@eecs.umich.eduSource('nativetrace.cc')
608775Sgblack@eecs.umich.eduSource('pc_event.cc')
612086SN/ASource('profile.cc')
6210196SCurtis.Dunham@arm.comSource('quiesce_event.cc')
63Source('reg_class.cc')
64Source('static_inst.cc')
65Source('simple_thread.cc')
66Source('thread_context.cc')
67Source('thread_state.cc')
68Source('timing_expr.cc')
69
70SimObject('DummyChecker.py')
71SimObject('StaticInstFlags.py')
72Source('checker/cpu.cc')
73Source('dummy_checker.cc')
74DebugFlag('Checker')
75
76DebugFlag('Activity')
77DebugFlag('Commit')
78DebugFlag('Context')
79DebugFlag('Decode')
80DebugFlag('DynInst')
81DebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)')
82DebugFlag('ExecCPSeq', 'Format: Instruction sequence number')
83DebugFlag('ExecEffAddr', 'Format: Include effective address')
84DebugFlag('ExecFaulting', 'Trace faulting instructions')
85DebugFlag('ExecFetchSeq', 'Format: Fetch sequence number')
86DebugFlag('ExecOpClass', 'Format: Include operand class')
87DebugFlag('ExecRegDelta')
88DebugFlag('ExecResult', 'Format: Include results from execution')
89DebugFlag('ExecSymbol', 'Format: Try to include symbol names')
90DebugFlag('ExecThread', 'Format: Include thread ID in trace')
91DebugFlag('ExecTicks', 'Format: Include tick count')
92DebugFlag('ExecMicro', 'Filter: Include microops')
93DebugFlag('ExecMacro', 'Filter: Include macroops')
94DebugFlag('ExecUser', 'Filter: Trace user mode instructions')
95DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
96DebugFlag('ExecAsid', 'Format: Include ASID in trace')
97DebugFlag('ExecFlags', 'Format: Include instruction flags in trace')
98DebugFlag('Fetch')
99DebugFlag('IntrControl')
100DebugFlag('O3PipeView')
101DebugFlag('PCEvent')
102DebugFlag('Quiesce')
103DebugFlag('Mwait')
104
105CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
106    'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
107    'ExecResult', 'ExecSymbol', 'ExecThread',
108    'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel',
109    'ExecAsid', 'ExecFlags' ])
110CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
111    'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro',
112    'ExecFaulting', 'ExecUser', 'ExecKernel' ])
113CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
114    'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecMacro', 'ExecFaulting',
115    'ExecUser', 'ExecKernel' ])
116