types.hh revision 9180
1712SN/A/* 21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 3712SN/A * All rights reserved. 4712SN/A * 5712SN/A * Redistribution and use in source and binary forms, with or without 6712SN/A * modification, are permitted provided that the following conditions are 7712SN/A * met: redistributions of source code must retain the above copyright 8712SN/A * notice, this list of conditions and the following disclaimer; 9712SN/A * redistributions in binary form must reproduce the above copyright 10712SN/A * notice, this list of conditions and the following disclaimer in the 11712SN/A * documentation and/or other materials provided with the distribution; 12712SN/A * neither the name of the copyright holders nor the names of its 13712SN/A * contributors may be used to endorse or promote products derived from 14712SN/A * this software without specific prior written permission. 15712SN/A * 16712SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17712SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18712SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19712SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20712SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21712SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22712SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23712SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24712SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25712SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26712SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert 29712SN/A */ 30712SN/A 311354SN/A/** 321354SN/A * @file 33712SN/A * Defines global host-dependent types: 342170SN/A * Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t. 352080SN/A */ 36712SN/A 372680Sktlim@umich.edu#ifndef __BASE_TYPES_HH__ 38712SN/A#define __BASE_TYPES_HH__ 39712SN/A 40712SN/A#include <inttypes.h> 41712SN/A 42712SN/A#include <cassert> 43712SN/A 44712SN/A/** uint64_t constant */ 45712SN/A#define ULL(N) ((uint64_t)N##ULL) 462680Sktlim@umich.edu/** int64_t constant */ 47712SN/A#define LL(N) ((int64_t)N##LL) 48712SN/A 49712SN/A/** Statistics counter type. Not much excuse for not using a 64-bit 502680Sktlim@umich.edu * integer here, but if you're desperate and only run short 51712SN/A * simulations you could make this 32 bits. 52712SN/A */ 53712SN/Atypedef int64_t Counter; 542680Sktlim@umich.edu 55712SN/A/** 562680Sktlim@umich.edu * Tick count type. 57712SN/A */ 58712SN/Atypedef uint64_t Tick; 59712SN/A 60712SN/Aconst Tick MaxTick = ULL(0xffffffffffffffff); 61712SN/A 62712SN/A/** 63712SN/A * Cycles is a wrapper class for representing cycle counts, i.e. a 64712SN/A * relative difference between two points in time, expressed in a 65712SN/A * number of clock cycles. 66712SN/A * 67712SN/A * The Cycles wrapper class is a type-safe alternative to a 68712SN/A * typedef, aiming to avoid unintentional mixing of cycles and ticks 69712SN/A * in the code base. 70712SN/A * 71712SN/A * Operators are defined inside an ifndef block to avoid swig touching 72712SN/A * them. Note that there is no overloading of the bool operator as the 73712SN/A * compiler is allowed to turn booleans into integers and this causes 74712SN/A * a whole range of issues in a handful locations. The solution to 752080SN/A * this problem would be to use the safe bool idiom, but for now we 762080SN/A * make do without the test and use the more elaborate comparison > 77712SN/A * Cycles(0). 78712SN/A */ 79712SN/Aclass Cycles 80712SN/A{ 81712SN/A 82712SN/A private: 832080SN/A 842080SN/A /** Member holding the actual value. */ 85712SN/A uint64_t c; 86712SN/A 87712SN/A public: 88712SN/A 89712SN/A /** Explicit constructor assigning a value. */ 90712SN/A explicit Cycles(uint64_t _c) : c(_c) { } 91712SN/A 92712SN/A#ifndef SWIG // keep the operators away from SWIG 932680Sktlim@umich.edu 94712SN/A /** Converting back to the value type. */ 95712SN/A operator uint64_t() const { return c; } 96712SN/A 97712SN/A /** Prefix increment operator. */ 98712SN/A Cycles& operator++() 99712SN/A { ++c; return *this; } 100712SN/A 1012521SN/A /** Prefix decrement operator. Is only temporarily used in the O3 CPU. */ 1022680Sktlim@umich.edu Cycles& operator--() 103712SN/A { assert(c != 0); --c; return *this; } 1042521SN/A 105712SN/A /** In-place addition of cycles. */ 106712SN/A const Cycles& operator+=(const Cycles& cc) 107712SN/A { c += cc.c; return *this; } 108712SN/A 1092521SN/A /** Greater than comparison used for > Cycles(0). */ 1102680Sktlim@umich.edu bool operator>(const Cycles& cc) const 111712SN/A { return c > cc.c; } 1122521SN/A 113712SN/A#endif // SWIG not touching operators 114712SN/A 115712SN/A}; 116712SN/A 1172521SN/A/** 1182680Sktlim@umich.edu * Address type 119712SN/A * This will probably be moved somewhere else in the near future. 1202521SN/A * This should be at least as big as the biggest address width in use 121712SN/A * in the system, which will probably be 64 bits. 122712SN/A */ 123712SN/Atypedef uint64_t Addr; 1241354SN/A 125typedef uint16_t MicroPC; 126 127static const MicroPC MicroPCRomBit = 1 << (sizeof(MicroPC) * 8 - 1); 128 129static inline MicroPC 130romMicroPC(MicroPC upc) 131{ 132 return upc | MicroPCRomBit; 133} 134 135static inline MicroPC 136normalMicroPC(MicroPC upc) 137{ 138 return upc & ~MicroPCRomBit; 139} 140 141static inline bool 142isRomMicroPC(MicroPC upc) 143{ 144 return MicroPCRomBit & upc; 145} 146 147const Addr MaxAddr = (Addr)-1; 148 149/** 150 * Thread index/ID type 151 */ 152typedef int16_t ThreadID; 153const ThreadID InvalidThreadID = (ThreadID)-1; 154 155/** 156 * Port index/ID type, and a symbolic name for an invalid port id. 157 */ 158typedef int16_t PortID; 159const PortID InvalidPortID = (PortID)-1; 160 161class FaultBase; 162template <class T> class RefCountingPtr; 163typedef RefCountingPtr<FaultBase> Fault; 164 165#endif // __BASE_TYPES_HH__ 166