utility.hh revision 7680:f4eda002333b
12391SN/A/*
28931Sandreas.hansson@arm.com * Copyright (c) 2007 The Hewlett-Packard Development Company
38931Sandreas.hansson@arm.com * All rights reserved.
48931Sandreas.hansson@arm.com *
58931Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall
68931Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual
78931Sandreas.hansson@arm.com * property including but not limited to intellectual property relating
88931Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software
98931Sandreas.hansson@arm.com * licensed hereunder.  You may use the software subject to the license
108931Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated
118931Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software,
128931Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form.
138931Sandreas.hansson@arm.com *
142391SN/A * Redistribution and use in source and binary forms, with or without
152391SN/A * modification, are permitted provided that the following conditions are
162391SN/A * met: redistributions of source code must retain the above copyright
172391SN/A * notice, this list of conditions and the following disclaimer;
182391SN/A * redistributions in binary form must reproduce the above copyright
192391SN/A * notice, this list of conditions and the following disclaimer in the
202391SN/A * documentation and/or other materials provided with the distribution;
212391SN/A * neither the name of the copyright holders nor the names of its
222391SN/A * contributors may be used to endorse or promote products derived from
232391SN/A * this software without specific prior written permission.
242391SN/A *
252391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
262391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
272391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
282391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
292391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
302391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
312391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
322391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
332391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
342391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
352391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
362391SN/A *
372391SN/A * Authors: Gabe Black
382391SN/A */
392665SN/A
402665SN/A#ifndef __ARCH_X86_UTILITY_HH__
418931Sandreas.hansson@arm.com#define __ARCH_X86_UTILITY_HH__
422391SN/A
432391SN/A#include "arch/x86/regs/misc.hh"
448931Sandreas.hansson@arm.com#include "arch/x86/types.hh"
458931Sandreas.hansson@arm.com#include "base/hashmap.hh"
468931Sandreas.hansson@arm.com#include "base/misc.hh"
472391SN/A#include "base/types.hh"
482391SN/A#include "config/full_system.hh"
498931Sandreas.hansson@arm.com#include "cpu/thread_context.hh"
508931Sandreas.hansson@arm.com
512391SN/Aclass ThreadContext;
522462SN/A
538931Sandreas.hansson@arm.comnamespace X86ISA
548719SN/A{
552462SN/A    uint64_t getArgument(ThreadContext *tc, int number, bool fp);
569053Sdam.sunwoo@arm.com
579053Sdam.sunwoo@arm.com    static inline bool
589053Sdam.sunwoo@arm.com    inUserMode(ThreadContext *tc)
598931Sandreas.hansson@arm.com    {
609293Sandreas.hansson@arm.com#if FULL_SYSTEM
619293Sandreas.hansson@arm.com        HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
629293Sandreas.hansson@arm.com        return m5reg.cpl == 3;
639293Sandreas.hansson@arm.com#else
649293Sandreas.hansson@arm.com        return true;
659293Sandreas.hansson@arm.com#endif
669293Sandreas.hansson@arm.com    }
679293Sandreas.hansson@arm.com
689293Sandreas.hansson@arm.com    /**
699293Sandreas.hansson@arm.com     * Function to insure ISA semantics about 0 registers.
709293Sandreas.hansson@arm.com     * @param tc The thread context.
719293Sandreas.hansson@arm.com     */
729293Sandreas.hansson@arm.com    template <class TC>
739293Sandreas.hansson@arm.com    void zeroRegisters(TC *tc);
749293Sandreas.hansson@arm.com
759293Sandreas.hansson@arm.com#if FULL_SYSTEM
769293Sandreas.hansson@arm.com
779293Sandreas.hansson@arm.com    void initCPU(ThreadContext *tc, int cpuId);
789293Sandreas.hansson@arm.com
799293Sandreas.hansson@arm.com#endif
809293Sandreas.hansson@arm.com
819293Sandreas.hansson@arm.com    void startupCPU(ThreadContext *tc, int cpuId);
829293Sandreas.hansson@arm.com
839293Sandreas.hansson@arm.com    void copyRegs(ThreadContext *src, ThreadContext *dest);
849293Sandreas.hansson@arm.com
859293Sandreas.hansson@arm.com    void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
869293Sandreas.hansson@arm.com};
879293Sandreas.hansson@arm.com
889293Sandreas.hansson@arm.com#endif // __ARCH_X86_UTILITY_HH__
899293Sandreas.hansson@arm.com