utility.hh revision 4182:5b2c0d266107 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use.  Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 *     Director of Intellectual Property Licensing
21 *     Office of Strategy and Technology
22 *     Hewlett-Packard Company
23 *     1501 Page Mill Road
24 *     Palo Alto, California  94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer.  Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution.  Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses.  Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_UTILITY_HH__
59#define __ARCH_X86_UTILITY_HH__
60
61#include "arch/x86/types.hh"
62#include "base/hashmap.hh"
63#include "base/misc.hh"
64#include "sim/host.hh"
65
66class ThreadContext;
67
68namespace __hash_namespace {
69    template<>
70    struct hash<X86ISA::ExtMachInst> {
71        size_t operator()(const X86ISA::ExtMachInst &emi) const {
72            //Because these are all the same, return 0
73            return 0;
74        };
75    };
76}
77
78namespace X86ISA
79{
80    static inline bool
81    inUserMode(ThreadContext *tc)
82    {
83        return false;
84    }
85
86    inline bool isCallerSaveIntegerRegister(unsigned int reg) {
87        panic("register classification not implemented");
88        return false;
89    }
90
91    inline bool isCalleeSaveIntegerRegister(unsigned int reg) {
92        panic("register classification not implemented");
93        return false;
94    }
95
96    inline bool isCallerSaveFloatRegister(unsigned int reg) {
97        panic("register classification not implemented");
98        return false;
99    }
100
101    inline bool isCalleeSaveFloatRegister(unsigned int reg) {
102        panic("register classification not implemented");
103        return false;
104    }
105
106    // Instruction address compression hooks
107    inline Addr realPCToFetchPC(const Addr &addr)
108    {
109        return addr;
110    }
111
112    inline Addr fetchPCToRealPC(const Addr &addr)
113    {
114        return addr;
115    }
116
117    // the size of "fetched" instructions (not necessarily the size
118    // of real instructions for PISA)
119    inline size_t fetchInstSize()
120    {
121        return sizeof(MachInst);
122    }
123
124    /**
125     * Function to insure ISA semantics about 0 registers.
126     * @param tc The thread context.
127     */
128    template <class TC>
129    void zeroRegisters(TC *tc);
130
131    inline void initCPU(ThreadContext *tc, int cpuId)
132    {
133        panic("initCPU not implemented!\n");
134    }
135};
136
137#endif // __ARCH_X86_UTILITY_HH__
138