tlb.hh revision 8888:befcf4d79fc1
18706Sandreas.hansson@arm.com/* 27586SAli.Saidi@arm.com * Copyright (c) 2007 The Hewlett-Packard Development Company 37586SAli.Saidi@arm.com * All rights reserved. 47586SAli.Saidi@arm.com * 57586SAli.Saidi@arm.com * The license below extends only to copyright in the software and shall 67586SAli.Saidi@arm.com * not be construed as granting a license to any other intellectual 77586SAli.Saidi@arm.com * property including but not limited to intellectual property relating 87586SAli.Saidi@arm.com * to a hardware implementation of the functionality of the software 97586SAli.Saidi@arm.com * licensed hereunder. You may use the software subject to the license 107586SAli.Saidi@arm.com * terms below provided that you ensure that this notice is replicated 117586SAli.Saidi@arm.com * unmodified and in its entirety in all distributions of the software, 127586SAli.Saidi@arm.com * modified or unmodified, in source code or in binary form. 137905SBrad.Beckmann@amd.com * 145323Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 152934Sktlim@umich.edu * modification, are permitted provided that the following conditions are 162934Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 172934Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 182934Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 192934Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 202934Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 212934Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 222934Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 232934Sktlim@umich.edu * this software without specific prior written permission. 242934Sktlim@umich.edu * 252934Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 262934Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 272934Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 282934Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 292934Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 302934Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 312934Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 322934Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 332934Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 342934Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 352934Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 362934Sktlim@umich.edu * 372934Sktlim@umich.edu * Authors: Gabe Black 382934Sktlim@umich.edu */ 392934Sktlim@umich.edu 402934Sktlim@umich.edu#ifndef __ARCH_X86_TLB_HH__ 412934Sktlim@umich.edu#define __ARCH_X86_TLB_HH__ 422934Sktlim@umich.edu 432995Ssaidi@eecs.umich.edu#include <list> 448528SAli.Saidi@ARM.com#include <string> 452934Sktlim@umich.edu#include <vector> 462934Sktlim@umich.edu 472934Sktlim@umich.edu#include "arch/x86/regs/segment.hh" 482934Sktlim@umich.edu#include "arch/x86/pagetable.hh" 492934Sktlim@umich.edu#include "mem/mem_object.hh" 502934Sktlim@umich.edu#include "mem/request.hh" 512934Sktlim@umich.edu#include "params/X86TLB.hh" 522934Sktlim@umich.edu#include "sim/fault_fwd.hh" 539036Sandreas.hansson@arm.com#include "sim/sim_object.hh" 546122SSteve.Reinhardt@amd.com#include "sim/tlb.hh" 556122SSteve.Reinhardt@amd.com 566122SSteve.Reinhardt@amd.comclass ThreadContext; 576122SSteve.Reinhardt@amd.comclass Packet; 589826Sandreas.hansson@arm.com 598713Sandreas.hansson@arm.comnamespace X86ISA 604520Ssaidi@eecs.umich.edu{ 614982Ssaidi@eecs.umich.edu class Walker; 624520Ssaidi@eecs.umich.edu 634520Ssaidi@eecs.umich.edu class TLB : public BaseTLB 642934Sktlim@umich.edu { 652934Sktlim@umich.edu protected: 663005Sstever@eecs.umich.edu friend class Walker; 673005Sstever@eecs.umich.edu 683304Sstever@eecs.umich.edu typedef std::list<TlbEntry *> EntryList; 692995Ssaidi@eecs.umich.edu 709036Sandreas.hansson@arm.com uint32_t configAddress; 719036Sandreas.hansson@arm.com 728713Sandreas.hansson@arm.com public: 738713Sandreas.hansson@arm.com 749164Sandreas.hansson@arm.com typedef X86TLBParams Params; 758713Sandreas.hansson@arm.com TLB(const Params *p); 769826Sandreas.hansson@arm.com 778839Sandreas.hansson@arm.com void dumpAll(); 788839Sandreas.hansson@arm.com 792934Sktlim@umich.edu TlbEntry *lookup(Addr va, bool update_lru = true); 802934Sktlim@umich.edu 812995Ssaidi@eecs.umich.edu void setConfigAddress(uint32_t addr); 822934Sktlim@umich.edu 832934Sktlim@umich.edu protected: 842934Sktlim@umich.edu 858839Sandreas.hansson@arm.com EntryList::iterator lookupIt(Addr va, bool update_lru = true); 868839Sandreas.hansson@arm.com 878839Sandreas.hansson@arm.com Walker * walker; 888839Sandreas.hansson@arm.com 898839Sandreas.hansson@arm.com public: 908839Sandreas.hansson@arm.com Walker *getWalker(); 912995Ssaidi@eecs.umich.edu 922934Sktlim@umich.edu void invalidateAll(); 932934Sktlim@umich.edu 942953Sktlim@umich.edu void invalidateNonGlobal(); 955478Snate@binkert.org 962934Sktlim@umich.edu void demapPage(Addr va, uint64_t asn); 973449Shsul@eecs.umich.edu 982934Sktlim@umich.edu protected: 992934Sktlim@umich.edu int size; 1002934Sktlim@umich.edu 1018839Sandreas.hansson@arm.com TlbEntry * tlb; 1028706Sandreas.hansson@arm.com 1032934Sktlim@umich.edu EntryList freeList; 1042934Sktlim@umich.edu EntryList entryList; 1059826Sandreas.hansson@arm.com 1066765SBrad.Beckmann@amd.com Fault translateInt(RequestPtr req, ThreadContext *tc); 1076765SBrad.Beckmann@amd.com 1086765SBrad.Beckmann@amd.com Fault translate(RequestPtr req, ThreadContext *tc, 1096765SBrad.Beckmann@amd.com Translation *translation, Mode mode, 1109826Sandreas.hansson@arm.com bool &delayedResponse, bool timing); 1119826Sandreas.hansson@arm.com 1126765SBrad.Beckmann@amd.com public: 1136765SBrad.Beckmann@amd.com 1146765SBrad.Beckmann@amd.com Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); 1156765SBrad.Beckmann@amd.com void translateTiming(RequestPtr req, ThreadContext *tc, 1166765SBrad.Beckmann@amd.com Translation *translation, Mode mode); 1176765SBrad.Beckmann@amd.com /** Stub function for compilation support of CheckerCPU. x86 ISA does 1189036Sandreas.hansson@arm.com * not support Checker model at the moment 1196893SBrad.Beckmann@amd.com */ 1206765SBrad.Beckmann@amd.com Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); 1216765SBrad.Beckmann@amd.com 1226765SBrad.Beckmann@amd.com TlbEntry * insert(Addr vpn, TlbEntry &entry); 1236765SBrad.Beckmann@amd.com 1246765SBrad.Beckmann@amd.com // Checkpointing 1256765SBrad.Beckmann@amd.com virtual void serialize(std::ostream &os); 1268839Sandreas.hansson@arm.com virtual void unserialize(Checkpoint *cp, const std::string §ion); 1278839Sandreas.hansson@arm.com 1288839Sandreas.hansson@arm.com virtual Port * getPort(); 1298839Sandreas.hansson@arm.com }; 1306765SBrad.Beckmann@amd.com} 1316893SBrad.Beckmann@amd.com 1327633SBrad.Beckmann@amd.com#endif // __ARCH_X86_TLB_HH__ 1337633SBrad.Beckmann@amd.com