tlb.hh revision 5236:0050ad4fb3ef 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use.  Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 *     Director of Intellectual Property Licensing
21 *     Office of Strategy and Technology
22 *     Hewlett-Packard Company
23 *     1501 Page Mill Road
24 *     Palo Alto, California  94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer.  Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution.  Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses.  Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_TLB_HH__
59#define __ARCH_X86_TLB_HH__
60
61#include <list>
62#include <string>
63
64#include "arch/x86/pagetable.hh"
65#include "arch/x86/segmentregs.hh"
66#include "config/full_system.hh"
67#include "mem/mem_object.hh"
68#include "mem/request.hh"
69#include "params/X86DTB.hh"
70#include "params/X86ITB.hh"
71#include "sim/faults.hh"
72#include "sim/sim_object.hh"
73
74class ThreadContext;
75class Packet;
76
77namespace X86ISA
78{
79    static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS;
80
81    class TLB;
82
83    class TLB : public MemObject
84    {
85      protected:
86        friend class FakeITLBFault;
87        friend class FakeDTLBFault;
88
89        System * sys;
90
91      public:
92        typedef X86TLBParams Params;
93        TLB(const Params *p);
94
95        void dumpAll();
96
97        TlbEntry *lookup(Addr va, bool update_lru = true);
98
99#if FULL_SYSTEM
100      protected:
101        class Walker
102        {
103          public:
104            enum State {
105                Ready,
106                Waiting,
107                LongPML4,
108                LongPDP,
109                LongPD,
110                LongPTE,
111                PAEPDP,
112                PAEPD,
113                PAEPTE,
114                PSEPD,
115                PD,
116                PTE
117            };
118
119            // Act on the current state and determine what to do next. If the
120            // walker has finished updating the TLB, this will return false.
121            bool doNext(PacketPtr read, PacketPtr &write);
122
123            // This does an actual load to feed the walker. If we're in
124            // atomic mode, this will drive the state machine itself until
125            // the TLB is filled. If we're in timing mode, the port getting
126            // a reply will drive the machine using this function which will
127            // return after starting the memory operation.
128            void doMemory(Addr addr);
129
130            // Kick off the state machine.
131            void start(bool _uncachable, Addr _vaddr, Addr cr3, State next)
132            {
133                assert(state == Ready);
134                state = Waiting;
135                nextState = next;
136                // If PAE isn't being used, entries are 4 bytes. Otherwise
137                // they're 8.
138                if (next == PSEPD || next == PD || next == PTE)
139                    size = 4;
140                else
141                    size = 8;
142                vaddr = _vaddr;
143                uncachable = _uncacheable;
144                buildPacket(cr3);
145                if (state == Enums::timing) {
146                    port->sendTiming(&packet);
147                } else if (state == Enums::atomic) {
148                    port->sendAtomic(&packet);
149                    Addr addr;
150                    while(doNext(packet.get<uint64_t>(), addr)) {
151                        buildPacket(addr);
152                        port->sendAtomic(&packet);
153                    }
154                } else {
155                    panic("Unrecognized memory system mode.\n");
156                }
157            };
158
159          protected:
160            friend class TLB;
161
162            class WalkerPort : public Port
163            {
164              public:
165                WalkerPort(const std::string &_name, Walker * _walker) :
166                      Port(_name, _walker->tlb), walker(_walker),
167                      packet(NULL), snoopRangeSent(false), retrying(false)
168                {}
169
170              protected:
171                Walker * walker;
172
173                PacketPtr packet;
174                vector<PacketPtr> writes;
175
176                bool snoopRangeSent;
177                bool retrying;
178
179                bool recvTiming(PacketPtr pkt);
180                Tick recvAtomic(PacketPtr pkt);
181                void recvFunctional(PacketPtr pkt);
182                void recvStatusChange(Status status);
183                void recvRetry();
184                void getDeviceAddressRanges(AddrRangeList &resp,
185                        bool &snoop)
186                {
187                    resp.clear();
188                    snoop = true;
189                }
190
191              public:
192                bool sendTiming(PacketPtr pkt)
193                {
194                    retrying = !Port::sendTiming(pkt);
195                    return !retrying;
196                }
197
198                bool blocked() { return retrying; }
199            };
200
201            friend class WalkerPort;
202
203            WalkerPort port;
204
205            Packet packet;
206            Request request;
207
208            TLB * tlb;
209
210            State state;
211            State nextState;
212            int size;
213
214            Addr vaddr;
215
216          public:
217            Walker(const std::string &_name, TLB * _tlb) :
218                port(_name + "-walker_port", this),
219                packet(&request, ReadExReq, Broadcast),
220                tlb(_tlb), state(Ready), nextState(Ready)
221            {
222            }
223
224
225        };
226
227        Walker walker;
228#endif
229
230      protected:
231        int size;
232
233        TlbEntry * tlb;
234
235        typedef std::list<TlbEntry *> EntryList;
236        EntryList freeList;
237        EntryList entryList;
238
239        Port *getPort(const std::string &if_name, int idx = -1);
240
241        void insert(Addr vpn, TlbEntry &entry);
242
243        void invalidateAll();
244
245        void invalidateNonGlobal();
246
247        void demapPage(Addr va);
248
249        template<class TlbFault>
250        Fault translate(RequestPtr &req, ThreadContext *tc,
251                bool write, bool execute);
252
253      public:
254        // Checkpointing
255        virtual void serialize(std::ostream &os);
256        virtual void unserialize(Checkpoint *cp, const std::string &section);
257    };
258
259    class ITB : public TLB
260    {
261      public:
262        typedef X86ITBParams Params;
263        ITB(const Params *p) : TLB(p)
264        {
265        }
266
267        Fault translate(RequestPtr &req, ThreadContext *tc);
268
269        friend class DTB;
270    };
271
272    class DTB : public TLB
273    {
274      public:
275        typedef X86DTBParams Params;
276        DTB(const Params *p) : TLB(p)
277        {
278        }
279        Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
280#if FULL_SYSTEM
281        Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
282        Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
283#endif
284
285        // Checkpointing
286        virtual void serialize(std::ostream &os);
287        virtual void unserialize(Checkpoint *cp, const std::string &section);
288    };
289}
290
291#endif // __ARCH_X86_TLB_HH__
292