tlb.cc revision 5359
14997Sgblack@eecs.umich.edu/* 24997Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 34997Sgblack@eecs.umich.edu * All rights reserved. 44997Sgblack@eecs.umich.edu * 54997Sgblack@eecs.umich.edu * Redistribution and use of this software in source and binary forms, 64997Sgblack@eecs.umich.edu * with or without modification, are permitted provided that the 74997Sgblack@eecs.umich.edu * following conditions are met: 84997Sgblack@eecs.umich.edu * 94997Sgblack@eecs.umich.edu * The software must be used only for Non-Commercial Use which means any 104997Sgblack@eecs.umich.edu * use which is NOT directed to receiving any direct monetary 114997Sgblack@eecs.umich.edu * compensation for, or commercial advantage from such use. Illustrative 124997Sgblack@eecs.umich.edu * examples of non-commercial use are academic research, personal study, 134997Sgblack@eecs.umich.edu * teaching, education and corporate research & development. 144997Sgblack@eecs.umich.edu * Illustrative examples of commercial use are distributing products for 154997Sgblack@eecs.umich.edu * commercial advantage and providing services using the software for 164997Sgblack@eecs.umich.edu * commercial advantage. 174997Sgblack@eecs.umich.edu * 184997Sgblack@eecs.umich.edu * If you wish to use this software or functionality therein that may be 194997Sgblack@eecs.umich.edu * covered by patents for commercial use, please contact: 204997Sgblack@eecs.umich.edu * Director of Intellectual Property Licensing 214997Sgblack@eecs.umich.edu * Office of Strategy and Technology 224997Sgblack@eecs.umich.edu * Hewlett-Packard Company 234997Sgblack@eecs.umich.edu * 1501 Page Mill Road 244997Sgblack@eecs.umich.edu * Palo Alto, California 94304 254997Sgblack@eecs.umich.edu * 264997Sgblack@eecs.umich.edu * Redistributions of source code must retain the above copyright notice, 274997Sgblack@eecs.umich.edu * this list of conditions and the following disclaimer. Redistributions 284997Sgblack@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 294997Sgblack@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or 304997Sgblack@eecs.umich.edu * other materials provided with the distribution. Neither the name of 314997Sgblack@eecs.umich.edu * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 324997Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 334997Sgblack@eecs.umich.edu * this software without specific prior written permission. No right of 344997Sgblack@eecs.umich.edu * sublicense is granted herewith. Derivatives of the software and 354997Sgblack@eecs.umich.edu * output created using the software may be prepared, but only for 364997Sgblack@eecs.umich.edu * Non-Commercial Uses. Derivatives of the software may be shared with 374997Sgblack@eecs.umich.edu * others provided: (i) the others agree to abide by the list of 384997Sgblack@eecs.umich.edu * conditions herein which includes the Non-Commercial Use restrictions; 394997Sgblack@eecs.umich.edu * and (ii) such Derivatives of the software include the above copyright 404997Sgblack@eecs.umich.edu * notice to acknowledge the contribution from this software where 414997Sgblack@eecs.umich.edu * applicable, this list of conditions and the disclaimer below. 424997Sgblack@eecs.umich.edu * 434997Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 444997Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 454997Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 464997Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 474997Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 484997Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 494997Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 504997Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 514997Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 524997Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 534997Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 544997Sgblack@eecs.umich.edu * 554997Sgblack@eecs.umich.edu * Authors: Gabe Black 564997Sgblack@eecs.umich.edu */ 574997Sgblack@eecs.umich.edu 584997Sgblack@eecs.umich.edu#include <cstring> 594997Sgblack@eecs.umich.edu 605086Sgblack@eecs.umich.edu#include "config/full_system.hh" 615086Sgblack@eecs.umich.edu 625124Sgblack@eecs.umich.edu#include "arch/x86/pagetable.hh" 635086Sgblack@eecs.umich.edu#include "arch/x86/tlb.hh" 645149Sgblack@eecs.umich.edu#include "arch/x86/x86_traits.hh" 655086Sgblack@eecs.umich.edu#include "base/bitfield.hh" 665086Sgblack@eecs.umich.edu#include "base/trace.hh" 675237Sgblack@eecs.umich.edu#include "config/full_system.hh" 685086Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 695086Sgblack@eecs.umich.edu#include "cpu/base.hh" 705086Sgblack@eecs.umich.edu#include "mem/packet_access.hh" 715086Sgblack@eecs.umich.edu#include "mem/request.hh" 725245Sgblack@eecs.umich.edu 735245Sgblack@eecs.umich.edu#if FULL_SYSTEM 745245Sgblack@eecs.umich.edu#include "arch/x86/pagetable_walker.hh" 755245Sgblack@eecs.umich.edu#endif 765086Sgblack@eecs.umich.edu 775086Sgblack@eecs.umich.edunamespace X86ISA { 785086Sgblack@eecs.umich.edu 795358Sgblack@eecs.umich.eduTLB::TLB(const Params *p) : BaseTLB(p), configAddress(0), size(p->size) 805124Sgblack@eecs.umich.edu{ 815124Sgblack@eecs.umich.edu tlb = new TlbEntry[size]; 825124Sgblack@eecs.umich.edu std::memset(tlb, 0, sizeof(TlbEntry) * size); 835124Sgblack@eecs.umich.edu 845124Sgblack@eecs.umich.edu for (int x = 0; x < size; x++) 855124Sgblack@eecs.umich.edu freeList.push_back(&tlb[x]); 865124Sgblack@eecs.umich.edu 875237Sgblack@eecs.umich.edu#if FULL_SYSTEM 885245Sgblack@eecs.umich.edu walker = p->walker; 895245Sgblack@eecs.umich.edu walker->setTLB(this); 905245Sgblack@eecs.umich.edu#endif 915236Sgblack@eecs.umich.edu} 925236Sgblack@eecs.umich.edu 935236Sgblack@eecs.umich.eduvoid 945124Sgblack@eecs.umich.eduTLB::insert(Addr vpn, TlbEntry &entry) 955124Sgblack@eecs.umich.edu{ 965124Sgblack@eecs.umich.edu //TODO Deal with conflicting entries 975124Sgblack@eecs.umich.edu 985124Sgblack@eecs.umich.edu TlbEntry *newEntry = NULL; 995124Sgblack@eecs.umich.edu if (!freeList.empty()) { 1005124Sgblack@eecs.umich.edu newEntry = freeList.front(); 1015124Sgblack@eecs.umich.edu freeList.pop_front(); 1025124Sgblack@eecs.umich.edu } else { 1035124Sgblack@eecs.umich.edu newEntry = entryList.back(); 1045124Sgblack@eecs.umich.edu entryList.pop_back(); 1055124Sgblack@eecs.umich.edu } 1065124Sgblack@eecs.umich.edu *newEntry = entry; 1075124Sgblack@eecs.umich.edu newEntry->vaddr = vpn; 1085124Sgblack@eecs.umich.edu entryList.push_front(newEntry); 1095124Sgblack@eecs.umich.edu} 1105124Sgblack@eecs.umich.edu 1115124Sgblack@eecs.umich.eduTlbEntry * 1125124Sgblack@eecs.umich.eduTLB::lookup(Addr va, bool update_lru) 1135124Sgblack@eecs.umich.edu{ 1145124Sgblack@eecs.umich.edu //TODO make this smarter at some point 1155124Sgblack@eecs.umich.edu EntryList::iterator entry; 1165124Sgblack@eecs.umich.edu for (entry = entryList.begin(); entry != entryList.end(); entry++) { 1175124Sgblack@eecs.umich.edu if ((*entry)->vaddr <= va && (*entry)->vaddr + (*entry)->size > va) { 1185124Sgblack@eecs.umich.edu DPRINTF(TLB, "Matched vaddr %#x to entry starting at %#x " 1195124Sgblack@eecs.umich.edu "with size %#x.\n", va, (*entry)->vaddr, (*entry)->size); 1205124Sgblack@eecs.umich.edu TlbEntry *e = *entry; 1215124Sgblack@eecs.umich.edu if (update_lru) { 1225124Sgblack@eecs.umich.edu entryList.erase(entry); 1235124Sgblack@eecs.umich.edu entryList.push_front(e); 1245124Sgblack@eecs.umich.edu } 1255124Sgblack@eecs.umich.edu return e; 1265124Sgblack@eecs.umich.edu } 1275124Sgblack@eecs.umich.edu } 1285124Sgblack@eecs.umich.edu return NULL; 1295124Sgblack@eecs.umich.edu} 1305124Sgblack@eecs.umich.edu 1315245Sgblack@eecs.umich.edu#if FULL_SYSTEM 1325245Sgblack@eecs.umich.eduvoid 1335245Sgblack@eecs.umich.eduTLB::walk(ThreadContext * _tc, Addr vaddr) 1345245Sgblack@eecs.umich.edu{ 1355245Sgblack@eecs.umich.edu walker->start(_tc, vaddr); 1365245Sgblack@eecs.umich.edu} 1375245Sgblack@eecs.umich.edu#endif 1385245Sgblack@eecs.umich.edu 1395124Sgblack@eecs.umich.eduvoid 1405124Sgblack@eecs.umich.eduTLB::invalidateAll() 1415124Sgblack@eecs.umich.edu{ 1425242Sgblack@eecs.umich.edu DPRINTF(TLB, "Invalidating all entries.\n"); 1435242Sgblack@eecs.umich.edu while (!entryList.empty()) { 1445242Sgblack@eecs.umich.edu TlbEntry *entry = entryList.front(); 1455242Sgblack@eecs.umich.edu entryList.pop_front(); 1465242Sgblack@eecs.umich.edu freeList.push_back(entry); 1475242Sgblack@eecs.umich.edu } 1485124Sgblack@eecs.umich.edu} 1495124Sgblack@eecs.umich.edu 1505124Sgblack@eecs.umich.eduvoid 1515357Sgblack@eecs.umich.eduTLB::setConfigAddress(uint32_t addr) 1525357Sgblack@eecs.umich.edu{ 1535357Sgblack@eecs.umich.edu configAddress = addr; 1545357Sgblack@eecs.umich.edu} 1555357Sgblack@eecs.umich.edu 1565357Sgblack@eecs.umich.eduvoid 1575124Sgblack@eecs.umich.eduTLB::invalidateNonGlobal() 1585124Sgblack@eecs.umich.edu{ 1595242Sgblack@eecs.umich.edu DPRINTF(TLB, "Invalidating all non global entries.\n"); 1605242Sgblack@eecs.umich.edu EntryList::iterator entryIt; 1615242Sgblack@eecs.umich.edu for (entryIt = entryList.begin(); entryIt != entryList.end();) { 1625242Sgblack@eecs.umich.edu if (!(*entryIt)->global) { 1635242Sgblack@eecs.umich.edu freeList.push_back(*entryIt); 1645242Sgblack@eecs.umich.edu entryList.erase(entryIt++); 1655242Sgblack@eecs.umich.edu } else { 1665242Sgblack@eecs.umich.edu entryIt++; 1675242Sgblack@eecs.umich.edu } 1685242Sgblack@eecs.umich.edu } 1695124Sgblack@eecs.umich.edu} 1705124Sgblack@eecs.umich.edu 1715124Sgblack@eecs.umich.eduvoid 1725358Sgblack@eecs.umich.eduTLB::demapPage(Addr va, uint64_t asn) 1735086Sgblack@eecs.umich.edu{ 1745359Sgblack@eecs.umich.edu EntryList::iterator entry = lookupIt(va, false); 1755359Sgblack@eecs.umich.edu if (entry != entryList.end()) { 1765359Sgblack@eecs.umich.edu freeList.push_back(*entry); 1775359Sgblack@eecs.umich.edu entryList.erase(entry); 1785359Sgblack@eecs.umich.edu } 1795086Sgblack@eecs.umich.edu} 1805086Sgblack@eecs.umich.edu 1815140Sgblack@eecs.umich.edutemplate<class TlbFault> 1825086Sgblack@eecs.umich.eduFault 1835140Sgblack@eecs.umich.eduTLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) 1845086Sgblack@eecs.umich.edu{ 1855124Sgblack@eecs.umich.edu Addr vaddr = req->getVaddr(); 1865140Sgblack@eecs.umich.edu DPRINTF(TLB, "Translating vaddr %#x.\n", vaddr); 1875124Sgblack@eecs.umich.edu uint32_t flags = req->getFlags(); 1885124Sgblack@eecs.umich.edu bool storeCheck = flags & StoreCheck; 1895140Sgblack@eecs.umich.edu 1905294Sgblack@eecs.umich.edu int seg = flags & mask(4); 1915124Sgblack@eecs.umich.edu 1925124Sgblack@eecs.umich.edu //XXX Junk code to surpress the warning 1935149Sgblack@eecs.umich.edu if (storeCheck); 1945149Sgblack@eecs.umich.edu 1955149Sgblack@eecs.umich.edu // If this is true, we're dealing with a request to read an internal 1965149Sgblack@eecs.umich.edu // value. 1975294Sgblack@eecs.umich.edu if (seg == SEGMENT_REG_MS) { 1985243Sgblack@eecs.umich.edu DPRINTF(TLB, "Addresses references internal memory.\n"); 1995149Sgblack@eecs.umich.edu Addr prefix = vaddr & IntAddrPrefixMask; 2005149Sgblack@eecs.umich.edu if (prefix == IntAddrPrefixCPUID) { 2015149Sgblack@eecs.umich.edu panic("CPUID memory space not yet implemented!\n"); 2025149Sgblack@eecs.umich.edu } else if (prefix == IntAddrPrefixMSR) { 2035149Sgblack@eecs.umich.edu req->setMmapedIpr(true); 2045149Sgblack@eecs.umich.edu Addr regNum = 0; 2055149Sgblack@eecs.umich.edu switch (vaddr & ~IntAddrPrefixMask) { 2065149Sgblack@eecs.umich.edu case 0x10: 2075149Sgblack@eecs.umich.edu regNum = MISCREG_TSC; 2085149Sgblack@eecs.umich.edu break; 2095149Sgblack@eecs.umich.edu case 0xFE: 2105149Sgblack@eecs.umich.edu regNum = MISCREG_MTRRCAP; 2115149Sgblack@eecs.umich.edu break; 2125149Sgblack@eecs.umich.edu case 0x174: 2135149Sgblack@eecs.umich.edu regNum = MISCREG_SYSENTER_CS; 2145149Sgblack@eecs.umich.edu break; 2155149Sgblack@eecs.umich.edu case 0x175: 2165149Sgblack@eecs.umich.edu regNum = MISCREG_SYSENTER_ESP; 2175149Sgblack@eecs.umich.edu break; 2185149Sgblack@eecs.umich.edu case 0x176: 2195149Sgblack@eecs.umich.edu regNum = MISCREG_SYSENTER_EIP; 2205149Sgblack@eecs.umich.edu break; 2215149Sgblack@eecs.umich.edu case 0x179: 2225149Sgblack@eecs.umich.edu regNum = MISCREG_MCG_CAP; 2235149Sgblack@eecs.umich.edu break; 2245149Sgblack@eecs.umich.edu case 0x17A: 2255149Sgblack@eecs.umich.edu regNum = MISCREG_MCG_STATUS; 2265149Sgblack@eecs.umich.edu break; 2275149Sgblack@eecs.umich.edu case 0x17B: 2285149Sgblack@eecs.umich.edu regNum = MISCREG_MCG_CTL; 2295149Sgblack@eecs.umich.edu break; 2305149Sgblack@eecs.umich.edu case 0x1D9: 2315149Sgblack@eecs.umich.edu regNum = MISCREG_DEBUG_CTL_MSR; 2325149Sgblack@eecs.umich.edu break; 2335149Sgblack@eecs.umich.edu case 0x1DB: 2345149Sgblack@eecs.umich.edu regNum = MISCREG_LAST_BRANCH_FROM_IP; 2355149Sgblack@eecs.umich.edu break; 2365149Sgblack@eecs.umich.edu case 0x1DC: 2375149Sgblack@eecs.umich.edu regNum = MISCREG_LAST_BRANCH_TO_IP; 2385149Sgblack@eecs.umich.edu break; 2395149Sgblack@eecs.umich.edu case 0x1DD: 2405149Sgblack@eecs.umich.edu regNum = MISCREG_LAST_EXCEPTION_FROM_IP; 2415149Sgblack@eecs.umich.edu break; 2425149Sgblack@eecs.umich.edu case 0x1DE: 2435149Sgblack@eecs.umich.edu regNum = MISCREG_LAST_EXCEPTION_TO_IP; 2445149Sgblack@eecs.umich.edu break; 2455149Sgblack@eecs.umich.edu case 0x200: 2465149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_0; 2475149Sgblack@eecs.umich.edu break; 2485149Sgblack@eecs.umich.edu case 0x201: 2495149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_0; 2505149Sgblack@eecs.umich.edu break; 2515149Sgblack@eecs.umich.edu case 0x202: 2525149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_1; 2535149Sgblack@eecs.umich.edu break; 2545149Sgblack@eecs.umich.edu case 0x203: 2555149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_1; 2565149Sgblack@eecs.umich.edu break; 2575149Sgblack@eecs.umich.edu case 0x204: 2585149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_2; 2595149Sgblack@eecs.umich.edu break; 2605149Sgblack@eecs.umich.edu case 0x205: 2615149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_2; 2625149Sgblack@eecs.umich.edu break; 2635149Sgblack@eecs.umich.edu case 0x206: 2645149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_3; 2655149Sgblack@eecs.umich.edu break; 2665149Sgblack@eecs.umich.edu case 0x207: 2675149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_3; 2685149Sgblack@eecs.umich.edu break; 2695149Sgblack@eecs.umich.edu case 0x208: 2705149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_4; 2715149Sgblack@eecs.umich.edu break; 2725149Sgblack@eecs.umich.edu case 0x209: 2735149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_4; 2745149Sgblack@eecs.umich.edu break; 2755149Sgblack@eecs.umich.edu case 0x20A: 2765149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_5; 2775149Sgblack@eecs.umich.edu break; 2785149Sgblack@eecs.umich.edu case 0x20B: 2795149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_5; 2805149Sgblack@eecs.umich.edu break; 2815149Sgblack@eecs.umich.edu case 0x20C: 2825149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_6; 2835149Sgblack@eecs.umich.edu break; 2845149Sgblack@eecs.umich.edu case 0x20D: 2855149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_6; 2865149Sgblack@eecs.umich.edu break; 2875149Sgblack@eecs.umich.edu case 0x20E: 2885149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_BASE_7; 2895149Sgblack@eecs.umich.edu break; 2905149Sgblack@eecs.umich.edu case 0x20F: 2915149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_PHYS_MASK_7; 2925149Sgblack@eecs.umich.edu break; 2935149Sgblack@eecs.umich.edu case 0x250: 2945149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_64K_00000; 2955149Sgblack@eecs.umich.edu break; 2965149Sgblack@eecs.umich.edu case 0x258: 2975149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_16K_80000; 2985149Sgblack@eecs.umich.edu break; 2995149Sgblack@eecs.umich.edu case 0x259: 3005149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_16K_A0000; 3015149Sgblack@eecs.umich.edu break; 3025149Sgblack@eecs.umich.edu case 0x268: 3035149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_C0000; 3045149Sgblack@eecs.umich.edu break; 3055149Sgblack@eecs.umich.edu case 0x269: 3065149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_C8000; 3075149Sgblack@eecs.umich.edu break; 3085149Sgblack@eecs.umich.edu case 0x26A: 3095149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_D0000; 3105149Sgblack@eecs.umich.edu break; 3115149Sgblack@eecs.umich.edu case 0x26B: 3125149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_D8000; 3135149Sgblack@eecs.umich.edu break; 3145149Sgblack@eecs.umich.edu case 0x26C: 3155149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_E0000; 3165149Sgblack@eecs.umich.edu break; 3175149Sgblack@eecs.umich.edu case 0x26D: 3185149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_E8000; 3195149Sgblack@eecs.umich.edu break; 3205149Sgblack@eecs.umich.edu case 0x26E: 3215149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_F0000; 3225149Sgblack@eecs.umich.edu break; 3235149Sgblack@eecs.umich.edu case 0x26F: 3245149Sgblack@eecs.umich.edu regNum = MISCREG_MTRR_FIX_4K_F8000; 3255149Sgblack@eecs.umich.edu break; 3265149Sgblack@eecs.umich.edu case 0x277: 3275149Sgblack@eecs.umich.edu regNum = MISCREG_PAT; 3285149Sgblack@eecs.umich.edu break; 3295149Sgblack@eecs.umich.edu case 0x2FF: 3305149Sgblack@eecs.umich.edu regNum = MISCREG_DEF_TYPE; 3315149Sgblack@eecs.umich.edu break; 3325149Sgblack@eecs.umich.edu case 0x400: 3335149Sgblack@eecs.umich.edu regNum = MISCREG_MC0_CTL; 3345149Sgblack@eecs.umich.edu break; 3355149Sgblack@eecs.umich.edu case 0x404: 3365149Sgblack@eecs.umich.edu regNum = MISCREG_MC1_CTL; 3375149Sgblack@eecs.umich.edu break; 3385149Sgblack@eecs.umich.edu case 0x408: 3395149Sgblack@eecs.umich.edu regNum = MISCREG_MC2_CTL; 3405149Sgblack@eecs.umich.edu break; 3415149Sgblack@eecs.umich.edu case 0x40C: 3425149Sgblack@eecs.umich.edu regNum = MISCREG_MC3_CTL; 3435149Sgblack@eecs.umich.edu break; 3445149Sgblack@eecs.umich.edu case 0x410: 3455149Sgblack@eecs.umich.edu regNum = MISCREG_MC4_CTL; 3465149Sgblack@eecs.umich.edu break; 3475149Sgblack@eecs.umich.edu case 0x401: 3485149Sgblack@eecs.umich.edu regNum = MISCREG_MC0_STATUS; 3495149Sgblack@eecs.umich.edu break; 3505149Sgblack@eecs.umich.edu case 0x405: 3515149Sgblack@eecs.umich.edu regNum = MISCREG_MC1_STATUS; 3525149Sgblack@eecs.umich.edu break; 3535149Sgblack@eecs.umich.edu case 0x409: 3545149Sgblack@eecs.umich.edu regNum = MISCREG_MC2_STATUS; 3555149Sgblack@eecs.umich.edu break; 3565149Sgblack@eecs.umich.edu case 0x40D: 3575149Sgblack@eecs.umich.edu regNum = MISCREG_MC3_STATUS; 3585149Sgblack@eecs.umich.edu break; 3595149Sgblack@eecs.umich.edu case 0x411: 3605149Sgblack@eecs.umich.edu regNum = MISCREG_MC4_STATUS; 3615149Sgblack@eecs.umich.edu break; 3625149Sgblack@eecs.umich.edu case 0x402: 3635149Sgblack@eecs.umich.edu regNum = MISCREG_MC0_ADDR; 3645149Sgblack@eecs.umich.edu break; 3655149Sgblack@eecs.umich.edu case 0x406: 3665149Sgblack@eecs.umich.edu regNum = MISCREG_MC1_ADDR; 3675149Sgblack@eecs.umich.edu break; 3685149Sgblack@eecs.umich.edu case 0x40A: 3695149Sgblack@eecs.umich.edu regNum = MISCREG_MC2_ADDR; 3705149Sgblack@eecs.umich.edu break; 3715149Sgblack@eecs.umich.edu case 0x40E: 3725149Sgblack@eecs.umich.edu regNum = MISCREG_MC3_ADDR; 3735149Sgblack@eecs.umich.edu break; 3745149Sgblack@eecs.umich.edu case 0x412: 3755149Sgblack@eecs.umich.edu regNum = MISCREG_MC4_ADDR; 3765149Sgblack@eecs.umich.edu break; 3775149Sgblack@eecs.umich.edu case 0x403: 3785149Sgblack@eecs.umich.edu regNum = MISCREG_MC0_MISC; 3795149Sgblack@eecs.umich.edu break; 3805149Sgblack@eecs.umich.edu case 0x407: 3815149Sgblack@eecs.umich.edu regNum = MISCREG_MC1_MISC; 3825149Sgblack@eecs.umich.edu break; 3835149Sgblack@eecs.umich.edu case 0x40B: 3845149Sgblack@eecs.umich.edu regNum = MISCREG_MC2_MISC; 3855149Sgblack@eecs.umich.edu break; 3865149Sgblack@eecs.umich.edu case 0x40F: 3875149Sgblack@eecs.umich.edu regNum = MISCREG_MC3_MISC; 3885149Sgblack@eecs.umich.edu break; 3895149Sgblack@eecs.umich.edu case 0x413: 3905149Sgblack@eecs.umich.edu regNum = MISCREG_MC4_MISC; 3915149Sgblack@eecs.umich.edu break; 3925149Sgblack@eecs.umich.edu case 0xC0000080: 3935149Sgblack@eecs.umich.edu regNum = MISCREG_EFER; 3945149Sgblack@eecs.umich.edu break; 3955149Sgblack@eecs.umich.edu case 0xC0000081: 3965149Sgblack@eecs.umich.edu regNum = MISCREG_STAR; 3975149Sgblack@eecs.umich.edu break; 3985149Sgblack@eecs.umich.edu case 0xC0000082: 3995149Sgblack@eecs.umich.edu regNum = MISCREG_LSTAR; 4005149Sgblack@eecs.umich.edu break; 4015149Sgblack@eecs.umich.edu case 0xC0000083: 4025149Sgblack@eecs.umich.edu regNum = MISCREG_CSTAR; 4035149Sgblack@eecs.umich.edu break; 4045149Sgblack@eecs.umich.edu case 0xC0000084: 4055149Sgblack@eecs.umich.edu regNum = MISCREG_SF_MASK; 4065149Sgblack@eecs.umich.edu break; 4075149Sgblack@eecs.umich.edu case 0xC0000100: 4085149Sgblack@eecs.umich.edu regNum = MISCREG_FS_BASE; 4095149Sgblack@eecs.umich.edu break; 4105149Sgblack@eecs.umich.edu case 0xC0000101: 4115149Sgblack@eecs.umich.edu regNum = MISCREG_GS_BASE; 4125149Sgblack@eecs.umich.edu break; 4135149Sgblack@eecs.umich.edu case 0xC0000102: 4145149Sgblack@eecs.umich.edu regNum = MISCREG_KERNEL_GS_BASE; 4155149Sgblack@eecs.umich.edu break; 4165149Sgblack@eecs.umich.edu case 0xC0000103: 4175149Sgblack@eecs.umich.edu regNum = MISCREG_TSC_AUX; 4185149Sgblack@eecs.umich.edu break; 4195149Sgblack@eecs.umich.edu case 0xC0010000: 4205149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_SEL0; 4215149Sgblack@eecs.umich.edu break; 4225149Sgblack@eecs.umich.edu case 0xC0010001: 4235149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_SEL1; 4245149Sgblack@eecs.umich.edu break; 4255149Sgblack@eecs.umich.edu case 0xC0010002: 4265149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_SEL2; 4275149Sgblack@eecs.umich.edu break; 4285149Sgblack@eecs.umich.edu case 0xC0010003: 4295149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_SEL3; 4305149Sgblack@eecs.umich.edu break; 4315149Sgblack@eecs.umich.edu case 0xC0010004: 4325149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_CTR0; 4335149Sgblack@eecs.umich.edu break; 4345149Sgblack@eecs.umich.edu case 0xC0010005: 4355149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_CTR1; 4365149Sgblack@eecs.umich.edu break; 4375149Sgblack@eecs.umich.edu case 0xC0010006: 4385149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_CTR2; 4395149Sgblack@eecs.umich.edu break; 4405149Sgblack@eecs.umich.edu case 0xC0010007: 4415149Sgblack@eecs.umich.edu regNum = MISCREG_PERF_EVT_CTR3; 4425149Sgblack@eecs.umich.edu break; 4435149Sgblack@eecs.umich.edu case 0xC0010010: 4445149Sgblack@eecs.umich.edu regNum = MISCREG_SYSCFG; 4455149Sgblack@eecs.umich.edu break; 4465149Sgblack@eecs.umich.edu case 0xC0010016: 4475149Sgblack@eecs.umich.edu regNum = MISCREG_IORR_BASE0; 4485149Sgblack@eecs.umich.edu break; 4495149Sgblack@eecs.umich.edu case 0xC0010017: 4505149Sgblack@eecs.umich.edu regNum = MISCREG_IORR_BASE1; 4515149Sgblack@eecs.umich.edu break; 4525149Sgblack@eecs.umich.edu case 0xC0010018: 4535149Sgblack@eecs.umich.edu regNum = MISCREG_IORR_MASK0; 4545149Sgblack@eecs.umich.edu break; 4555149Sgblack@eecs.umich.edu case 0xC0010019: 4565149Sgblack@eecs.umich.edu regNum = MISCREG_IORR_MASK1; 4575149Sgblack@eecs.umich.edu break; 4585149Sgblack@eecs.umich.edu case 0xC001001A: 4595149Sgblack@eecs.umich.edu regNum = MISCREG_TOP_MEM; 4605149Sgblack@eecs.umich.edu break; 4615149Sgblack@eecs.umich.edu case 0xC001001D: 4625149Sgblack@eecs.umich.edu regNum = MISCREG_TOP_MEM2; 4635149Sgblack@eecs.umich.edu break; 4645149Sgblack@eecs.umich.edu case 0xC0010114: 4655149Sgblack@eecs.umich.edu regNum = MISCREG_VM_CR; 4665149Sgblack@eecs.umich.edu break; 4675149Sgblack@eecs.umich.edu case 0xC0010115: 4685149Sgblack@eecs.umich.edu regNum = MISCREG_IGNNE; 4695149Sgblack@eecs.umich.edu break; 4705149Sgblack@eecs.umich.edu case 0xC0010116: 4715149Sgblack@eecs.umich.edu regNum = MISCREG_SMM_CTL; 4725149Sgblack@eecs.umich.edu break; 4735149Sgblack@eecs.umich.edu case 0xC0010117: 4745149Sgblack@eecs.umich.edu regNum = MISCREG_VM_HSAVE_PA; 4755149Sgblack@eecs.umich.edu break; 4765149Sgblack@eecs.umich.edu default: 4775149Sgblack@eecs.umich.edu return new GeneralProtection(0); 4785149Sgblack@eecs.umich.edu } 4795149Sgblack@eecs.umich.edu //The index is multiplied by the size of a MiscReg so that 4805149Sgblack@eecs.umich.edu //any memory dependence calculations will not see these as 4815149Sgblack@eecs.umich.edu //overlapping. 4825149Sgblack@eecs.umich.edu req->setPaddr(regNum * sizeof(MiscReg)); 4835149Sgblack@eecs.umich.edu return NoFault; 4845323Sgblack@eecs.umich.edu } else if (prefix == IntAddrPrefixIO) { 4855323Sgblack@eecs.umich.edu // TODO If CPL > IOPL or in virtual mode, check the I/O permission 4865323Sgblack@eecs.umich.edu // bitmap in the TSS. 4875323Sgblack@eecs.umich.edu 4885323Sgblack@eecs.umich.edu Addr IOPort = vaddr & ~IntAddrPrefixMask; 4895323Sgblack@eecs.umich.edu // Make sure the address fits in the expected 16 bit IO address 4905323Sgblack@eecs.umich.edu // space. 4915323Sgblack@eecs.umich.edu assert(!(IOPort & ~0xFFFF)); 4925357Sgblack@eecs.umich.edu if (IOPort == 0xCF8 && req->getSize() == 4) { 4935357Sgblack@eecs.umich.edu req->setMmapedIpr(true); 4945357Sgblack@eecs.umich.edu req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg)); 4955357Sgblack@eecs.umich.edu } else if ((IOPort & ~mask(2)) == 0xCFC) { 4965357Sgblack@eecs.umich.edu Addr configAddress = 4975357Sgblack@eecs.umich.edu tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS); 4985357Sgblack@eecs.umich.edu if (bits(configAddress, 31, 31)) { 4995357Sgblack@eecs.umich.edu req->setPaddr(PhysAddrPrefixPciConfig | 5005357Sgblack@eecs.umich.edu bits(configAddress, 30, 0)); 5015357Sgblack@eecs.umich.edu } 5025357Sgblack@eecs.umich.edu } else { 5035357Sgblack@eecs.umich.edu req->setPaddr(PhysAddrPrefixIO | IOPort); 5045357Sgblack@eecs.umich.edu } 5055323Sgblack@eecs.umich.edu return NoFault; 5065149Sgblack@eecs.umich.edu } else { 5075149Sgblack@eecs.umich.edu panic("Access to unrecognized internal address space %#x.\n", 5085149Sgblack@eecs.umich.edu prefix); 5095149Sgblack@eecs.umich.edu } 5105149Sgblack@eecs.umich.edu } 5115124Sgblack@eecs.umich.edu 5125140Sgblack@eecs.umich.edu // Get cr0. This will tell us how to do translation. We'll assume it was 5135140Sgblack@eecs.umich.edu // verified to be correct and consistent when set. 5145140Sgblack@eecs.umich.edu CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0); 5155140Sgblack@eecs.umich.edu 5165140Sgblack@eecs.umich.edu // If protected mode has been enabled... 5175140Sgblack@eecs.umich.edu if (cr0.pe) { 5185237Sgblack@eecs.umich.edu DPRINTF(TLB, "In protected mode.\n"); 5195140Sgblack@eecs.umich.edu Efer efer = tc->readMiscRegNoEffect(MISCREG_EFER); 5205140Sgblack@eecs.umich.edu SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR); 5215140Sgblack@eecs.umich.edu // If we're not in 64-bit mode, do protection/limit checks 5225140Sgblack@eecs.umich.edu if (!efer.lma || !csAttr.longMode) { 5235237Sgblack@eecs.umich.edu DPRINTF(TLB, "Not in long mode. Checking segment protection.\n"); 5245140Sgblack@eecs.umich.edu SegAttr attr = tc->readMiscRegNoEffect(MISCREG_SEG_ATTR(seg)); 5255140Sgblack@eecs.umich.edu if (!attr.writable && write) 5265140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5275140Sgblack@eecs.umich.edu if (!attr.readable && !write && !execute) 5285140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5295140Sgblack@eecs.umich.edu Addr base = tc->readMiscRegNoEffect(MISCREG_SEG_BASE(seg)); 5305140Sgblack@eecs.umich.edu Addr limit = tc->readMiscRegNoEffect(MISCREG_SEG_LIMIT(seg)); 5315140Sgblack@eecs.umich.edu if (!attr.expandDown) { 5325237Sgblack@eecs.umich.edu DPRINTF(TLB, "Checking an expand down segment.\n"); 5335140Sgblack@eecs.umich.edu // We don't have to worry about the access going around the 5345140Sgblack@eecs.umich.edu // end of memory because accesses will be broken up into 5355140Sgblack@eecs.umich.edu // pieces at boundaries aligned on sizes smaller than an 5365140Sgblack@eecs.umich.edu // entire address space. We do have to worry about the limit 5375140Sgblack@eecs.umich.edu // being less than the base. 5385140Sgblack@eecs.umich.edu if (limit < base) { 5395140Sgblack@eecs.umich.edu if (limit < vaddr + req->getSize() && vaddr < base) 5405140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5415140Sgblack@eecs.umich.edu } else { 5425140Sgblack@eecs.umich.edu if (limit < vaddr + req->getSize()) 5435140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5445140Sgblack@eecs.umich.edu } 5455140Sgblack@eecs.umich.edu } else { 5465140Sgblack@eecs.umich.edu if (limit < base) { 5475140Sgblack@eecs.umich.edu if (vaddr <= limit || vaddr + req->getSize() >= base) 5485140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5495140Sgblack@eecs.umich.edu } else { 5505140Sgblack@eecs.umich.edu if (vaddr <= limit && vaddr + req->getSize() >= base) 5515140Sgblack@eecs.umich.edu return new GeneralProtection(0); 5525140Sgblack@eecs.umich.edu } 5535140Sgblack@eecs.umich.edu } 5545140Sgblack@eecs.umich.edu } 5555140Sgblack@eecs.umich.edu // If paging is enabled, do the translation. 5565140Sgblack@eecs.umich.edu if (cr0.pg) { 5575237Sgblack@eecs.umich.edu DPRINTF(TLB, "Paging enabled.\n"); 5585140Sgblack@eecs.umich.edu // The vaddr already has the segment base applied. 5595140Sgblack@eecs.umich.edu TlbEntry *entry = lookup(vaddr); 5605140Sgblack@eecs.umich.edu if (!entry) { 5615140Sgblack@eecs.umich.edu return new TlbFault(vaddr); 5625140Sgblack@eecs.umich.edu } else { 5635140Sgblack@eecs.umich.edu // Do paging protection checks. 5645237Sgblack@eecs.umich.edu DPRINTF(TLB, "Entry found with paddr %#x, doing protection checks.\n", entry->paddr); 5655237Sgblack@eecs.umich.edu Addr paddr = entry->paddr | (vaddr & (entry->size-1)); 5665237Sgblack@eecs.umich.edu DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, paddr); 5675140Sgblack@eecs.umich.edu req->setPaddr(paddr); 5685140Sgblack@eecs.umich.edu } 5695140Sgblack@eecs.umich.edu } else { 5705140Sgblack@eecs.umich.edu //Use the address which already has segmentation applied. 5715237Sgblack@eecs.umich.edu DPRINTF(TLB, "Paging disabled.\n"); 5725237Sgblack@eecs.umich.edu DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, vaddr); 5735140Sgblack@eecs.umich.edu req->setPaddr(vaddr); 5745140Sgblack@eecs.umich.edu } 5755124Sgblack@eecs.umich.edu } else { 5765140Sgblack@eecs.umich.edu // Real mode 5775237Sgblack@eecs.umich.edu DPRINTF(TLB, "In real mode.\n"); 5785237Sgblack@eecs.umich.edu DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, vaddr); 5795140Sgblack@eecs.umich.edu req->setPaddr(vaddr); 5805124Sgblack@eecs.umich.edu } 5815086Sgblack@eecs.umich.edu return NoFault; 5825086Sgblack@eecs.umich.edu}; 5835086Sgblack@eecs.umich.edu 5845140Sgblack@eecs.umich.eduFault 5855140Sgblack@eecs.umich.eduDTB::translate(RequestPtr &req, ThreadContext *tc, bool write) 5865140Sgblack@eecs.umich.edu{ 5875140Sgblack@eecs.umich.edu return TLB::translate<FakeDTLBFault>(req, tc, write, false); 5885140Sgblack@eecs.umich.edu} 5895140Sgblack@eecs.umich.edu 5905140Sgblack@eecs.umich.eduFault 5915140Sgblack@eecs.umich.eduITB::translate(RequestPtr &req, ThreadContext *tc) 5925140Sgblack@eecs.umich.edu{ 5935140Sgblack@eecs.umich.edu return TLB::translate<FakeITLBFault>(req, tc, false, true); 5945140Sgblack@eecs.umich.edu} 5955140Sgblack@eecs.umich.edu 5965086Sgblack@eecs.umich.edu#if FULL_SYSTEM 5975086Sgblack@eecs.umich.edu 5985086Sgblack@eecs.umich.eduTick 5995086Sgblack@eecs.umich.eduDTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) 6005086Sgblack@eecs.umich.edu{ 6015100Ssaidi@eecs.umich.edu return tc->getCpuPtr()->ticks(1); 6025086Sgblack@eecs.umich.edu} 6035086Sgblack@eecs.umich.edu 6045086Sgblack@eecs.umich.eduTick 6055086Sgblack@eecs.umich.eduDTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) 6065086Sgblack@eecs.umich.edu{ 6075100Ssaidi@eecs.umich.edu return tc->getCpuPtr()->ticks(1); 6085086Sgblack@eecs.umich.edu} 6095086Sgblack@eecs.umich.edu 6105086Sgblack@eecs.umich.edu#endif 6115086Sgblack@eecs.umich.edu 6125086Sgblack@eecs.umich.eduvoid 6135086Sgblack@eecs.umich.eduTLB::serialize(std::ostream &os) 6145086Sgblack@eecs.umich.edu{ 6155086Sgblack@eecs.umich.edu} 6165086Sgblack@eecs.umich.edu 6175086Sgblack@eecs.umich.eduvoid 6185086Sgblack@eecs.umich.eduTLB::unserialize(Checkpoint *cp, const std::string §ion) 6195086Sgblack@eecs.umich.edu{ 6205086Sgblack@eecs.umich.edu} 6215086Sgblack@eecs.umich.edu 6225086Sgblack@eecs.umich.eduvoid 6235086Sgblack@eecs.umich.eduDTB::serialize(std::ostream &os) 6245086Sgblack@eecs.umich.edu{ 6255086Sgblack@eecs.umich.edu TLB::serialize(os); 6265086Sgblack@eecs.umich.edu} 6275086Sgblack@eecs.umich.edu 6285086Sgblack@eecs.umich.eduvoid 6295086Sgblack@eecs.umich.eduDTB::unserialize(Checkpoint *cp, const std::string §ion) 6305086Sgblack@eecs.umich.edu{ 6315086Sgblack@eecs.umich.edu TLB::unserialize(cp, section); 6325086Sgblack@eecs.umich.edu} 6335086Sgblack@eecs.umich.edu 6345086Sgblack@eecs.umich.edu/* end namespace X86ISA */ } 6355086Sgblack@eecs.umich.edu 6364997Sgblack@eecs.umich.eduX86ISA::ITB * 6374997Sgblack@eecs.umich.eduX86ITBParams::create() 6384997Sgblack@eecs.umich.edu{ 6395038Sgblack@eecs.umich.edu return new X86ISA::ITB(this); 6404997Sgblack@eecs.umich.edu} 6414997Sgblack@eecs.umich.edu 6424997Sgblack@eecs.umich.eduX86ISA::DTB * 6434997Sgblack@eecs.umich.eduX86DTBParams::create() 6444997Sgblack@eecs.umich.edu{ 6455038Sgblack@eecs.umich.edu return new X86ISA::DTB(this); 6464997Sgblack@eecs.umich.edu} 647