process.cc revision 6709
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32/* 33 * Copyright (c) 2007 The Hewlett-Packard Development Company 34 * All rights reserved. 35 * 36 * Redistribution and use of this software in source and binary forms, 37 * with or without modification, are permitted provided that the 38 * following conditions are met: 39 * 40 * The software must be used only for Non-Commercial Use which means any 41 * use which is NOT directed to receiving any direct monetary 42 * compensation for, or commercial advantage from such use. Illustrative 43 * examples of non-commercial use are academic research, personal study, 44 * teaching, education and corporate research & development. 45 * Illustrative examples of commercial use are distributing products for 46 * commercial advantage and providing services using the software for 47 * commercial advantage. 48 * 49 * If you wish to use this software or functionality therein that may be 50 * covered by patents for commercial use, please contact: 51 * Director of Intellectual Property Licensing 52 * Office of Strategy and Technology 53 * Hewlett-Packard Company 54 * 1501 Page Mill Road 55 * Palo Alto, California 94304 56 * 57 * Redistributions of source code must retain the above copyright notice, 58 * this list of conditions and the following disclaimer. Redistributions 59 * in binary form must reproduce the above copyright notice, this list of 60 * conditions and the following disclaimer in the documentation and/or 61 * other materials provided with the distribution. Neither the name of 62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 63 * contributors may be used to endorse or promote products derived from 64 * this software without specific prior written permission. No right of 65 * sublicense is granted herewith. Derivatives of the software and 66 * output created using the software may be prepared, but only for 67 * Non-Commercial Uses. Derivatives of the software may be shared with 68 * others provided: (i) the others agree to abide by the list of 69 * conditions herein which includes the Non-Commercial Use restrictions; 70 * and (ii) such Derivatives of the software include the above copyright 71 * notice to acknowledge the contribution from this software where 72 * applicable, this list of conditions and the disclaimer below. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 85 * 86 * Authors: Gabe Black 87 */ 88 89#include "arch/x86/isa_traits.hh" 90#include "arch/x86/miscregs.hh" 91#include "arch/x86/process.hh" 92#include "arch/x86/segmentregs.hh" 93#include "arch/x86/types.hh" 94#include "base/loader/object_file.hh" 95#include "base/loader/elf_object.hh" 96#include "base/misc.hh" 97#include "base/trace.hh" 98#include "cpu/thread_context.hh" 99#include "mem/page_table.hh" 100#include "mem/translating_port.hh" 101#include "sim/process_impl.hh" 102#include "sim/syscall_emul.hh" 103#include "sim/system.hh" 104 105using namespace std; 106using namespace X86ISA; 107 108static const int ArgumentReg[] = { 109 INTREG_RDI, 110 INTREG_RSI, 111 INTREG_RDX, 112 //This argument register is r10 for syscalls and rcx for C. 113 INTREG_R10W, 114 //INTREG_RCX, 115 INTREG_R8W, 116 INTREG_R9W 117}; 118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 119static const int ArgumentReg32[] = { 120 INTREG_EBX, 121 INTREG_ECX, 122 INTREG_EDX, 123 INTREG_ESI, 124 INTREG_EDI, 125}; 126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int); 127 128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile, 129 SyscallDesc *_syscallDescs, int _numSyscallDescs) : 130 LiveProcess(params, objFile), syscallDescs(_syscallDescs), 131 numSyscallDescs(_numSyscallDescs) 132{ 133 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 134 brk_point = roundUp(brk_point, VMPageSize); 135} 136 137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params, 138 ObjectFile *objFile, SyscallDesc *_syscallDescs, 139 int _numSyscallDescs) : 140 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 141{ 142 143 vsyscallPage.base = 0xffffffffff600000ULL; 144 vsyscallPage.size = VMPageSize; 145 vsyscallPage.vtimeOffset = 0x400; 146 vsyscallPage.vgettimeofdayOffset = 0x410; 147 148 // Set up stack. On X86_64 Linux, stack goes from the top of memory 149 // downward, less the hole for the kernel address space plus one page 150 // for undertermined purposes. 151 stack_base = (Addr)0x7FFFFFFFF000ULL; 152 153 // Set pointer for next thread stack. Reserve 8M for main stack. 154 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 155 156 // Set up region for mmaps. This was determined empirically and may not 157 // always be correct. 158 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL; 159} 160 161void 162I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc) 163{ 164 Addr eip = tc->readPC(); 165 if (eip >= vsyscallPage.base && 166 eip < vsyscallPage.base + vsyscallPage.size) { 167 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset); 168 } 169 X86LiveProcess::syscall(callnum, tc); 170} 171 172 173I386LiveProcess::I386LiveProcess(LiveProcessParams *params, 174 ObjectFile *objFile, SyscallDesc *_syscallDescs, 175 int _numSyscallDescs) : 176 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 177{ 178 _gdtStart = 0x100000000; 179 _gdtSize = VMPageSize; 180 181 vsyscallPage.base = 0xffffe000ULL; 182 vsyscallPage.size = VMPageSize; 183 vsyscallPage.vsyscallOffset = 0x400; 184 vsyscallPage.vsysexitOffset = 0x410; 185 186 stack_base = vsyscallPage.base; 187 188 // Set pointer for next thread stack. Reserve 8M for main stack. 189 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 190 191 // Set up region for mmaps. This was determined empirically and may not 192 // always be correct. 193 mmap_start = mmap_end = (Addr)0xf7ffe000ULL; 194} 195 196SyscallDesc* 197X86LiveProcess::getDesc(int callnum) 198{ 199 if (callnum < 0 || callnum >= numSyscallDescs) 200 return NULL; 201 return &syscallDescs[callnum]; 202} 203 204void 205X86_64LiveProcess::startup() 206{ 207 LiveProcess::startup(); 208 209 if (checkpointRestored) 210 return; 211 212 argsInit(sizeof(uint64_t), VMPageSize); 213 214 // Set up the vsyscall page for this process. 215 pTable->allocate(vsyscallPage.base, vsyscallPage.size); 216 uint8_t vtimeBlob[] = { 217 0x48,0xc7,0xc0,0xc9,0x00,0x00,0x00, // mov $0xc9,%rax 218 0x0f,0x05, // syscall 219 0xc3 // retq 220 }; 221 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset, 222 vtimeBlob, sizeof(vtimeBlob)); 223 224 uint8_t vgettimeofdayBlob[] = { 225 0x48,0xc7,0xc0,0x60,0x00,0x00,0x00, // mov $0x60,%rax 226 0x0f,0x05, // syscall 227 0xc3 // retq 228 }; 229 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset, 230 vgettimeofdayBlob, sizeof(vgettimeofdayBlob)); 231 232 for (int i = 0; i < contextIds.size(); i++) { 233 ThreadContext * tc = system->getThreadContext(contextIds[i]); 234 235 SegAttr dataAttr = 0; 236 dataAttr.dpl = 3; 237 dataAttr.unusable = 0; 238 dataAttr.defaultSize = 1; 239 dataAttr.longMode = 1; 240 dataAttr.avl = 0; 241 dataAttr.granularity = 1; 242 dataAttr.present = 1; 243 dataAttr.type = 3; 244 dataAttr.writable = 1; 245 dataAttr.readable = 1; 246 dataAttr.expandDown = 0; 247 dataAttr.system = 1; 248 249 //Initialize the segment registers. 250 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 251 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 252 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 253 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 254 } 255 256 SegAttr csAttr = 0; 257 csAttr.dpl = 3; 258 csAttr.unusable = 0; 259 csAttr.defaultSize = 0; 260 csAttr.longMode = 1; 261 csAttr.avl = 0; 262 csAttr.granularity = 1; 263 csAttr.present = 1; 264 csAttr.type = 10; 265 csAttr.writable = 0; 266 csAttr.readable = 1; 267 csAttr.expandDown = 0; 268 csAttr.system = 1; 269 270 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 271 272 Efer efer = 0; 273 efer.sce = 1; // Enable system call extensions. 274 efer.lme = 1; // Enable long mode. 275 efer.lma = 1; // Activate long mode. 276 efer.nxe = 1; // Enable nx support. 277 efer.svme = 0; // Disable svm support for now. It isn't implemented. 278 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 279 tc->setMiscReg(MISCREG_EFER, efer); 280 281 //Set up the registers that describe the operating mode. 282 CR0 cr0 = 0; 283 cr0.pg = 1; // Turn on paging. 284 cr0.cd = 0; // Don't disable caching. 285 cr0.nw = 0; // This is bit is defined to be ignored. 286 cr0.am = 0; // No alignment checking 287 cr0.wp = 0; // Supervisor mode can write read only pages 288 cr0.ne = 1; 289 cr0.et = 1; // This should always be 1 290 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 291 // would be pointless. 292 cr0.em = 0; // Allow x87 instructions to execute natively. 293 cr0.mp = 1; // This doesn't really matter, but the manual suggests 294 // setting it to one. 295 cr0.pe = 1; // We're definitely in protected mode. 296 tc->setMiscReg(MISCREG_CR0, cr0); 297 298 tc->setMiscReg(MISCREG_MXCSR, 0x1f80); 299 } 300} 301 302void 303I386LiveProcess::startup() 304{ 305 LiveProcess::startup(); 306 307 if (checkpointRestored) 308 return; 309 310 argsInit(sizeof(uint32_t), VMPageSize); 311 312 /* 313 * Set up a GDT for this process. The whole GDT wouldn't really be for 314 * this process, but the only parts we care about are. 315 */ 316 pTable->allocate(_gdtStart, _gdtSize); 317 uint64_t zero = 0; 318 assert(_gdtSize % sizeof(zero) == 0); 319 for (Addr gdtCurrent = _gdtStart; 320 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { 321 initVirtMem->write(gdtCurrent, zero); 322 } 323 324 // Set up the vsyscall page for this process. 325 pTable->allocate(vsyscallPage.base, vsyscallPage.size); 326 uint8_t vsyscallBlob[] = { 327 0x51, // push %ecx 328 0x52, // push %edp 329 0x55, // push %ebp 330 0x89, 0xe5, // mov %esp, %ebp 331 0x0f, 0x34 // sysenter 332 }; 333 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, 334 vsyscallBlob, sizeof(vsyscallBlob)); 335 336 uint8_t vsysexitBlob[] = { 337 0x5d, // pop %ebp 338 0x5a, // pop %edx 339 0x59, // pop %ecx 340 0xc3 // ret 341 }; 342 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, 343 vsysexitBlob, sizeof(vsysexitBlob)); 344 345 for (int i = 0; i < contextIds.size(); i++) { 346 ThreadContext * tc = system->getThreadContext(contextIds[i]); 347 348 SegAttr dataAttr = 0; 349 dataAttr.dpl = 3; 350 dataAttr.unusable = 0; 351 dataAttr.defaultSize = 1; 352 dataAttr.longMode = 0; 353 dataAttr.avl = 0; 354 dataAttr.granularity = 1; 355 dataAttr.present = 1; 356 dataAttr.type = 3; 357 dataAttr.writable = 1; 358 dataAttr.readable = 1; 359 dataAttr.expandDown = 0; 360 dataAttr.system = 1; 361 362 //Initialize the segment registers. 363 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 364 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 365 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 366 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 367 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB); 368 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1)); 369 } 370 371 SegAttr csAttr = 0; 372 csAttr.dpl = 3; 373 csAttr.unusable = 0; 374 csAttr.defaultSize = 1; 375 csAttr.longMode = 0; 376 csAttr.avl = 0; 377 csAttr.granularity = 1; 378 csAttr.present = 1; 379 csAttr.type = 0xa; 380 csAttr.writable = 0; 381 csAttr.readable = 1; 382 csAttr.expandDown = 0; 383 csAttr.system = 1; 384 385 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 386 387 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart); 388 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart); 389 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1); 390 391 // Set the LDT selector to 0 to deactivate it. 392 tc->setMiscRegNoEffect(MISCREG_TSL, 0); 393 394 Efer efer = 0; 395 efer.sce = 1; // Enable system call extensions. 396 efer.lme = 1; // Enable long mode. 397 efer.lma = 0; // Deactivate long mode. 398 efer.nxe = 1; // Enable nx support. 399 efer.svme = 0; // Disable svm support for now. It isn't implemented. 400 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 401 tc->setMiscReg(MISCREG_EFER, efer); 402 403 //Set up the registers that describe the operating mode. 404 CR0 cr0 = 0; 405 cr0.pg = 1; // Turn on paging. 406 cr0.cd = 0; // Don't disable caching. 407 cr0.nw = 0; // This is bit is defined to be ignored. 408 cr0.am = 0; // No alignment checking 409 cr0.wp = 0; // Supervisor mode can write read only pages 410 cr0.ne = 1; 411 cr0.et = 1; // This should always be 1 412 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 413 // would be pointless. 414 cr0.em = 0; // Allow x87 instructions to execute natively. 415 cr0.mp = 1; // This doesn't really matter, but the manual suggests 416 // setting it to one. 417 cr0.pe = 1; // We're definitely in protected mode. 418 tc->setMiscReg(MISCREG_CR0, cr0); 419 420 tc->setMiscReg(MISCREG_MXCSR, 0x1f80); 421 } 422} 423 424template<class IntType> 425void 426X86LiveProcess::argsInit(int pageSize, 427 std::vector<AuxVector<IntType> > extraAuxvs) 428{ 429 int intSize = sizeof(IntType); 430 431 typedef AuxVector<IntType> auxv_t; 432 std::vector<auxv_t> auxv = extraAuxvs; 433 434 string filename; 435 if(argv.size() < 1) 436 filename = ""; 437 else 438 filename = argv[0]; 439 440 //We want 16 byte alignment 441 uint64_t align = 16; 442 443 // load object file into target memory 444 objFile->loadSections(initVirtMem); 445 446 enum X86CpuFeature { 447 X86_OnboardFPU = 1 << 0, 448 X86_VirtualModeExtensions = 1 << 1, 449 X86_DebuggingExtensions = 1 << 2, 450 X86_PageSizeExtensions = 1 << 3, 451 452 X86_TimeStampCounter = 1 << 4, 453 X86_ModelSpecificRegisters = 1 << 5, 454 X86_PhysicalAddressExtensions = 1 << 6, 455 X86_MachineCheckExtensions = 1 << 7, 456 457 X86_CMPXCHG8Instruction = 1 << 8, 458 X86_OnboardAPIC = 1 << 9, 459 X86_SYSENTER_SYSEXIT = 1 << 11, 460 461 X86_MemoryTypeRangeRegisters = 1 << 12, 462 X86_PageGlobalEnable = 1 << 13, 463 X86_MachineCheckArchitecture = 1 << 14, 464 X86_CMOVInstruction = 1 << 15, 465 466 X86_PageAttributeTable = 1 << 16, 467 X86_36BitPSEs = 1 << 17, 468 X86_ProcessorSerialNumber = 1 << 18, 469 X86_CLFLUSHInstruction = 1 << 19, 470 471 X86_DebugTraceStore = 1 << 21, 472 X86_ACPIViaMSR = 1 << 22, 473 X86_MultimediaExtensions = 1 << 23, 474 475 X86_FXSAVE_FXRSTOR = 1 << 24, 476 X86_StreamingSIMDExtensions = 1 << 25, 477 X86_StreamingSIMDExtensions2 = 1 << 26, 478 X86_CPUSelfSnoop = 1 << 27, 479 480 X86_HyperThreading = 1 << 28, 481 X86_AutomaticClockControl = 1 << 29, 482 X86_IA64Processor = 1 << 30 483 }; 484 485 //Setup the auxilliary vectors. These will already have endian conversion. 486 //Auxilliary vectors are loaded only for elf formatted executables. 487 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 488 if(elfObject) 489 { 490 uint64_t features = 491 X86_OnboardFPU | 492 X86_VirtualModeExtensions | 493 X86_DebuggingExtensions | 494 X86_PageSizeExtensions | 495 X86_TimeStampCounter | 496 X86_ModelSpecificRegisters | 497 X86_PhysicalAddressExtensions | 498 X86_MachineCheckExtensions | 499 X86_CMPXCHG8Instruction | 500 X86_OnboardAPIC | 501 X86_SYSENTER_SYSEXIT | 502 X86_MemoryTypeRangeRegisters | 503 X86_PageGlobalEnable | 504 X86_MachineCheckArchitecture | 505 X86_CMOVInstruction | 506 X86_PageAttributeTable | 507 X86_36BitPSEs | 508// X86_ProcessorSerialNumber | 509 X86_CLFLUSHInstruction | 510// X86_DebugTraceStore | 511// X86_ACPIViaMSR | 512 X86_MultimediaExtensions | 513 X86_FXSAVE_FXRSTOR | 514 X86_StreamingSIMDExtensions | 515 X86_StreamingSIMDExtensions2 | 516// X86_CPUSelfSnoop | 517// X86_HyperThreading | 518// X86_AutomaticClockControl | 519// X86_IA64Processor | 520 0; 521 522 //Bits which describe the system hardware capabilities 523 //XXX Figure out what these should be 524 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 525 //The system page size 526 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 527 //Frequency at which times() increments 528 //Defined to be 100 in the kernel source. 529 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 530 // For statically linked executables, this is the virtual address of the 531 // program header tables if they appear in the executable image 532 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 533 // This is the size of a program header entry from the elf file. 534 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 535 // This is the number of program headers from the original elf file. 536 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 537 //This is the address of the elf "interpreter", It should be set 538 //to 0 for regular executables. It should be something else 539 //(not sure what) for dynamic libraries. 540 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 541 542 //XXX Figure out what this should be. 543 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 544 //The entry point to the program 545 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 546 //Different user and group IDs 547 auxv.push_back(auxv_t(M5_AT_UID, uid())); 548 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 549 auxv.push_back(auxv_t(M5_AT_GID, gid())); 550 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 551 //Whether to enable "secure mode" in the executable 552 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 553 //The string "x86_64" with unknown meaning 554 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 555 } 556 557 //Figure out how big the initial stack needs to be 558 559 // A sentry NULL void pointer at the top of the stack. 560 int sentry_size = intSize; 561 562 //This is the name of the file which is present on the initial stack 563 //It's purpose is to let the user space linker examine the original file. 564 int file_name_size = filename.size() + 1; 565 566 string platform = "x86_64"; 567 int aux_data_size = platform.size() + 1; 568 569 int env_data_size = 0; 570 for (int i = 0; i < envp.size(); ++i) { 571 env_data_size += envp[i].size() + 1; 572 } 573 int arg_data_size = 0; 574 for (int i = 0; i < argv.size(); ++i) { 575 arg_data_size += argv[i].size() + 1; 576 } 577 578 //The info_block needs to be padded so it's size is a multiple of the 579 //alignment mask. Also, it appears that there needs to be at least some 580 //padding, so if the size is already a multiple, we need to increase it 581 //anyway. 582 int base_info_block_size = 583 sentry_size + file_name_size + env_data_size + arg_data_size; 584 585 int info_block_size = roundUp(base_info_block_size, align); 586 587 int info_block_padding = info_block_size - base_info_block_size; 588 589 //Each auxilliary vector is two 8 byte words 590 int aux_array_size = intSize * 2 * (auxv.size() + 1); 591 592 int envp_array_size = intSize * (envp.size() + 1); 593 int argv_array_size = intSize * (argv.size() + 1); 594 595 int argc_size = intSize; 596 597 //Figure out the size of the contents of the actual initial frame 598 int frame_size = 599 aux_array_size + 600 envp_array_size + 601 argv_array_size + 602 argc_size; 603 604 //There needs to be padding after the auxiliary vector data so that the 605 //very bottom of the stack is aligned properly. 606 int partial_size = frame_size + aux_data_size; 607 int aligned_partial_size = roundUp(partial_size, align); 608 int aux_padding = aligned_partial_size - partial_size; 609 610 int space_needed = 611 info_block_size + 612 aux_data_size + 613 aux_padding + 614 frame_size; 615 616 stack_min = stack_base - space_needed; 617 stack_min = roundDown(stack_min, align); 618 stack_size = stack_base - stack_min; 619 620 // map memory 621 pTable->allocate(roundDown(stack_min, pageSize), 622 roundUp(stack_size, pageSize)); 623 624 // map out initial stack contents 625 IntType sentry_base = stack_base - sentry_size; 626 IntType file_name_base = sentry_base - file_name_size; 627 IntType env_data_base = file_name_base - env_data_size; 628 IntType arg_data_base = env_data_base - arg_data_size; 629 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size; 630 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding; 631 IntType envp_array_base = auxv_array_base - envp_array_size; 632 IntType argv_array_base = envp_array_base - argv_array_size; 633 IntType argc_base = argv_array_base - argc_size; 634 635 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 636 DPRINTF(Stack, "0x%x - file name\n", file_name_base); 637 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 638 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 639 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 640 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 641 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 642 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 643 DPRINTF(Stack, "0x%x - argc \n", argc_base); 644 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 645 646 // write contents to stack 647 648 // figure out argc 649 IntType argc = argv.size(); 650 IntType guestArgc = X86ISA::htog(argc); 651 652 //Write out the sentry void * 653 IntType sentry_NULL = 0; 654 initVirtMem->writeBlob(sentry_base, 655 (uint8_t*)&sentry_NULL, sentry_size); 656 657 //Write the file name 658 initVirtMem->writeString(file_name_base, filename.c_str()); 659 660 //Fix up the aux vector which points to the "platform" string 661 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM); 662 auxv[auxv.size() - 1].a_val = aux_data_base; 663 664 //Copy the aux stuff 665 for(int x = 0; x < auxv.size(); x++) 666 { 667 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 668 (uint8_t*)&(auxv[x].a_type), intSize); 669 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 670 (uint8_t*)&(auxv[x].a_val), intSize); 671 } 672 //Write out the terminating zeroed auxilliary vector 673 const uint64_t zero = 0; 674 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 675 (uint8_t*)&zero, 2 * intSize); 676 677 initVirtMem->writeString(aux_data_base, platform.c_str()); 678 679 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 680 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 681 682 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 683 684 ThreadContext *tc = system->getThreadContext(contextIds[0]); 685 //Set the stack pointer register 686 tc->setIntReg(StackPointerReg, stack_min); 687 688 Addr prog_entry = objFile->entryPoint(); 689 // There doesn't need to be any segment base added in since we're dealing 690 // with the flat segmentation model. 691 tc->setPC(prog_entry); 692 tc->setNextPC(prog_entry + sizeof(MachInst)); 693 694 //Align the "stack_min" to a page boundary. 695 stack_min = roundDown(stack_min, pageSize); 696 697// num_processes++; 698} 699 700void 701X86_64LiveProcess::argsInit(int intSize, int pageSize) 702{ 703 std::vector<AuxVector<uint64_t> > extraAuxvs; 704 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs); 705} 706 707void 708I386LiveProcess::argsInit(int intSize, int pageSize) 709{ 710 std::vector<AuxVector<uint32_t> > extraAuxvs; 711 //Tell the binary where the vsyscall part of the vsyscall page is. 712 extraAuxvs.push_back(AuxVector<uint32_t>(0x20, 713 vsyscallPage.base + vsyscallPage.vsyscallOffset)); 714 extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base)); 715 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs); 716} 717 718void 719X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) 720{ 721 tc->setIntReg(INTREG_RAX, return_value.value()); 722} 723 724X86ISA::IntReg 725X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 726{ 727 assert(i < NumArgumentRegs); 728 return tc->readIntReg(ArgumentReg[i++]); 729} 730 731void 732X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 733{ 734 assert(i < NumArgumentRegs); 735 return tc->setIntReg(ArgumentReg[i], val); 736} 737 738X86ISA::IntReg 739I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 740{ 741 assert(i < NumArgumentRegs32); 742 return tc->readIntReg(ArgumentReg32[i++]); 743} 744 745X86ISA::IntReg 746I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width) 747{ 748 assert(width == 32 || width == 64); 749 assert(i < NumArgumentRegs); 750 uint64_t retVal = tc->readIntReg(ArgumentReg32[i++]) & mask(32); 751 if (width == 64) 752 retVal |= ((uint64_t)tc->readIntReg(ArgumentReg[i++]) << 32); 753 return retVal; 754} 755 756void 757I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 758{ 759 assert(i < NumArgumentRegs); 760 return tc->setIntReg(ArgumentReg[i], val); 761} 762