process.cc revision 6222:9ee4a06a960b
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32/* 33 * Copyright (c) 2007 The Hewlett-Packard Development Company 34 * All rights reserved. 35 * 36 * Redistribution and use of this software in source and binary forms, 37 * with or without modification, are permitted provided that the 38 * following conditions are met: 39 * 40 * The software must be used only for Non-Commercial Use which means any 41 * use which is NOT directed to receiving any direct monetary 42 * compensation for, or commercial advantage from such use. Illustrative 43 * examples of non-commercial use are academic research, personal study, 44 * teaching, education and corporate research & development. 45 * Illustrative examples of commercial use are distributing products for 46 * commercial advantage and providing services using the software for 47 * commercial advantage. 48 * 49 * If you wish to use this software or functionality therein that may be 50 * covered by patents for commercial use, please contact: 51 * Director of Intellectual Property Licensing 52 * Office of Strategy and Technology 53 * Hewlett-Packard Company 54 * 1501 Page Mill Road 55 * Palo Alto, California 94304 56 * 57 * Redistributions of source code must retain the above copyright notice, 58 * this list of conditions and the following disclaimer. Redistributions 59 * in binary form must reproduce the above copyright notice, this list of 60 * conditions and the following disclaimer in the documentation and/or 61 * other materials provided with the distribution. Neither the name of 62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 63 * contributors may be used to endorse or promote products derived from 64 * this software without specific prior written permission. No right of 65 * sublicense is granted herewith. Derivatives of the software and 66 * output created using the software may be prepared, but only for 67 * Non-Commercial Uses. Derivatives of the software may be shared with 68 * others provided: (i) the others agree to abide by the list of 69 * conditions herein which includes the Non-Commercial Use restrictions; 70 * and (ii) such Derivatives of the software include the above copyright 71 * notice to acknowledge the contribution from this software where 72 * applicable, this list of conditions and the disclaimer below. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 85 * 86 * Authors: Gabe Black 87 */ 88 89#include "arch/x86/isa_traits.hh" 90#include "arch/x86/process.hh" 91#include "arch/x86/segmentregs.hh" 92#include "arch/x86/types.hh" 93#include "base/loader/object_file.hh" 94#include "base/loader/elf_object.hh" 95#include "base/misc.hh" 96#include "base/trace.hh" 97#include "cpu/thread_context.hh" 98#include "mem/page_table.hh" 99#include "mem/translating_port.hh" 100#include "sim/process_impl.hh" 101#include "sim/syscall_emul.hh" 102#include "sim/system.hh" 103 104using namespace std; 105using namespace X86ISA; 106 107static const int ArgumentReg[] = { 108 INTREG_RDI, 109 INTREG_RSI, 110 INTREG_RDX, 111 //This argument register is r10 for syscalls and rcx for C. 112 INTREG_R10W, 113 //INTREG_RCX, 114 INTREG_R8W, 115 INTREG_R9W 116}; 117static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 118static const int ArgumentReg32[] = { 119 INTREG_EBX, 120 INTREG_ECX, 121 INTREG_EDX, 122 INTREG_ESI, 123 INTREG_EDI, 124}; 125static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int); 126 127X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile, 128 SyscallDesc *_syscallDescs, int _numSyscallDescs) : 129 LiveProcess(params, objFile), syscallDescs(_syscallDescs), 130 numSyscallDescs(_numSyscallDescs) 131{ 132 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 133 brk_point = roundUp(brk_point, VMPageSize); 134} 135 136X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params, 137 ObjectFile *objFile, SyscallDesc *_syscallDescs, 138 int _numSyscallDescs) : 139 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 140{ 141 // Set up stack. On X86_64 Linux, stack goes from the top of memory 142 // downward, less the hole for the kernel address space plus one page 143 // for undertermined purposes. 144 stack_base = (Addr)0x7FFFFFFFF000ULL; 145 146 // Set pointer for next thread stack. Reserve 8M for main stack. 147 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 148 149 // Set up region for mmaps. This was determined empirically and may not 150 // always be correct. 151 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL; 152} 153 154void 155I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc) 156{ 157 Addr eip = tc->readPC(); 158 if (eip >= vsyscallPage.base && 159 eip < vsyscallPage.base + vsyscallPage.size) { 160 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset); 161 } 162 X86LiveProcess::syscall(callnum, tc); 163} 164 165 166I386LiveProcess::I386LiveProcess(LiveProcessParams *params, 167 ObjectFile *objFile, SyscallDesc *_syscallDescs, 168 int _numSyscallDescs) : 169 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 170{ 171 _gdtStart = 0x100000000; 172 _gdtSize = VMPageSize; 173 174 vsyscallPage.base = 0xffffe000ULL; 175 vsyscallPage.size = VMPageSize; 176 vsyscallPage.vsyscallOffset = 0x400; 177 vsyscallPage.vsysexitOffset = 0x410; 178 179 stack_base = vsyscallPage.base; 180 181 // Set pointer for next thread stack. Reserve 8M for main stack. 182 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 183 184 // Set up region for mmaps. This was determined empirically and may not 185 // always be correct. 186 mmap_start = mmap_end = (Addr)0xf7ffd000ULL; 187} 188 189SyscallDesc* 190X86LiveProcess::getDesc(int callnum) 191{ 192 if (callnum < 0 || callnum >= numSyscallDescs) 193 return NULL; 194 return &syscallDescs[callnum]; 195} 196 197void 198X86_64LiveProcess::startup() 199{ 200 LiveProcess::startup(); 201 202 if (checkpointRestored) 203 return; 204 205 argsInit(sizeof(uint64_t), VMPageSize); 206 207 for (int i = 0; i < contextIds.size(); i++) { 208 ThreadContext * tc = system->getThreadContext(contextIds[i]); 209 210 SegAttr dataAttr = 0; 211 dataAttr.dpl = 3; 212 dataAttr.unusable = 0; 213 dataAttr.defaultSize = 1; 214 dataAttr.longMode = 1; 215 dataAttr.avl = 0; 216 dataAttr.granularity = 1; 217 dataAttr.present = 1; 218 dataAttr.type = 3; 219 dataAttr.writable = 1; 220 dataAttr.readable = 1; 221 dataAttr.expandDown = 0; 222 dataAttr.system = 1; 223 224 //Initialize the segment registers. 225 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 226 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 227 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 228 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 229 } 230 231 SegAttr csAttr = 0; 232 csAttr.dpl = 3; 233 csAttr.unusable = 0; 234 csAttr.defaultSize = 0; 235 csAttr.longMode = 1; 236 csAttr.avl = 0; 237 csAttr.granularity = 1; 238 csAttr.present = 1; 239 csAttr.type = 10; 240 csAttr.writable = 0; 241 csAttr.readable = 1; 242 csAttr.expandDown = 0; 243 csAttr.system = 1; 244 245 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 246 247 Efer efer = 0; 248 efer.sce = 1; // Enable system call extensions. 249 efer.lme = 1; // Enable long mode. 250 efer.lma = 1; // Activate long mode. 251 efer.nxe = 1; // Enable nx support. 252 efer.svme = 0; // Disable svm support for now. It isn't implemented. 253 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 254 tc->setMiscReg(MISCREG_EFER, efer); 255 256 //Set up the registers that describe the operating mode. 257 CR0 cr0 = 0; 258 cr0.pg = 1; // Turn on paging. 259 cr0.cd = 0; // Don't disable caching. 260 cr0.nw = 0; // This is bit is defined to be ignored. 261 cr0.am = 0; // No alignment checking 262 cr0.wp = 0; // Supervisor mode can write read only pages 263 cr0.ne = 1; 264 cr0.et = 1; // This should always be 1 265 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 266 // would be pointless. 267 cr0.em = 0; // Allow x87 instructions to execute natively. 268 cr0.mp = 1; // This doesn't really matter, but the manual suggests 269 // setting it to one. 270 cr0.pe = 1; // We're definitely in protected mode. 271 tc->setMiscReg(MISCREG_CR0, cr0); 272 } 273} 274 275void 276I386LiveProcess::startup() 277{ 278 LiveProcess::startup(); 279 280 if (checkpointRestored) 281 return; 282 283 argsInit(sizeof(uint32_t), VMPageSize); 284 285 /* 286 * Set up a GDT for this process. The whole GDT wouldn't really be for 287 * this process, but the only parts we care about are. 288 */ 289 pTable->allocate(_gdtStart, _gdtSize); 290 uint64_t zero = 0; 291 assert(_gdtSize % sizeof(zero) == 0); 292 for (Addr gdtCurrent = _gdtStart; 293 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { 294 initVirtMem->write(gdtCurrent, zero); 295 } 296 297 // Set up the vsyscall page for this process. 298 pTable->allocate(vsyscallPage.base, vsyscallPage.size); 299 uint8_t vsyscallBlob[] = { 300 0x51, // push %ecx 301 0x52, // push %edp 302 0x55, // push %ebp 303 0x89, 0xe5, // mov %esp, %ebp 304 0x0f, 0x34 // sysenter 305 }; 306 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, 307 vsyscallBlob, sizeof(vsyscallBlob)); 308 309 uint8_t vsysexitBlob[] = { 310 0x5d, // pop %ebp 311 0x5a, // pop %edx 312 0x59, // pop %ecx 313 0xc3 // ret 314 }; 315 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, 316 vsysexitBlob, sizeof(vsysexitBlob)); 317 318 for (int i = 0; i < contextIds.size(); i++) { 319 ThreadContext * tc = system->getThreadContext(contextIds[i]); 320 321 SegAttr dataAttr = 0; 322 dataAttr.dpl = 3; 323 dataAttr.unusable = 0; 324 dataAttr.defaultSize = 1; 325 dataAttr.longMode = 0; 326 dataAttr.avl = 0; 327 dataAttr.granularity = 1; 328 dataAttr.present = 1; 329 dataAttr.type = 3; 330 dataAttr.writable = 1; 331 dataAttr.readable = 1; 332 dataAttr.expandDown = 0; 333 dataAttr.system = 1; 334 335 //Initialize the segment registers. 336 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 337 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 338 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 339 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 340 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB); 341 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1)); 342 } 343 344 SegAttr csAttr = 0; 345 csAttr.dpl = 3; 346 csAttr.unusable = 0; 347 csAttr.defaultSize = 1; 348 csAttr.longMode = 0; 349 csAttr.avl = 0; 350 csAttr.granularity = 1; 351 csAttr.present = 1; 352 csAttr.type = 0xa; 353 csAttr.writable = 0; 354 csAttr.readable = 1; 355 csAttr.expandDown = 0; 356 csAttr.system = 1; 357 358 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 359 360 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart); 361 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart); 362 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1); 363 364 // Set the LDT selector to 0 to deactivate it. 365 tc->setMiscRegNoEffect(MISCREG_TSL, 0); 366 367 Efer efer = 0; 368 efer.sce = 1; // Enable system call extensions. 369 efer.lme = 1; // Enable long mode. 370 efer.lma = 0; // Deactivate long mode. 371 efer.nxe = 1; // Enable nx support. 372 efer.svme = 0; // Disable svm support for now. It isn't implemented. 373 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 374 tc->setMiscReg(MISCREG_EFER, efer); 375 376 //Set up the registers that describe the operating mode. 377 CR0 cr0 = 0; 378 cr0.pg = 1; // Turn on paging. 379 cr0.cd = 0; // Don't disable caching. 380 cr0.nw = 0; // This is bit is defined to be ignored. 381 cr0.am = 0; // No alignment checking 382 cr0.wp = 0; // Supervisor mode can write read only pages 383 cr0.ne = 1; 384 cr0.et = 1; // This should always be 1 385 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 386 // would be pointless. 387 cr0.em = 0; // Allow x87 instructions to execute natively. 388 cr0.mp = 1; // This doesn't really matter, but the manual suggests 389 // setting it to one. 390 cr0.pe = 1; // We're definitely in protected mode. 391 tc->setMiscReg(MISCREG_CR0, cr0); 392 } 393} 394 395template<class IntType> 396void 397X86LiveProcess::argsInit(int pageSize, 398 std::vector<AuxVector<IntType> > extraAuxvs) 399{ 400 int intSize = sizeof(IntType); 401 402 typedef AuxVector<IntType> auxv_t; 403 std::vector<auxv_t> auxv = extraAuxvs; 404 405 string filename; 406 if(argv.size() < 1) 407 filename = ""; 408 else 409 filename = argv[0]; 410 411 //We want 16 byte alignment 412 uint64_t align = 16; 413 414 // load object file into target memory 415 objFile->loadSections(initVirtMem); 416 417 enum X86CpuFeature { 418 X86_OnboardFPU = 1 << 0, 419 X86_VirtualModeExtensions = 1 << 1, 420 X86_DebuggingExtensions = 1 << 2, 421 X86_PageSizeExtensions = 1 << 3, 422 423 X86_TimeStampCounter = 1 << 4, 424 X86_ModelSpecificRegisters = 1 << 5, 425 X86_PhysicalAddressExtensions = 1 << 6, 426 X86_MachineCheckExtensions = 1 << 7, 427 428 X86_CMPXCHG8Instruction = 1 << 8, 429 X86_OnboardAPIC = 1 << 9, 430 X86_SYSENTER_SYSEXIT = 1 << 11, 431 432 X86_MemoryTypeRangeRegisters = 1 << 12, 433 X86_PageGlobalEnable = 1 << 13, 434 X86_MachineCheckArchitecture = 1 << 14, 435 X86_CMOVInstruction = 1 << 15, 436 437 X86_PageAttributeTable = 1 << 16, 438 X86_36BitPSEs = 1 << 17, 439 X86_ProcessorSerialNumber = 1 << 18, 440 X86_CLFLUSHInstruction = 1 << 19, 441 442 X86_DebugTraceStore = 1 << 21, 443 X86_ACPIViaMSR = 1 << 22, 444 X86_MultimediaExtensions = 1 << 23, 445 446 X86_FXSAVE_FXRSTOR = 1 << 24, 447 X86_StreamingSIMDExtensions = 1 << 25, 448 X86_StreamingSIMDExtensions2 = 1 << 26, 449 X86_CPUSelfSnoop = 1 << 27, 450 451 X86_HyperThreading = 1 << 28, 452 X86_AutomaticClockControl = 1 << 29, 453 X86_IA64Processor = 1 << 30 454 }; 455 456 //Setup the auxilliary vectors. These will already have endian conversion. 457 //Auxilliary vectors are loaded only for elf formatted executables. 458 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 459 if(elfObject) 460 { 461 uint64_t features = 462 X86_OnboardFPU | 463 X86_VirtualModeExtensions | 464 X86_DebuggingExtensions | 465 X86_PageSizeExtensions | 466 X86_TimeStampCounter | 467 X86_ModelSpecificRegisters | 468 X86_PhysicalAddressExtensions | 469 X86_MachineCheckExtensions | 470 X86_CMPXCHG8Instruction | 471 X86_OnboardAPIC | 472 X86_SYSENTER_SYSEXIT | 473 X86_MemoryTypeRangeRegisters | 474 X86_PageGlobalEnable | 475 X86_MachineCheckArchitecture | 476 X86_CMOVInstruction | 477 X86_PageAttributeTable | 478 X86_36BitPSEs | 479// X86_ProcessorSerialNumber | 480 X86_CLFLUSHInstruction | 481// X86_DebugTraceStore | 482// X86_ACPIViaMSR | 483 X86_MultimediaExtensions | 484 X86_FXSAVE_FXRSTOR | 485 X86_StreamingSIMDExtensions | 486 X86_StreamingSIMDExtensions2 | 487// X86_CPUSelfSnoop | 488// X86_HyperThreading | 489// X86_AutomaticClockControl | 490// X86_IA64Processor | 491 0; 492 493 //Bits which describe the system hardware capabilities 494 //XXX Figure out what these should be 495 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 496 //The system page size 497 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 498 //Frequency at which times() increments 499 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 500 // For statically linked executables, this is the virtual address of the 501 // program header tables if they appear in the executable image 502 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 503 // This is the size of a program header entry from the elf file. 504 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 505 // This is the number of program headers from the original elf file. 506 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 507 //Defined to be 100 in the kernel source. 508 //This is the address of the elf "interpreter", It should be set 509 //to 0 for regular executables. It should be something else 510 //(not sure what) for dynamic libraries. 511 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 512 513 //XXX Figure out what this should be. 514 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 515 //The entry point to the program 516 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 517 //Different user and group IDs 518 auxv.push_back(auxv_t(M5_AT_UID, uid())); 519 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 520 auxv.push_back(auxv_t(M5_AT_GID, gid())); 521 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 522 //Whether to enable "secure mode" in the executable 523 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 524 //The string "x86_64" with unknown meaning 525 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 526 } 527 528 //Figure out how big the initial stack needs to be 529 530 // A sentry NULL void pointer at the top of the stack. 531 int sentry_size = intSize; 532 533 //This is the name of the file which is present on the initial stack 534 //It's purpose is to let the user space linker examine the original file. 535 int file_name_size = filename.size() + 1; 536 537 string platform = "x86_64"; 538 int aux_data_size = platform.size() + 1; 539 540 int env_data_size = 0; 541 for (int i = 0; i < envp.size(); ++i) { 542 env_data_size += envp[i].size() + 1; 543 } 544 int arg_data_size = 0; 545 for (int i = 0; i < argv.size(); ++i) { 546 arg_data_size += argv[i].size() + 1; 547 } 548 549 //The info_block needs to be padded so it's size is a multiple of the 550 //alignment mask. Also, it appears that there needs to be at least some 551 //padding, so if the size is already a multiple, we need to increase it 552 //anyway. 553 int base_info_block_size = 554 sentry_size + file_name_size + env_data_size + arg_data_size; 555 556 int info_block_size = roundUp(base_info_block_size, align); 557 558 int info_block_padding = info_block_size - base_info_block_size; 559 560 //Each auxilliary vector is two 8 byte words 561 int aux_array_size = intSize * 2 * (auxv.size() + 1); 562 563 int envp_array_size = intSize * (envp.size() + 1); 564 int argv_array_size = intSize * (argv.size() + 1); 565 566 int argc_size = intSize; 567 568 //Figure out the size of the contents of the actual initial frame 569 int frame_size = 570 aux_array_size + 571 envp_array_size + 572 argv_array_size + 573 argc_size; 574 575 //There needs to be padding after the auxiliary vector data so that the 576 //very bottom of the stack is aligned properly. 577 int partial_size = frame_size + aux_data_size; 578 int aligned_partial_size = roundUp(partial_size, align); 579 int aux_padding = aligned_partial_size - partial_size; 580 581 int space_needed = 582 info_block_size + 583 aux_data_size + 584 aux_padding + 585 frame_size; 586 587 stack_min = stack_base - space_needed; 588 stack_min = roundDown(stack_min, align); 589 stack_size = stack_base - stack_min; 590 591 // map memory 592 pTable->allocate(roundDown(stack_min, pageSize), 593 roundUp(stack_size, pageSize)); 594 595 // map out initial stack contents 596 IntType sentry_base = stack_base - sentry_size; 597 IntType file_name_base = sentry_base - file_name_size; 598 IntType env_data_base = file_name_base - env_data_size; 599 IntType arg_data_base = env_data_base - arg_data_size; 600 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size; 601 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding; 602 IntType envp_array_base = auxv_array_base - envp_array_size; 603 IntType argv_array_base = envp_array_base - argv_array_size; 604 IntType argc_base = argv_array_base - argc_size; 605 606 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 607 DPRINTF(Stack, "0x%x - file name\n", file_name_base); 608 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 609 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 610 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 611 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 612 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 613 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 614 DPRINTF(Stack, "0x%x - argc \n", argc_base); 615 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 616 617 // write contents to stack 618 619 // figure out argc 620 IntType argc = argv.size(); 621 IntType guestArgc = X86ISA::htog(argc); 622 623 //Write out the sentry void * 624 IntType sentry_NULL = 0; 625 initVirtMem->writeBlob(sentry_base, 626 (uint8_t*)&sentry_NULL, sentry_size); 627 628 //Write the file name 629 initVirtMem->writeString(file_name_base, filename.c_str()); 630 631 //Fix up the aux vector which points to the "platform" string 632 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM); 633 auxv[auxv.size() - 1].a_val = aux_data_base; 634 635 //Copy the aux stuff 636 for(int x = 0; x < auxv.size(); x++) 637 { 638 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 639 (uint8_t*)&(auxv[x].a_type), intSize); 640 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 641 (uint8_t*)&(auxv[x].a_val), intSize); 642 } 643 //Write out the terminating zeroed auxilliary vector 644 const uint64_t zero = 0; 645 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 646 (uint8_t*)&zero, 2 * intSize); 647 648 initVirtMem->writeString(aux_data_base, platform.c_str()); 649 650 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 651 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 652 653 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 654 655 ThreadContext *tc = system->getThreadContext(contextIds[0]); 656 //Set the stack pointer register 657 tc->setIntReg(StackPointerReg, stack_min); 658 659 Addr prog_entry = objFile->entryPoint(); 660 // There doesn't need to be any segment base added in since we're dealing 661 // with the flat segmentation model. 662 tc->setPC(prog_entry); 663 tc->setNextPC(prog_entry + sizeof(MachInst)); 664 665 //Align the "stack_min" to a page boundary. 666 stack_min = roundDown(stack_min, pageSize); 667 668// num_processes++; 669} 670 671void 672X86_64LiveProcess::argsInit(int intSize, int pageSize) 673{ 674 std::vector<AuxVector<uint64_t> > extraAuxvs; 675 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs); 676} 677 678void 679I386LiveProcess::argsInit(int intSize, int pageSize) 680{ 681 std::vector<AuxVector<uint32_t> > extraAuxvs; 682 //Tell the binary where the vsyscall part of the vsyscall page is. 683 extraAuxvs.push_back(AuxVector<uint32_t>(0x20, 684 vsyscallPage.base + vsyscallPage.vsyscallOffset)); 685 extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base)); 686 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs); 687} 688 689void 690X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) 691{ 692 tc->setIntReg(INTREG_RAX, return_value.value()); 693} 694 695X86ISA::IntReg 696X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i) 697{ 698 assert(i < NumArgumentRegs); 699 return tc->readIntReg(ArgumentReg[i]); 700} 701 702void 703X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 704{ 705 assert(i < NumArgumentRegs); 706 return tc->setIntReg(ArgumentReg[i], val); 707} 708 709X86ISA::IntReg 710I386LiveProcess::getSyscallArg(ThreadContext *tc, int i) 711{ 712 assert(i < NumArgumentRegs32); 713 return tc->readIntReg(ArgumentReg32[i]); 714} 715 716void 717I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 718{ 719 assert(i < NumArgumentRegs); 720 return tc->setIntReg(ArgumentReg[i], val); 721} 722