process.cc revision 6110:5051aafec8d5
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32/* 33 * Copyright (c) 2007 The Hewlett-Packard Development Company 34 * All rights reserved. 35 * 36 * Redistribution and use of this software in source and binary forms, 37 * with or without modification, are permitted provided that the 38 * following conditions are met: 39 * 40 * The software must be used only for Non-Commercial Use which means any 41 * use which is NOT directed to receiving any direct monetary 42 * compensation for, or commercial advantage from such use. Illustrative 43 * examples of non-commercial use are academic research, personal study, 44 * teaching, education and corporate research & development. 45 * Illustrative examples of commercial use are distributing products for 46 * commercial advantage and providing services using the software for 47 * commercial advantage. 48 * 49 * If you wish to use this software or functionality therein that may be 50 * covered by patents for commercial use, please contact: 51 * Director of Intellectual Property Licensing 52 * Office of Strategy and Technology 53 * Hewlett-Packard Company 54 * 1501 Page Mill Road 55 * Palo Alto, California 94304 56 * 57 * Redistributions of source code must retain the above copyright notice, 58 * this list of conditions and the following disclaimer. Redistributions 59 * in binary form must reproduce the above copyright notice, this list of 60 * conditions and the following disclaimer in the documentation and/or 61 * other materials provided with the distribution. Neither the name of 62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 63 * contributors may be used to endorse or promote products derived from 64 * this software without specific prior written permission. No right of 65 * sublicense is granted herewith. Derivatives of the software and 66 * output created using the software may be prepared, but only for 67 * Non-Commercial Uses. Derivatives of the software may be shared with 68 * others provided: (i) the others agree to abide by the list of 69 * conditions herein which includes the Non-Commercial Use restrictions; 70 * and (ii) such Derivatives of the software include the above copyright 71 * notice to acknowledge the contribution from this software where 72 * applicable, this list of conditions and the disclaimer below. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 85 * 86 * Authors: Gabe Black 87 */ 88 89#include "arch/x86/isa_traits.hh" 90#include "arch/x86/process.hh" 91#include "arch/x86/segmentregs.hh" 92#include "arch/x86/types.hh" 93#include "base/loader/object_file.hh" 94#include "base/loader/elf_object.hh" 95#include "base/misc.hh" 96#include "base/trace.hh" 97#include "cpu/thread_context.hh" 98#include "mem/page_table.hh" 99#include "mem/translating_port.hh" 100#include "sim/process_impl.hh" 101#include "sim/syscall_emul.hh" 102#include "sim/system.hh" 103 104using namespace std; 105using namespace X86ISA; 106 107static const int ArgumentReg[] = { 108 INTREG_RDI, 109 INTREG_RSI, 110 INTREG_RDX, 111 //This argument register is r10 for syscalls and rcx for C. 112 INTREG_R10W, 113 //INTREG_RCX, 114 INTREG_R8W, 115 INTREG_R9W 116}; 117static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 118static const int ArgumentReg32[] = { 119 INTREG_EBX, 120 INTREG_ECX, 121 INTREG_EDX, 122 INTREG_ESI, 123 INTREG_EDI, 124}; 125static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int); 126 127X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile, 128 SyscallDesc *_syscallDescs, int _numSyscallDescs) : 129 LiveProcess(params, objFile), syscallDescs(_syscallDescs), 130 numSyscallDescs(_numSyscallDescs) 131{ 132 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 133 brk_point = roundUp(brk_point, VMPageSize); 134} 135 136X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params, 137 ObjectFile *objFile, SyscallDesc *_syscallDescs, 138 int _numSyscallDescs) : 139 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 140{ 141 // Set up stack. On X86_64 Linux, stack goes from the top of memory 142 // downward, less the hole for the kernel address space plus one page 143 // for undertermined purposes. 144 stack_base = (Addr)0x7FFFFFFFF000ULL; 145 146 // Set pointer for next thread stack. Reserve 8M for main stack. 147 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 148 149 // Set up region for mmaps. This was determined empirically and may not 150 // always be correct. 151 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL; 152} 153 154void 155I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc) 156{ 157 Addr eip = tc->readPC(); 158 if (eip >= vsyscallPage.base && 159 eip < vsyscallPage.base + vsyscallPage.size) { 160 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset); 161 } 162 X86LiveProcess::syscall(callnum, tc); 163} 164 165 166I386LiveProcess::I386LiveProcess(LiveProcessParams *params, 167 ObjectFile *objFile, SyscallDesc *_syscallDescs, 168 int _numSyscallDescs) : 169 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 170{ 171 _gdtStart = 0x100000000; 172 _gdtSize = VMPageSize; 173 174 vsyscallPage.base = 0xffffe000ULL; 175 vsyscallPage.size = VMPageSize; 176 vsyscallPage.vsyscallOffset = 0x400; 177 vsyscallPage.vsysexitOffset = 0x410; 178 179 stack_base = vsyscallPage.base; 180 181 // Set pointer for next thread stack. Reserve 8M for main stack. 182 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 183 184 // Set up region for mmaps. This was determined empirically and may not 185 // always be correct. 186 mmap_start = mmap_end = (Addr)0xf7ffd000ULL; 187} 188 189SyscallDesc* 190X86LiveProcess::getDesc(int callnum) 191{ 192 if (callnum < 0 || callnum >= numSyscallDescs) 193 return NULL; 194 return &syscallDescs[callnum]; 195} 196 197void 198X86_64LiveProcess::startup() 199{ 200 LiveProcess::startup(); 201 202 if (checkpointRestored) 203 return; 204 205 argsInit(sizeof(uint64_t), VMPageSize); 206 207 for (int i = 0; i < contextIds.size(); i++) { 208 ThreadContext * tc = system->getThreadContext(contextIds[i]); 209 210 SegAttr dataAttr = 0; 211 dataAttr.writable = 1; 212 dataAttr.readable = 1; 213 dataAttr.expandDown = 0; 214 dataAttr.dpl = 3; 215 dataAttr.defaultSize = 0; 216 dataAttr.longMode = 1; 217 218 //Initialize the segment registers. 219 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 220 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 221 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 222 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 223 } 224 225 SegAttr csAttr = 0; 226 csAttr.writable = 0; 227 csAttr.readable = 1; 228 csAttr.expandDown = 0; 229 csAttr.dpl = 3; 230 csAttr.defaultSize = 0; 231 csAttr.longMode = 1; 232 233 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 234 235 //Set up the registers that describe the operating mode. 236 CR0 cr0 = 0; 237 cr0.pg = 1; // Turn on paging. 238 cr0.cd = 0; // Don't disable caching. 239 cr0.nw = 0; // This is bit is defined to be ignored. 240 cr0.am = 0; // No alignment checking 241 cr0.wp = 0; // Supervisor mode can write read only pages 242 cr0.ne = 1; 243 cr0.et = 1; // This should always be 1 244 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 245 // would be pointless. 246 cr0.em = 0; // Allow x87 instructions to execute natively. 247 cr0.mp = 1; // This doesn't really matter, but the manual suggests 248 // setting it to one. 249 cr0.pe = 1; // We're definitely in protected mode. 250 tc->setMiscReg(MISCREG_CR0, cr0); 251 252 Efer efer = 0; 253 efer.sce = 1; // Enable system call extensions. 254 efer.lme = 1; // Enable long mode. 255 efer.lma = 1; // Activate long mode. 256 efer.nxe = 1; // Enable nx support. 257 efer.svme = 0; // Disable svm support for now. It isn't implemented. 258 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 259 tc->setMiscReg(MISCREG_EFER, efer); 260 } 261} 262 263void 264I386LiveProcess::startup() 265{ 266 LiveProcess::startup(); 267 268 if (checkpointRestored) 269 return; 270 271 argsInit(sizeof(uint32_t), VMPageSize); 272 273 /* 274 * Set up a GDT for this process. The whole GDT wouldn't really be for 275 * this process, but the only parts we care about are. 276 */ 277 pTable->allocate(_gdtStart, _gdtSize); 278 uint64_t zero = 0; 279 assert(_gdtSize % sizeof(zero) == 0); 280 for (Addr gdtCurrent = _gdtStart; 281 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { 282 initVirtMem->write(gdtCurrent, zero); 283 } 284 285 // Set up the vsyscall page for this process. 286 pTable->allocate(vsyscallPage.base, vsyscallPage.size); 287 uint8_t vsyscallBlob[] = { 288 0x51, // push %ecx 289 0x52, // push %edp 290 0x55, // push %ebp 291 0x89, 0xe5, // mov %esp, %ebp 292 0x0f, 0x34 // sysenter 293 }; 294 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, 295 vsyscallBlob, sizeof(vsyscallBlob)); 296 297 uint8_t vsysexitBlob[] = { 298 0x5d, // pop %ebp 299 0x5a, // pop %edx 300 0x59, // pop %ecx 301 0xc3 // ret 302 }; 303 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, 304 vsysexitBlob, sizeof(vsysexitBlob)); 305 306 for (int i = 0; i < contextIds.size(); i++) { 307 ThreadContext * tc = system->getThreadContext(contextIds[i]); 308 309 SegAttr dataAttr = 0; 310 dataAttr.writable = 1; 311 dataAttr.readable = 1; 312 dataAttr.expandDown = 0; 313 dataAttr.dpl = 3; 314 dataAttr.defaultSize = 1; 315 dataAttr.longMode = 0; 316 317 //Initialize the segment registers. 318 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 319 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 320 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 321 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 322 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB); 323 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1)); 324 } 325 326 SegAttr csAttr = 0; 327 csAttr.writable = 0; 328 csAttr.readable = 1; 329 csAttr.expandDown = 0; 330 csAttr.dpl = 3; 331 csAttr.defaultSize = 1; 332 csAttr.longMode = 0; 333 334 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 335 336 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart); 337 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart); 338 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1); 339 340 // Set the LDT selector to 0 to deactivate it. 341 tc->setMiscRegNoEffect(MISCREG_TSL, 0); 342 343 //Set up the registers that describe the operating mode. 344 CR0 cr0 = 0; 345 cr0.pg = 1; // Turn on paging. 346 cr0.cd = 0; // Don't disable caching. 347 cr0.nw = 0; // This is bit is defined to be ignored. 348 cr0.am = 0; // No alignment checking 349 cr0.wp = 0; // Supervisor mode can write read only pages 350 cr0.ne = 1; 351 cr0.et = 1; // This should always be 1 352 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 353 // would be pointless. 354 cr0.em = 0; // Allow x87 instructions to execute natively. 355 cr0.mp = 1; // This doesn't really matter, but the manual suggests 356 // setting it to one. 357 cr0.pe = 1; // We're definitely in protected mode. 358 tc->setMiscReg(MISCREG_CR0, cr0); 359 360 Efer efer = 0; 361 efer.sce = 1; // Enable system call extensions. 362 efer.lme = 1; // Enable long mode. 363 efer.lma = 0; // Deactivate long mode. 364 efer.nxe = 1; // Enable nx support. 365 efer.svme = 0; // Disable svm support for now. It isn't implemented. 366 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 367 tc->setMiscReg(MISCREG_EFER, efer); 368 } 369} 370 371template<class IntType> 372void 373X86LiveProcess::argsInit(int pageSize, 374 std::vector<AuxVector<IntType> > extraAuxvs) 375{ 376 int intSize = sizeof(IntType); 377 378 typedef AuxVector<IntType> auxv_t; 379 std::vector<auxv_t> auxv = extraAuxvs; 380 381 string filename; 382 if(argv.size() < 1) 383 filename = ""; 384 else 385 filename = argv[0]; 386 387 //We want 16 byte alignment 388 uint64_t align = 16; 389 390 // load object file into target memory 391 objFile->loadSections(initVirtMem); 392 393 enum X86CpuFeature { 394 X86_OnboardFPU = 1 << 0, 395 X86_VirtualModeExtensions = 1 << 1, 396 X86_DebuggingExtensions = 1 << 2, 397 X86_PageSizeExtensions = 1 << 3, 398 399 X86_TimeStampCounter = 1 << 4, 400 X86_ModelSpecificRegisters = 1 << 5, 401 X86_PhysicalAddressExtensions = 1 << 6, 402 X86_MachineCheckExtensions = 1 << 7, 403 404 X86_CMPXCHG8Instruction = 1 << 8, 405 X86_OnboardAPIC = 1 << 9, 406 X86_SYSENTER_SYSEXIT = 1 << 11, 407 408 X86_MemoryTypeRangeRegisters = 1 << 12, 409 X86_PageGlobalEnable = 1 << 13, 410 X86_MachineCheckArchitecture = 1 << 14, 411 X86_CMOVInstruction = 1 << 15, 412 413 X86_PageAttributeTable = 1 << 16, 414 X86_36BitPSEs = 1 << 17, 415 X86_ProcessorSerialNumber = 1 << 18, 416 X86_CLFLUSHInstruction = 1 << 19, 417 418 X86_DebugTraceStore = 1 << 21, 419 X86_ACPIViaMSR = 1 << 22, 420 X86_MultimediaExtensions = 1 << 23, 421 422 X86_FXSAVE_FXRSTOR = 1 << 24, 423 X86_StreamingSIMDExtensions = 1 << 25, 424 X86_StreamingSIMDExtensions2 = 1 << 26, 425 X86_CPUSelfSnoop = 1 << 27, 426 427 X86_HyperThreading = 1 << 28, 428 X86_AutomaticClockControl = 1 << 29, 429 X86_IA64Processor = 1 << 30 430 }; 431 432 //Setup the auxilliary vectors. These will already have endian conversion. 433 //Auxilliary vectors are loaded only for elf formatted executables. 434 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 435 if(elfObject) 436 { 437 uint64_t features = 438 X86_OnboardFPU | 439 X86_VirtualModeExtensions | 440 X86_DebuggingExtensions | 441 X86_PageSizeExtensions | 442 X86_TimeStampCounter | 443 X86_ModelSpecificRegisters | 444 X86_PhysicalAddressExtensions | 445 X86_MachineCheckExtensions | 446 X86_CMPXCHG8Instruction | 447 X86_OnboardAPIC | 448 X86_SYSENTER_SYSEXIT | 449 X86_MemoryTypeRangeRegisters | 450 X86_PageGlobalEnable | 451 X86_MachineCheckArchitecture | 452 X86_CMOVInstruction | 453 X86_PageAttributeTable | 454 X86_36BitPSEs | 455// X86_ProcessorSerialNumber | 456 X86_CLFLUSHInstruction | 457// X86_DebugTraceStore | 458// X86_ACPIViaMSR | 459 X86_MultimediaExtensions | 460 X86_FXSAVE_FXRSTOR | 461 X86_StreamingSIMDExtensions | 462 X86_StreamingSIMDExtensions2 | 463// X86_CPUSelfSnoop | 464// X86_HyperThreading | 465// X86_AutomaticClockControl | 466// X86_IA64Processor | 467 0; 468 469 //Bits which describe the system hardware capabilities 470 //XXX Figure out what these should be 471 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 472 //The system page size 473 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 474 //Frequency at which times() increments 475 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 476 // For statically linked executables, this is the virtual address of the 477 // program header tables if they appear in the executable image 478 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 479 // This is the size of a program header entry from the elf file. 480 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 481 // This is the number of program headers from the original elf file. 482 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 483 //Defined to be 100 in the kernel source. 484 //This is the address of the elf "interpreter", It should be set 485 //to 0 for regular executables. It should be something else 486 //(not sure what) for dynamic libraries. 487 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 488 489 //XXX Figure out what this should be. 490 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 491 //The entry point to the program 492 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 493 //Different user and group IDs 494 auxv.push_back(auxv_t(M5_AT_UID, uid())); 495 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 496 auxv.push_back(auxv_t(M5_AT_GID, gid())); 497 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 498 //Whether to enable "secure mode" in the executable 499 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 500 //The string "x86_64" with unknown meaning 501 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 502 } 503 504 //Figure out how big the initial stack needs to be 505 506 // A sentry NULL void pointer at the top of the stack. 507 int sentry_size = intSize; 508 509 //This is the name of the file which is present on the initial stack 510 //It's purpose is to let the user space linker examine the original file. 511 int file_name_size = filename.size() + 1; 512 513 string platform = "x86_64"; 514 int aux_data_size = platform.size() + 1; 515 516 int env_data_size = 0; 517 for (int i = 0; i < envp.size(); ++i) { 518 env_data_size += envp[i].size() + 1; 519 } 520 int arg_data_size = 0; 521 for (int i = 0; i < argv.size(); ++i) { 522 arg_data_size += argv[i].size() + 1; 523 } 524 525 //The info_block needs to be padded so it's size is a multiple of the 526 //alignment mask. Also, it appears that there needs to be at least some 527 //padding, so if the size is already a multiple, we need to increase it 528 //anyway. 529 int base_info_block_size = 530 sentry_size + file_name_size + env_data_size + arg_data_size; 531 532 int info_block_size = roundUp(base_info_block_size, align); 533 534 int info_block_padding = info_block_size - base_info_block_size; 535 536 //Each auxilliary vector is two 8 byte words 537 int aux_array_size = intSize * 2 * (auxv.size() + 1); 538 539 int envp_array_size = intSize * (envp.size() + 1); 540 int argv_array_size = intSize * (argv.size() + 1); 541 542 int argc_size = intSize; 543 544 //Figure out the size of the contents of the actual initial frame 545 int frame_size = 546 aux_array_size + 547 envp_array_size + 548 argv_array_size + 549 argc_size; 550 551 //There needs to be padding after the auxiliary vector data so that the 552 //very bottom of the stack is aligned properly. 553 int partial_size = frame_size + aux_data_size; 554 int aligned_partial_size = roundUp(partial_size, align); 555 int aux_padding = aligned_partial_size - partial_size; 556 557 int space_needed = 558 info_block_size + 559 aux_data_size + 560 aux_padding + 561 frame_size; 562 563 stack_min = stack_base - space_needed; 564 stack_min = roundDown(stack_min, align); 565 stack_size = stack_base - stack_min; 566 567 // map memory 568 pTable->allocate(roundDown(stack_min, pageSize), 569 roundUp(stack_size, pageSize)); 570 571 // map out initial stack contents 572 IntType sentry_base = stack_base - sentry_size; 573 IntType file_name_base = sentry_base - file_name_size; 574 IntType env_data_base = file_name_base - env_data_size; 575 IntType arg_data_base = env_data_base - arg_data_size; 576 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size; 577 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding; 578 IntType envp_array_base = auxv_array_base - envp_array_size; 579 IntType argv_array_base = envp_array_base - argv_array_size; 580 IntType argc_base = argv_array_base - argc_size; 581 582 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 583 DPRINTF(Stack, "0x%x - file name\n", file_name_base); 584 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 585 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 586 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 587 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 588 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 589 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 590 DPRINTF(Stack, "0x%x - argc \n", argc_base); 591 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 592 593 // write contents to stack 594 595 // figure out argc 596 IntType argc = argv.size(); 597 IntType guestArgc = X86ISA::htog(argc); 598 599 //Write out the sentry void * 600 IntType sentry_NULL = 0; 601 initVirtMem->writeBlob(sentry_base, 602 (uint8_t*)&sentry_NULL, sentry_size); 603 604 //Write the file name 605 initVirtMem->writeString(file_name_base, filename.c_str()); 606 607 //Fix up the aux vector which points to the "platform" string 608 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM); 609 auxv[auxv.size() - 1].a_val = aux_data_base; 610 611 //Copy the aux stuff 612 for(int x = 0; x < auxv.size(); x++) 613 { 614 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 615 (uint8_t*)&(auxv[x].a_type), intSize); 616 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 617 (uint8_t*)&(auxv[x].a_val), intSize); 618 } 619 //Write out the terminating zeroed auxilliary vector 620 const uint64_t zero = 0; 621 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 622 (uint8_t*)&zero, 2 * intSize); 623 624 initVirtMem->writeString(aux_data_base, platform.c_str()); 625 626 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 627 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 628 629 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 630 631 ThreadContext *tc = system->getThreadContext(contextIds[0]); 632 //Set the stack pointer register 633 tc->setIntReg(StackPointerReg, stack_min); 634 635 Addr prog_entry = objFile->entryPoint(); 636 // There doesn't need to be any segment base added in since we're dealing 637 // with the flat segmentation model. 638 tc->setPC(prog_entry); 639 tc->setNextPC(prog_entry + sizeof(MachInst)); 640 641 //Align the "stack_min" to a page boundary. 642 stack_min = roundDown(stack_min, pageSize); 643 644// num_processes++; 645} 646 647void 648X86_64LiveProcess::argsInit(int intSize, int pageSize) 649{ 650 std::vector<AuxVector<uint64_t> > extraAuxvs; 651 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs); 652} 653 654void 655I386LiveProcess::argsInit(int intSize, int pageSize) 656{ 657 std::vector<AuxVector<uint32_t> > extraAuxvs; 658 //Tell the binary where the vsyscall part of the vsyscall page is. 659 extraAuxvs.push_back(AuxVector<uint32_t>(0x20, 660 vsyscallPage.base + vsyscallPage.vsyscallOffset)); 661 extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base)); 662 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs); 663} 664 665void 666X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) 667{ 668 tc->setIntReg(INTREG_RAX, return_value.value()); 669} 670 671X86ISA::IntReg 672X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i) 673{ 674 assert(i < NumArgumentRegs); 675 return tc->readIntReg(ArgumentReg[i]); 676} 677 678void 679X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 680{ 681 assert(i < NumArgumentRegs); 682 return tc->setIntReg(ArgumentReg[i], val); 683} 684 685X86ISA::IntReg 686I386LiveProcess::getSyscallArg(ThreadContext *tc, int i) 687{ 688 assert(i < NumArgumentRegs32); 689 return tc->readIntReg(ArgumentReg32[i]); 690} 691 692void 693I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 694{ 695 assert(i < NumArgumentRegs); 696 return tc->setIntReg(ArgumentReg[i], val); 697} 698