process.cc revision 5959:1f14f6f5e613
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32/*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use.  Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 *     Director of Intellectual Property Licensing
52 *     Office of Strategy and Technology
53 *     Hewlett-Packard Company
54 *     1501 Page Mill Road
55 *     Palo Alto, California  94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer.  Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution.  Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission.  No right of
65 * sublicense is granted herewith.  Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses.  Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89#include "arch/x86/isa_traits.hh"
90#include "arch/x86/process.hh"
91#include "arch/x86/segmentregs.hh"
92#include "arch/x86/types.hh"
93#include "base/loader/object_file.hh"
94#include "base/loader/elf_object.hh"
95#include "base/misc.hh"
96#include "base/trace.hh"
97#include "cpu/thread_context.hh"
98#include "mem/page_table.hh"
99#include "mem/translating_port.hh"
100#include "sim/process_impl.hh"
101#include "sim/syscall_emul.hh"
102#include "sim/system.hh"
103
104using namespace std;
105using namespace X86ISA;
106
107static const int ReturnValueReg = INTREG_RAX;
108static const int ArgumentReg[] = {
109    INTREG_RDI,
110    INTREG_RSI,
111    INTREG_RDX,
112    //This argument register is r10 for syscalls and rcx for C.
113    INTREG_R10W,
114    //INTREG_RCX,
115    INTREG_R8W,
116    INTREG_R9W
117};
118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119static const int ArgumentReg32[] = {
120    INTREG_EBX,
121    INTREG_ECX,
122    INTREG_EDX,
123    INTREG_ESI,
124    INTREG_EDI,
125};
126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129        SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130    LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131    numSyscallDescs(_numSyscallDescs)
132{
133    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134    brk_point = roundUp(brk_point, VMPageSize);
135}
136
137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138        ObjectFile *objFile, SyscallDesc *_syscallDescs,
139        int _numSyscallDescs) :
140    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141{
142    // Set up stack. On X86_64 Linux, stack goes from the top of memory
143    // downward, less the hole for the kernel address space plus one page
144    // for undertermined purposes.
145    stack_base = (Addr)0x7FFFFFFFF000ULL;
146
147    // Set pointer for next thread stack.  Reserve 8M for main stack.
148    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
149
150    // Set up region for mmaps. This was determined empirically and may not
151    // always be correct.
152    mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
153}
154
155I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
156        ObjectFile *objFile, SyscallDesc *_syscallDescs,
157        int _numSyscallDescs) :
158    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
159{
160    stack_base = (Addr)0xffffe000ULL;
161
162    // Set pointer for next thread stack.  Reserve 8M for main stack.
163    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
164
165    // Set up region for mmaps. This was determined empirically and may not
166    // always be correct.
167    mmap_start = mmap_end = (Addr)0xf7ffd000ULL;
168}
169
170SyscallDesc*
171X86LiveProcess::getDesc(int callnum)
172{
173    if (callnum < 0 || callnum >= numSyscallDescs)
174        return NULL;
175    return &syscallDescs[callnum];
176}
177
178void
179X86_64LiveProcess::startup()
180{
181    LiveProcess::startup();
182
183    if (checkpointRestored)
184        return;
185
186    argsInit(sizeof(uint64_t), VMPageSize);
187
188    for (int i = 0; i < contextIds.size(); i++) {
189        ThreadContext * tc = system->getThreadContext(contextIds[i]);
190
191        SegAttr dataAttr = 0;
192        dataAttr.writable = 1;
193        dataAttr.readable = 1;
194        dataAttr.expandDown = 0;
195        dataAttr.dpl = 3;
196        dataAttr.defaultSize = 0;
197        dataAttr.longMode = 1;
198
199        //Initialize the segment registers.
200        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
201            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
202            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
203            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
204        }
205
206        SegAttr csAttr = 0;
207        csAttr.writable = 0;
208        csAttr.readable = 1;
209        csAttr.expandDown = 0;
210        csAttr.dpl = 3;
211        csAttr.defaultSize = 0;
212        csAttr.longMode = 1;
213
214        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
215
216        //Set up the registers that describe the operating mode.
217        CR0 cr0 = 0;
218        cr0.pg = 1; // Turn on paging.
219        cr0.cd = 0; // Don't disable caching.
220        cr0.nw = 0; // This is bit is defined to be ignored.
221        cr0.am = 0; // No alignment checking
222        cr0.wp = 0; // Supervisor mode can write read only pages
223        cr0.ne = 1;
224        cr0.et = 1; // This should always be 1
225        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
226                    // would be pointless.
227        cr0.em = 0; // Allow x87 instructions to execute natively.
228        cr0.mp = 1; // This doesn't really matter, but the manual suggests
229                    // setting it to one.
230        cr0.pe = 1; // We're definitely in protected mode.
231        tc->setMiscReg(MISCREG_CR0, cr0);
232
233        Efer efer = 0;
234        efer.sce = 1; // Enable system call extensions.
235        efer.lme = 1; // Enable long mode.
236        efer.lma = 1; // Activate long mode.
237        efer.nxe = 1; // Enable nx support.
238        efer.svme = 0; // Disable svm support for now. It isn't implemented.
239        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
240        tc->setMiscReg(MISCREG_EFER, efer);
241    }
242}
243
244void
245I386LiveProcess::startup()
246{
247    LiveProcess::startup();
248
249    if (checkpointRestored)
250        return;
251
252    argsInit(sizeof(uint32_t), VMPageSize);
253
254    for (int i = 0; i < contextIds.size(); i++) {
255        ThreadContext * tc = system->getThreadContext(contextIds[i]);
256
257        SegAttr dataAttr = 0;
258        dataAttr.writable = 1;
259        dataAttr.readable = 1;
260        dataAttr.expandDown = 0;
261        dataAttr.dpl = 3;
262        dataAttr.defaultSize = 1;
263        dataAttr.longMode = 0;
264
265        //Initialize the segment registers.
266        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
267            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
268            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
269            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
270            tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
271            tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
272        }
273
274        SegAttr csAttr = 0;
275        csAttr.writable = 0;
276        csAttr.readable = 1;
277        csAttr.expandDown = 0;
278        csAttr.dpl = 3;
279        csAttr.defaultSize = 1;
280        csAttr.longMode = 0;
281
282        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
283
284        //Set up the registers that describe the operating mode.
285        CR0 cr0 = 0;
286        cr0.pg = 1; // Turn on paging.
287        cr0.cd = 0; // Don't disable caching.
288        cr0.nw = 0; // This is bit is defined to be ignored.
289        cr0.am = 0; // No alignment checking
290        cr0.wp = 0; // Supervisor mode can write read only pages
291        cr0.ne = 1;
292        cr0.et = 1; // This should always be 1
293        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
294                    // would be pointless.
295        cr0.em = 0; // Allow x87 instructions to execute natively.
296        cr0.mp = 1; // This doesn't really matter, but the manual suggests
297                    // setting it to one.
298        cr0.pe = 1; // We're definitely in protected mode.
299        tc->setMiscReg(MISCREG_CR0, cr0);
300
301        Efer efer = 0;
302        efer.sce = 1; // Enable system call extensions.
303        efer.lme = 1; // Enable long mode.
304        efer.lma = 0; // Deactivate long mode.
305        efer.nxe = 1; // Enable nx support.
306        efer.svme = 0; // Disable svm support for now. It isn't implemented.
307        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
308        tc->setMiscReg(MISCREG_EFER, efer);
309    }
310}
311
312template<class IntType>
313void
314X86LiveProcess::argsInit(int pageSize)
315{
316    int intSize = sizeof(IntType);
317
318    typedef AuxVector<IntType> auxv_t;
319    std::vector<auxv_t>  auxv;
320
321    string filename;
322    if(argv.size() < 1)
323        filename = "";
324    else
325        filename = argv[0];
326
327    //We want 16 byte alignment
328    uint64_t align = 16;
329
330    // load object file into target memory
331    objFile->loadSections(initVirtMem);
332
333    enum X86CpuFeature {
334        X86_OnboardFPU = 1 << 0,
335        X86_VirtualModeExtensions = 1 << 1,
336        X86_DebuggingExtensions = 1 << 2,
337        X86_PageSizeExtensions = 1 << 3,
338
339        X86_TimeStampCounter = 1 << 4,
340        X86_ModelSpecificRegisters = 1 << 5,
341        X86_PhysicalAddressExtensions = 1 << 6,
342        X86_MachineCheckExtensions = 1 << 7,
343
344        X86_CMPXCHG8Instruction = 1 << 8,
345        X86_OnboardAPIC = 1 << 9,
346        X86_SYSENTER_SYSEXIT = 1 << 11,
347
348        X86_MemoryTypeRangeRegisters = 1 << 12,
349        X86_PageGlobalEnable = 1 << 13,
350        X86_MachineCheckArchitecture = 1 << 14,
351        X86_CMOVInstruction = 1 << 15,
352
353        X86_PageAttributeTable = 1 << 16,
354        X86_36BitPSEs = 1 << 17,
355        X86_ProcessorSerialNumber = 1 << 18,
356        X86_CLFLUSHInstruction = 1 << 19,
357
358        X86_DebugTraceStore = 1 << 21,
359        X86_ACPIViaMSR = 1 << 22,
360        X86_MultimediaExtensions = 1 << 23,
361
362        X86_FXSAVE_FXRSTOR = 1 << 24,
363        X86_StreamingSIMDExtensions = 1 << 25,
364        X86_StreamingSIMDExtensions2 = 1 << 26,
365        X86_CPUSelfSnoop = 1 << 27,
366
367        X86_HyperThreading = 1 << 28,
368        X86_AutomaticClockControl = 1 << 29,
369        X86_IA64Processor = 1 << 30
370    };
371
372    //Setup the auxilliary vectors. These will already have endian conversion.
373    //Auxilliary vectors are loaded only for elf formatted executables.
374    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
375    if(elfObject)
376    {
377        uint64_t features =
378            X86_OnboardFPU |
379            X86_VirtualModeExtensions |
380            X86_DebuggingExtensions |
381            X86_PageSizeExtensions |
382            X86_TimeStampCounter |
383            X86_ModelSpecificRegisters |
384            X86_PhysicalAddressExtensions |
385            X86_MachineCheckExtensions |
386            X86_CMPXCHG8Instruction |
387            X86_OnboardAPIC |
388            X86_SYSENTER_SYSEXIT |
389            X86_MemoryTypeRangeRegisters |
390            X86_PageGlobalEnable |
391            X86_MachineCheckArchitecture |
392            X86_CMOVInstruction |
393            X86_PageAttributeTable |
394            X86_36BitPSEs |
395//            X86_ProcessorSerialNumber |
396            X86_CLFLUSHInstruction |
397//            X86_DebugTraceStore |
398//            X86_ACPIViaMSR |
399            X86_MultimediaExtensions |
400            X86_FXSAVE_FXRSTOR |
401            X86_StreamingSIMDExtensions |
402            X86_StreamingSIMDExtensions2 |
403//            X86_CPUSelfSnoop |
404//            X86_HyperThreading |
405//            X86_AutomaticClockControl |
406//            X86_IA64Processor |
407            0;
408
409        //Bits which describe the system hardware capabilities
410        //XXX Figure out what these should be
411        auxv.push_back(auxv_t(M5_AT_HWCAP, features));
412        //The system page size
413        auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
414        //Frequency at which times() increments
415        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
416        // For statically linked executables, this is the virtual address of the
417        // program header tables if they appear in the executable image
418        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
419        // This is the size of a program header entry from the elf file.
420        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
421        // This is the number of program headers from the original elf file.
422        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
423        //Defined to be 100 in the kernel source.
424        //This is the address of the elf "interpreter", It should be set
425        //to 0 for regular executables. It should be something else
426        //(not sure what) for dynamic libraries.
427        auxv.push_back(auxv_t(M5_AT_BASE, 0));
428
429        //XXX Figure out what this should be.
430        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
431        //The entry point to the program
432        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
433        //Different user and group IDs
434        auxv.push_back(auxv_t(M5_AT_UID, uid()));
435        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
436        auxv.push_back(auxv_t(M5_AT_GID, gid()));
437        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
438        //Whether to enable "secure mode" in the executable
439        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
440        //The string "x86_64" with unknown meaning
441        auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
442    }
443
444    //Figure out how big the initial stack needs to be
445
446    // A sentry NULL void pointer at the top of the stack.
447    int sentry_size = intSize;
448
449    //This is the name of the file which is present on the initial stack
450    //It's purpose is to let the user space linker examine the original file.
451    int file_name_size = filename.size() + 1;
452
453    string platform = "x86_64";
454    int aux_data_size = platform.size() + 1;
455
456    int env_data_size = 0;
457    for (int i = 0; i < envp.size(); ++i) {
458        env_data_size += envp[i].size() + 1;
459    }
460    int arg_data_size = 0;
461    for (int i = 0; i < argv.size(); ++i) {
462        arg_data_size += argv[i].size() + 1;
463    }
464
465    //The info_block needs to be padded so it's size is a multiple of the
466    //alignment mask. Also, it appears that there needs to be at least some
467    //padding, so if the size is already a multiple, we need to increase it
468    //anyway.
469    int base_info_block_size =
470        sentry_size + file_name_size + env_data_size + arg_data_size;
471
472    int info_block_size = roundUp(base_info_block_size, align);
473
474    int info_block_padding = info_block_size - base_info_block_size;
475
476    //Each auxilliary vector is two 8 byte words
477    int aux_array_size = intSize * 2 * (auxv.size() + 1);
478
479    int envp_array_size = intSize * (envp.size() + 1);
480    int argv_array_size = intSize * (argv.size() + 1);
481
482    int argc_size = intSize;
483
484    //Figure out the size of the contents of the actual initial frame
485    int frame_size =
486        aux_array_size +
487        envp_array_size +
488        argv_array_size +
489        argc_size;
490
491    //There needs to be padding after the auxiliary vector data so that the
492    //very bottom of the stack is aligned properly.
493    int partial_size = frame_size + aux_data_size;
494    int aligned_partial_size = roundUp(partial_size, align);
495    int aux_padding = aligned_partial_size - partial_size;
496
497    int space_needed =
498        info_block_size +
499        aux_data_size +
500        aux_padding +
501        frame_size;
502
503    stack_min = stack_base - space_needed;
504    stack_min = roundDown(stack_min, align);
505    stack_size = stack_base - stack_min;
506
507    // map memory
508    pTable->allocate(roundDown(stack_min, pageSize),
509                     roundUp(stack_size, pageSize));
510
511    // map out initial stack contents
512    IntType sentry_base = stack_base - sentry_size;
513    IntType file_name_base = sentry_base - file_name_size;
514    IntType env_data_base = file_name_base - env_data_size;
515    IntType arg_data_base = env_data_base - arg_data_size;
516    IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
517    IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
518    IntType envp_array_base = auxv_array_base - envp_array_size;
519    IntType argv_array_base = envp_array_base - argv_array_size;
520    IntType argc_base = argv_array_base - argc_size;
521
522    DPRINTF(Stack, "The addresses of items on the initial stack:\n");
523    DPRINTF(Stack, "0x%x - file name\n", file_name_base);
524    DPRINTF(Stack, "0x%x - env data\n", env_data_base);
525    DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
526    DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
527    DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
528    DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
529    DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
530    DPRINTF(Stack, "0x%x - argc \n", argc_base);
531    DPRINTF(Stack, "0x%x - stack min\n", stack_min);
532
533    // write contents to stack
534
535    // figure out argc
536    IntType argc = argv.size();
537    IntType guestArgc = X86ISA::htog(argc);
538
539    //Write out the sentry void *
540    IntType sentry_NULL = 0;
541    initVirtMem->writeBlob(sentry_base,
542            (uint8_t*)&sentry_NULL, sentry_size);
543
544    //Write the file name
545    initVirtMem->writeString(file_name_base, filename.c_str());
546
547    //Fix up the aux vector which points to the "platform" string
548    assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM);
549    auxv[auxv.size() - 1].a_val = aux_data_base;
550
551    //Copy the aux stuff
552    for(int x = 0; x < auxv.size(); x++)
553    {
554        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
555                (uint8_t*)&(auxv[x].a_type), intSize);
556        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
557                (uint8_t*)&(auxv[x].a_val), intSize);
558    }
559    //Write out the terminating zeroed auxilliary vector
560    const uint64_t zero = 0;
561    initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
562            (uint8_t*)&zero, 2 * intSize);
563
564    initVirtMem->writeString(aux_data_base, platform.c_str());
565
566    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
567    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
568
569    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
570
571    ThreadContext *tc = system->getThreadContext(contextIds[0]);
572    //Set the stack pointer register
573    tc->setIntReg(StackPointerReg, stack_min);
574
575    Addr prog_entry = objFile->entryPoint();
576    // There doesn't need to be any segment base added in since we're dealing
577    // with the flat segmentation model.
578    tc->setPC(prog_entry);
579    tc->setNextPC(prog_entry + sizeof(MachInst));
580
581    //Align the "stack_min" to a page boundary.
582    stack_min = roundDown(stack_min, pageSize);
583
584//    num_processes++;
585}
586
587void
588X86_64LiveProcess::argsInit(int intSize, int pageSize)
589{
590    X86LiveProcess::argsInit<uint64_t>(pageSize);
591}
592
593void
594I386LiveProcess::argsInit(int intSize, int pageSize)
595{
596    X86LiveProcess::argsInit<uint32_t>(pageSize);
597}
598
599void
600X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
601{
602    tc->setIntReg(INTREG_RAX, return_value.value());
603}
604
605X86ISA::IntReg
606X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
607{
608    assert(i < NumArgumentRegs);
609    return tc->readIntReg(ArgumentReg[i]);
610}
611
612void
613X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
614{
615    assert(i < NumArgumentRegs);
616    return tc->setIntReg(ArgumentReg[i], val);
617}
618
619X86ISA::IntReg
620I386LiveProcess::getSyscallArg(ThreadContext *tc, int i)
621{
622    assert(i < NumArgumentRegs32);
623    return tc->readIntReg(ArgumentReg32[i]);
624}
625
626void
627I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
628{
629    assert(i < NumArgumentRegs);
630    return tc->setIntReg(ArgumentReg[i], val);
631}
632