mmapped_ipr.hh revision 9897
13760SN/A/* 23760SN/A * Copyright (c) 2007-2008 The Hewlett-Packard Development Company 33760SN/A * All rights reserved. 43760SN/A * 53760SN/A * The license below extends only to copyright in the software and shall 63760SN/A * not be construed as granting a license to any other intellectual 73760SN/A * property including but not limited to intellectual property relating 83760SN/A * to a hardware implementation of the functionality of the software 93760SN/A * licensed hereunder. You may use the software subject to the license 103760SN/A * terms below provided that you ensure that this notice is replicated 113760SN/A * unmodified and in its entirety in all distributions of the software, 123760SN/A * modified or unmodified, in source code or in binary form. 133760SN/A * 143760SN/A * Redistribution and use in source and binary forms, with or without 153760SN/A * modification, are permitted provided that the following conditions are 163760SN/A * met: redistributions of source code must retain the above copyright 173760SN/A * notice, this list of conditions and the following disclaimer; 183760SN/A * redistributions in binary form must reproduce the above copyright 193760SN/A * notice, this list of conditions and the following disclaimer in the 203760SN/A * documentation and/or other materials provided with the distribution; 213760SN/A * neither the name of the copyright holders nor the names of its 223760SN/A * contributors may be used to endorse or promote products derived from 233760SN/A * this software without specific prior written permission. 243760SN/A * 253760SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 263760SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 273760SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 285597Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 293760SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 303760SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 318229Snate@binkert.org * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 323760SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 333760SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 343760SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 355597Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 363760SN/A * 37 * Authors: Gabe Black 38 */ 39 40#ifndef __ARCH_X86_MMAPPEDIPR_HH__ 41#define __ARCH_X86_MMAPPEDIPR_HH__ 42 43/** 44 * @file 45 * 46 * ISA-specific helper functions for memory mapped IPR accesses. 47 */ 48 49#include "arch/generic/mmapped_ipr.hh" 50#include "arch/x86/regs/misc.hh" 51#include "cpu/base.hh" 52#include "cpu/thread_context.hh" 53#include "mem/packet.hh" 54 55namespace X86ISA 56{ 57 inline Cycles 58 handleIprRead(ThreadContext *xc, Packet *pkt) 59 { 60 if (GenericISA::isGenericIprAccess(pkt)) { 61 return GenericISA::handleGenericIprRead(xc, pkt); 62 } else { 63 Addr offset = pkt->getAddr() & mask(3); 64 MiscRegIndex index = (MiscRegIndex)( 65 pkt->getAddr() / sizeof(MiscReg)); 66 MiscReg data = htog(xc->readMiscReg(index)); 67 // Make sure we don't trot off the end of data. 68 assert(offset + pkt->getSize() <= sizeof(MiscReg)); 69 pkt->setData(((uint8_t *)&data) + offset); 70 return Cycles(1); 71 } 72 } 73 74 inline Cycles 75 handleIprWrite(ThreadContext *xc, Packet *pkt) 76 { 77 if (GenericISA::isGenericIprAccess(pkt)) { 78 return GenericISA::handleGenericIprWrite(xc, pkt); 79 } else { 80 Addr offset = pkt->getAddr() & mask(3); 81 MiscRegIndex index = (MiscRegIndex)( 82 pkt->getAddr() / sizeof(MiscReg)); 83 MiscReg data; 84 data = htog(xc->readMiscRegNoEffect(index)); 85 // Make sure we don't trot off the end of data. 86 assert(offset + pkt->getSize() <= sizeof(MiscReg)); 87 pkt->writeData(((uint8_t *)&data) + offset); 88 xc->setMiscReg(index, gtoh(data)); 89 return Cycles(1); 90 } 91 } 92} 93 94#endif // __ARCH_X86_MMAPPEDIPR_HH__ 95