mmapped_ipr.hh revision 8902
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IN NO EVENT SHALL THE COPYRIGHT 2912608Sjason@lowepower.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3012608Sjason@lowepower.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3112608Sjason@lowepower.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3212608Sjason@lowepower.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3312608Sjason@lowepower.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3412608Sjason@lowepower.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3512608Sjason@lowepower.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3612608Sjason@lowepower.com * 3712608Sjason@lowepower.com * Authors: Gabe Black 3812608Sjason@lowepower.com */ 3912608Sjason@lowepower.com 4012608Sjason@lowepower.com#ifndef __ARCH_X86_MMAPPEDIPR_HH__ 4112608Sjason@lowepower.com#define __ARCH_X86_MMAPPEDIPR_HH__ 4212608Sjason@lowepower.com 4312608Sjason@lowepower.com/** 4412608Sjason@lowepower.com * @file 4512608Sjason@lowepower.com * 4612608Sjason@lowepower.com * ISA-specific helper functions for memory mapped IPR accesses. 4712608Sjason@lowepower.com */ 4812608Sjason@lowepower.com 4912608Sjason@lowepower.com#include "arch/x86/regs/misc.hh" 5012608Sjason@lowepower.com#include "cpu/base.hh" 5112608Sjason@lowepower.com#include "cpu/thread_context.hh" 5212608Sjason@lowepower.com#include "mem/packet.hh" 5312608Sjason@lowepower.com 5412608Sjason@lowepower.comnamespace X86ISA 5512608Sjason@lowepower.com{ 5612608Sjason@lowepower.com inline Tick 5712608Sjason@lowepower.com handleIprRead(ThreadContext *xc, Packet *pkt) 5812608Sjason@lowepower.com { 5912608Sjason@lowepower.com Addr offset = pkt->getAddr() & mask(3); 6012608Sjason@lowepower.com MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg)); 6112608Sjason@lowepower.com MiscReg data = htog(xc->readMiscReg(index)); 6212608Sjason@lowepower.com // Make sure we don't trot off the end of data. 6312608Sjason@lowepower.com assert(offset + pkt->getSize() <= sizeof(MiscReg)); 6412608Sjason@lowepower.com pkt->setData(((uint8_t *)&data) + offset); 6512608Sjason@lowepower.com return xc->getCpuPtr()->ticks(1); 6612608Sjason@lowepower.com } 6712608Sjason@lowepower.com 6812608Sjason@lowepower.com inline Tick 6912608Sjason@lowepower.com handleIprWrite(ThreadContext *xc, Packet *pkt) 7012608Sjason@lowepower.com { 7112608Sjason@lowepower.com Addr offset = pkt->getAddr() & mask(3); 7212608Sjason@lowepower.com MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg)); 7312608Sjason@lowepower.com MiscReg data; 7412608Sjason@lowepower.com data = htog(xc->readMiscRegNoEffect(index)); 7512608Sjason@lowepower.com // Make sure we don't trot off the end of data. 7612608Sjason@lowepower.com assert(offset + pkt->getSize() <= sizeof(MiscReg)); 7712608Sjason@lowepower.com pkt->writeData(((uint8_t *)&data) + offset); 7812608Sjason@lowepower.com xc->setMiscReg(index, gtoh(data)); 7912608Sjason@lowepower.com return xc->getCpuPtr()->ticks(1); 8012608Sjason@lowepower.com } 8112608Sjason@lowepower.com} 8212608Sjason@lowepower.com 8312608Sjason@lowepower.com#endif // __ARCH_X86_MMAPPEDIPR_HH__ 8412608Sjason@lowepower.com