isa_traits.hh revision 8542 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_ISATRAITS_HH__
41#define __ARCH_X86_ISATRAITS_HH__
42
43#include "arch/x86/types.hh"
44#include "arch/x86/x86_traits.hh"
45#include "base/types.hh"
46#include "cpu/static_inst_fwd.hh"
47
48namespace LittleEndianGuest {}
49
50namespace X86ISA
51{
52    //This makes sure the little endian version of certain functions
53    //are used.
54    using namespace LittleEndianGuest;
55
56    // X86 does not have a delay slot
57#define ISA_HAS_DELAY_SLOT 0
58
59    // X86 NOP (XCHG rAX, rAX)
60    //XXX This needs to be set to an intermediate instruction struct
61    //which encodes this instruction
62
63    //4k. This value is not constant on x86.
64    const int LogVMPageSize = 12;
65    const int VMPageSize = (1 << LogVMPageSize);
66
67    const int PageShift = 12;
68    const int PageBytes = 1ULL << PageShift;
69
70    const int BranchPredAddrShiftAmt = 0;
71
72    StaticInstPtr decodeInst(ExtMachInst);
73
74    // Memory accesses can be unaligned
75    const bool HasUnalignedMemAcc = true;
76
77    const ExtMachInst NoopMachInst = {
78        0x0,                            // No legacy prefixes.
79        0x0,                            // No rex prefix.
80        { 1, 0x0, 0x0, 0x90 },          // One opcode byte, 0x90.
81        0x0, 0x0,                       // No modrm or sib.
82        0, 0,                           // No immediate or displacement.
83        8, 8, 8,                        // All sizes are 8.
84        0,                              // Displacement size is 0.
85        SixtyFourBitMode                // Behave as if we're in 64 bit
86                                        // mode (this doesn't actually matter).
87    };
88};
89
90#endif // __ARCH_X86_ISATRAITS_HH__
91