isa_traits.hh revision 6110 
1/*
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42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_ISATRAITS_HH__
59#define __ARCH_X86_ISATRAITS_HH__
60
61#include "arch/x86/intregs.hh"
62#include "arch/x86/max_inst_regs.hh"
63#include "arch/x86/types.hh"
64#include "arch/x86/x86_traits.hh"
65#include "sim/host.hh"
66
67class StaticInstPtr;
68
69namespace LittleEndianGuest {}
70
71namespace X86ISA
72{
73    //This makes sure the little endian version of certain functions
74    //are used.
75    using namespace LittleEndianGuest;
76    using X86ISAInst::MaxInstSrcRegs;
77    using X86ISAInst::MaxInstDestRegs;
78
79    // X86 does not have a delay slot
80#define ISA_HAS_DELAY_SLOT 0
81
82    // X86 NOP (XCHG rAX, rAX)
83    //XXX This needs to be set to an intermediate instruction struct
84    //which encodes this instruction
85
86    // These enumerate all the registers for dependence tracking.
87    enum DependenceTags {
88        //There are 16 microcode registers at the moment. This is an
89        //unusually large constant to make sure there isn't overflow.
90        FP_Base_DepTag = 128,
91        Ctrl_Base_DepTag =
92            FP_Base_DepTag +
93            //mmx/x87 registers
94            8 +
95            //xmm registers
96            16 * 2 +
97            //The microcode fp registers
98            8 +
99            //The indices that are mapped over the fp stack
100            8
101    };
102
103    // semantically meaningful register indices
104    //There is no such register in X86
105    const int ZeroReg = NUM_INTREGS;
106    const int StackPointerReg = INTREG_RSP;
107    //X86 doesn't seem to have a link register
108    const int ReturnAddressReg = 0;
109    const int ReturnValueReg = INTREG_RAX;
110    const int FramePointerReg = INTREG_RBP;
111
112    // Some OS syscalls use a second register (rdx) to return a second
113    // value
114    const int SyscallPseudoReturnReg = INTREG_RDX;
115
116    //4k. This value is not constant on x86.
117    const int LogVMPageSize = 12;
118    const int VMPageSize = (1 << LogVMPageSize);
119
120    const int PageShift = 12;
121    const int PageBytes = 1ULL << PageShift;
122
123    const int BranchPredAddrShiftAmt = 0;
124
125    StaticInstPtr decodeInst(ExtMachInst);
126
127    const Addr LoadAddrMask = ULL(-1);
128};
129
130#endif // __ARCH_X86_ISATRAITS_HH__
131