isa_traits.hh revision 4812:c77e159a5633
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IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_ISATRAITS_HH__ 59#define __ARCH_X86_ISATRAITS_HH__ 60 61#include "arch/x86/intregs.hh" 62#include "arch/x86/types.hh" 63#include "arch/x86/x86_traits.hh" 64 65class StaticInstPtr; 66 67namespace LittleEndianGuest {} 68 69namespace X86ISA 70{ 71 //This makes sure the little endian version of certain functions 72 //are used. 73 using namespace LittleEndianGuest; 74 75 // X86 does not have a delay slot 76#define ISA_HAS_DELAY_SLOT 0 77 78 // X86 NOP (XCHG rAX, rAX) 79 //XXX This needs to be set to an intermediate instruction struct 80 //which encodes this instruction 81 82 // These enumerate all the registers for dependence tracking. 83 enum DependenceTags { 84 //There are 16 microcode registers at the moment 85 FP_Base_DepTag = 1 << 7, 86 Ctrl_Base_DepTag = 87 FP_Base_DepTag + 88 //mmx/x87 registers 89 8 + 90 //xmm registers 91 16 92 }; 93 94 // semantically meaningful register indices 95 //There is no such register in X86 96 const int ZeroReg = NUM_INTREGS; 97 const int StackPointerReg = INTREG_RSP; 98 //X86 doesn't seem to have a link register 99 const int ReturnAddressReg = 0; 100 const int ReturnValueReg = INTREG_RAX; 101 const int FramePointerReg = INTREG_RBP; 102 const int ArgumentReg[] = { 103 INTREG_RDI, 104 INTREG_RSI, 105 INTREG_RDX, 106 //This argument register is r10 for syscalls and rcx for C. 107 INTREG_R10W, 108 //INTREG_RCX, 109 INTREG_R8W, 110 INTREG_R9W 111 }; 112 const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 113 114 // Some OS syscalls use a second register (rdx) to return a second 115 // value 116 const int SyscallPseudoReturnReg = INTREG_RDX; 117 118 //XXX These numbers are bogus 119 const int MaxInstSrcRegs = 10; 120 const int MaxInstDestRegs = 10; 121 122 //4k. This value is not constant on x86. 123 const int LogVMPageSize = 12; 124 const int VMPageSize = (1 << LogVMPageSize); 125 126 const int PageShift = 13; 127 const int PageBytes = 1ULL << PageShift; 128 129 const int BranchPredAddrShiftAmt = 0; 130 131 StaticInstPtr decodeInst(ExtMachInst); 132}; 133 134#endif // __ARCH_X86_ISATRAITS_HH__ 135