isa_traits.hh revision 4141:80c20b40a01f
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IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_ISATRAITS_HH__ 59#define __ARCH_X86_ISATRAITS_HH__ 60 61#include "arch/x86/types.hh" 62#include "arch/x86/x86_traits.hh" 63 64class StaticInstPtr; 65 66namespace LittleEndianGuest {} 67 68namespace X86ISA 69{ 70 //This makes sure the little endian version of certain functions 71 //are used. 72 using namespace LittleEndianGuest; 73 74 // X86 does not have a delay slot 75#define ISA_HAS_DELAY_SLOT 0 76 77 // X86 NOP (XCHG rAX, rAX) 78 //XXX This needs to be set to an intermediate instruction struct 79 //which encodes this instruction 80 81 // These enumerate all the registers for dependence tracking. 82 enum DependenceTags { 83 //The number of microcode registers needs to be added to this 84 FP_Base_DepTag = 16, 85 Ctrl_Base_DepTag = 86 FP_Base_DepTag + 87 //mmx/x87 registers 88 8 + 89 //xmm registers 90 16 91 }; 92 93 // semantically meaningful register indices 94 //There is no such register in X86 95 const int ZeroReg = 0; 96 const int StackPointerReg = 4; //RSP 97 //X86 doesn't seem to have a link register 98 const int ReturnAddressReg = 0; 99 const int ReturnValueReg = 0; //RAX 100 const int FramePointerReg = 5; //RBP 101 const int ArgumentReg0 = 7; //RDI 102 const int ArgumentReg1 = 6; //RSI 103 const int ArgumentReg2 = 2; //RDX 104 const int ArgumentReg3 = 1; //RCX 105 const int ArgumentReg4 = 8; //R8W 106 const int ArgumentReg5 = 9; //R9W 107 108 // Some OS syscalls use a second register (rdx) to return a second 109 // value 110 const int SyscallPseudoReturnReg = 2; //RDX 111 112 //XXX These numbers are bogus 113 const int MaxInstSrcRegs = 10; 114 const int MaxInstDestRegs = 10; 115 116 //4k. This value is not constant on x86. 117 const int LogVMPageSize = 12; 118 const int VMPageSize = (1 << LogVMPageSize); 119 120 const int PageShift = 13; 121 const int PageBytes = 1ULL << PageShift; 122 123 const int BranchPredAddrShiftAmt = 0; 124 125 StaticInstPtr decodeInst(ExtMachInst); 126}; 127 128#endif // __ARCH_X86_ISATRAITS_HH__ 129