isa_traits.hh revision 10924:d02e9c239892 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_ISATRAITS_HH__
41#define __ARCH_X86_ISATRAITS_HH__
42
43#include "arch/x86/types.hh"
44#include "arch/x86/x86_traits.hh"
45#include "base/types.hh"
46
47namespace LittleEndianGuest {}
48
49namespace X86ISA
50{
51    //This makes sure the little endian version of certain functions
52    //are used.
53    using namespace LittleEndianGuest;
54
55    // X86 does not have a delay slot
56#define ISA_HAS_DELAY_SLOT 0
57
58    // X86 NOP (XCHG rAX, rAX)
59    //XXX This needs to be set to an intermediate instruction struct
60    //which encodes this instruction
61
62    const Addr PageShift = 12;
63    const Addr PageBytes = ULL(1) << PageShift;
64
65    // Memory accesses can be unaligned
66    const bool HasUnalignedMemAcc = true;
67
68    const bool CurThreadInfoImplemented = false;
69    const int CurThreadInfoReg = -1;
70
71    const ExtMachInst NoopMachInst M5_VAR_USED = {
72        0x0,                            // No legacy prefixes.
73        0x0,                            // No rex prefix.
74        0x0,                            // No two / three byte escape sequence
75        { OneByteOpcode, 0x90 },        // One opcode byte, 0x90.
76        0x0, 0x0,                       // No modrm or sib.
77        0, 0,                           // No immediate or displacement.
78        8, 8, 8,                        // All sizes are 8.
79        0,                              // Displacement size is 0.
80        SixtyFourBitMode                // Behave as if we're in 64 bit
81                                        // mode (this doesn't actually matter).
82    };
83}
84
85#endif // __ARCH_X86_ISATRAITS_HH__
86