isa_traits.hh revision 4581 
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43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_ISATRAITS_HH__
59#define __ARCH_X86_ISATRAITS_HH__
60
61#include "arch/x86/intregs.hh"
62#include "arch/x86/types.hh"
63#include "arch/x86/x86_traits.hh"
64
65class StaticInstPtr;
66
67namespace LittleEndianGuest {}
68
69namespace X86ISA
70{
71    //This makes sure the little endian version of certain functions
72    //are used.
73    using namespace LittleEndianGuest;
74
75    // X86 does not have a delay slot
76#define ISA_HAS_DELAY_SLOT 0
77
78    // X86 NOP (XCHG rAX, rAX)
79    //XXX This needs to be set to an intermediate instruction struct
80    //which encodes this instruction
81
82    // These enumerate all the registers for dependence tracking.
83    enum DependenceTags {
84        //There are 16 microcode registers at the moment
85        FP_Base_DepTag = 32,
86        Ctrl_Base_DepTag =
87            FP_Base_DepTag +
88            //mmx/x87 registers
89            8 +
90            //xmm registers
91            16
92    };
93
94    // semantically meaningful register indices
95    //There is no such register in X86
96    const int ZeroReg = 0;
97    const int StackPointerReg = INTREG_RSP;
98    //X86 doesn't seem to have a link register
99    const int ReturnAddressReg = 0;
100    const int ReturnValueReg = INTREG_RAX;
101    const int FramePointerReg = INTREG_RBP;
102    const int ArgumentReg0 = INTREG_RDI;
103    const int ArgumentReg1 = INTREG_RSI;
104    const int ArgumentReg2 = INTREG_RDX;
105    const int ArgumentReg3 = INTREG_RCX;
106    const int ArgumentReg4 = INTREG_R8W;
107    const int ArgumentReg5 = INTREG_R9W;
108
109    // Some OS syscalls use a second register (rdx) to return a second
110    // value
111    const int SyscallPseudoReturnReg = INTREG_RDX;
112
113    //XXX These numbers are bogus
114    const int MaxInstSrcRegs = 10;
115    const int MaxInstDestRegs = 10;
116
117    //4k. This value is not constant on x86.
118    const int LogVMPageSize = 12;
119    const int VMPageSize = (1 << LogVMPageSize);
120
121    const int PageShift = 13;
122    const int PageBytes = 1ULL << PageShift;
123
124    const int BranchPredAddrShiftAmt = 0;
125
126    StaticInstPtr decodeInst(ExtMachInst);
127};
128
129#endif // __ARCH_X86_ISATRAITS_HH__
130