outputblock.isa revision 4276
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any
9// use which is NOT directed to receiving any direct monetary
10// compensation for, or commercial advantage from such use.  Illustrative
11// examples of non-commercial use are academic research, personal study,
12// teaching, education and corporate research & development.
13// Illustrative examples of commercial use are distributing products for
14// commercial advantage and providing services using the software for
15// commercial advantage.
16//
17// If you wish to use this software or functionality therein that may be
18// covered by patents for commercial use, please contact:
19//     Director of Intellectual Property Licensing
20//     Office of Strategy and Technology
21//     Hewlett-Packard Company
22//     1501 Page Mill Road
23//     Palo Alto, California  94304
24//
25// Redistributions of source code must retain the above copyright notice,
26// this list of conditions and the following disclaimer.  Redistributions
27// in binary form must reproduce the above copyright notice, this list of
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30// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
31// contributors may be used to endorse or promote products derived from
32// this software without specific prior written permission.  No right of
33// sublicense is granted herewith.  Derivatives of the software and
34// output created using the software may be prepared, but only for
35// Non-Commercial Uses.  Derivatives of the software may be shared with
36// others provided: (i) the others agree to abide by the list of
37// conditions herein which includes the Non-Commercial Use restrictions;
38// and (ii) such Derivatives of the software include the above copyright
39// notice to acknowledge the contribution from this software where
40// applicable, this list of conditions and the disclaimer below.
41//
42// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53//
54// Authors: Gabe Black
55
56////////////////////////////////////////////////////////////////////
57//
58// Base class for sparc instructions, and some support functions
59//
60
61output header {{
62
63        /**
64         * Base class for all X86 static instructions.
65         */
66        class X86StaticInst : public StaticInst
67        {
68          protected:
69            // Constructor.
70            X86StaticInst(const char *mnem,
71                 ExtMachInst _machInst, OpClass __opClass)
72                    : StaticInst(mnem, _machInst, __opClass)
73                {
74                }
75
76            std::string generateDisassembly(Addr pc,
77                const SymbolTable *symtab) const;
78
79            void printReg(std::ostream &os, int reg) const;
80            void printSrcReg(std::ostream &os, int reg) const;
81            void printDestReg(std::ostream &os, int reg) const;
82        };
83}};
84
85output decoder {{
86
87        inline void printMnemonic(std::ostream &os, const char * mnemonic)
88        {
89            ccprintf(os, "\t%s   ", mnemonic);
90        }
91
92        void
93        X86StaticInst::printSrcReg(std::ostream &os, int reg) const
94        {
95            if(_numSrcRegs > reg)
96                printReg(os, _srcRegIdx[reg]);
97        }
98
99        void
100        X86StaticInst::printDestReg(std::ostream &os, int reg) const
101        {
102            if(_numDestRegs > reg)
103                printReg(os, _destRegIdx[reg]);
104        }
105
106        void
107        X86StaticInst::printReg(std::ostream &os, int reg) const
108        {
109            if (reg < FP_Base_DepTag) {
110                //FIXME These should print differently depending on the
111                //mode etc, but for now this will get the point across
112                switch (reg) {
113                  case INTREG_RAX:
114                    ccprintf(os, "rax");
115                    break;
116                  case INTREG_RBX:
117                    ccprintf(os, "rbx");
118                    break;
119                  case INTREG_RCX:
120                    ccprintf(os, "rcx");
121                    break;
122                  case INTREG_RDX:
123                    ccprintf(os, "rdx");
124                    break;
125                  case INTREG_RSP:
126                    ccprintf(os, "rsp");
127                    break;
128                  case INTREG_RBP:
129                    ccprintf(os, "rbp");
130                    break;
131                  case INTREG_RSI:
132                    ccprintf(os, "rsi");
133                    break;
134                  case INTREG_RDI:
135                    ccprintf(os, "rdi");
136                    break;
137                  case INTREG_R8W:
138                    ccprintf(os, "r8");
139                    break;
140                  case INTREG_R9W:
141                    ccprintf(os, "r9");
142                    break;
143                  case INTREG_R10W:
144                    ccprintf(os, "r10");
145                    break;
146                  case INTREG_R11W:
147                    ccprintf(os, "r11");
148                    break;
149                  case INTREG_R12W:
150                    ccprintf(os, "r12");
151                    break;
152                  case INTREG_R13W:
153                    ccprintf(os, "r13");
154                    break;
155                  case INTREG_R14W:
156                    ccprintf(os, "r14");
157                    break;
158                  case INTREG_R15W:
159                    ccprintf(os, "r15");
160                    break;
161                }
162            } else if (reg < Ctrl_Base_DepTag) {
163                ccprintf(os, "%%f%d", reg - FP_Base_DepTag);
164            } else {
165                switch (reg - Ctrl_Base_DepTag) {
166                  default:
167                    ccprintf(os, "%%ctrl%d", reg - Ctrl_Base_DepTag);
168                }
169            }
170        }
171
172        std::string X86StaticInst::generateDisassembly(Addr pc,
173            const SymbolTable *symtab) const
174        {
175            std::stringstream ss;
176
177            printMnemonic(ss, mnemonic);
178
179            return ss.str();
180        }
181}};
182