specop.isa revision 10341
15449Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 28610Snilay@cs.wisc.edu// Copyright (c) 2011 Mark D. Hill and David A. Wood 34519Sgblack@eecs.umich.edu// All rights reserved. 44519Sgblack@eecs.umich.edu// 57087Snate@binkert.org// The license below extends only to copyright in the software and shall 67087Snate@binkert.org// not be construed as granting a license to any other intellectual 77087Snate@binkert.org// property including but not limited to intellectual property relating 87087Snate@binkert.org// to a hardware implementation of the functionality of the software 97087Snate@binkert.org// licensed hereunder. You may use the software subject to the license 107087Snate@binkert.org// terms below provided that you ensure that this notice is replicated 117087Snate@binkert.org// unmodified and in its entirety in all distributions of the software, 127087Snate@binkert.org// modified or unmodified, in source code or in binary form. 134519Sgblack@eecs.umich.edu// 147087Snate@binkert.org// Redistribution and use in source and binary forms, with or without 157087Snate@binkert.org// modification, are permitted provided that the following conditions are 167087Snate@binkert.org// met: redistributions of source code must retain the above copyright 177087Snate@binkert.org// notice, this list of conditions and the following disclaimer; 187087Snate@binkert.org// redistributions in binary form must reproduce the above copyright 197087Snate@binkert.org// notice, this list of conditions and the following disclaimer in the 207087Snate@binkert.org// documentation and/or other materials provided with the distribution; 217087Snate@binkert.org// neither the name of the copyright holders nor the names of its 224519Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 237087Snate@binkert.org// this software without specific prior written permission. 244519Sgblack@eecs.umich.edu// 254519Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 264519Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 274519Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 284519Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 294519Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 304519Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 314519Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 324519Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 334519Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 344519Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 354519Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 364519Sgblack@eecs.umich.edu// 374519Sgblack@eecs.umich.edu// Authors: Gabe Black 384519Sgblack@eecs.umich.edu 394519Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 404519Sgblack@eecs.umich.edu// 414519Sgblack@eecs.umich.edu// Fault Microop 424519Sgblack@eecs.umich.edu// 434519Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 444519Sgblack@eecs.umich.edu 454590Sgblack@eecs.umich.eduoutput header {{ 465163Sgblack@eecs.umich.edu class MicroFaultBase : public X86ISA::X86MicroopBase 474590Sgblack@eecs.umich.edu { 484590Sgblack@eecs.umich.edu protected: 494590Sgblack@eecs.umich.edu Fault fault; 505163Sgblack@eecs.umich.edu uint8_t cc; 514590Sgblack@eecs.umich.edu 524590Sgblack@eecs.umich.edu public: 535163Sgblack@eecs.umich.edu MicroFaultBase(ExtMachInst _machInst, const char * instMnem, 547620Sgblack@eecs.umich.edu uint64_t setFlags, Fault _fault, uint8_t _cc); 554590Sgblack@eecs.umich.edu 564696Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 574696Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 584590Sgblack@eecs.umich.edu }; 595172Sgblack@eecs.umich.edu 605172Sgblack@eecs.umich.edu class MicroHalt : public X86ISA::X86MicroopBase 615172Sgblack@eecs.umich.edu { 625172Sgblack@eecs.umich.edu public: 635172Sgblack@eecs.umich.edu MicroHalt(ExtMachInst _machInst, const char * instMnem, 647620Sgblack@eecs.umich.edu uint64_t setFlags) : 657682Sgblack@eecs.umich.edu X86MicroopBase(_machInst, "halt", instMnem, 6610341Smitch.hayenga@arm.com setFlags | (ULL(1) << StaticInst::IsNonSpeculative) | 6710341Smitch.hayenga@arm.com (ULL(1) << StaticInst::IsQuiesce), 687682Sgblack@eecs.umich.edu No_OpClass) 695172Sgblack@eecs.umich.edu { 705172Sgblack@eecs.umich.edu } 715172Sgblack@eecs.umich.edu 725172Sgblack@eecs.umich.edu %(BasicExecDeclare)s 735449Sgblack@eecs.umich.edu 745449Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 755449Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 765172Sgblack@eecs.umich.edu }; 774590Sgblack@eecs.umich.edu}}; 784590Sgblack@eecs.umich.edu 795163Sgblack@eecs.umich.edudef template MicroFaultDeclare {{ 805163Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 815163Sgblack@eecs.umich.edu { 825163Sgblack@eecs.umich.edu public: 835163Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, const char * instMnem, 847620Sgblack@eecs.umich.edu uint64_t setFlags, Fault _fault, uint8_t _cc); 855163Sgblack@eecs.umich.edu 865163Sgblack@eecs.umich.edu %(BasicExecDeclare)s 875163Sgblack@eecs.umich.edu }; 885163Sgblack@eecs.umich.edu}}; 895163Sgblack@eecs.umich.edu 905163Sgblack@eecs.umich.edudef template MicroFaultExecute {{ 9110196SCurtis.Dunham@arm.com Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, 924519Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 934519Sgblack@eecs.umich.edu { 945163Sgblack@eecs.umich.edu %(op_decl)s; 955163Sgblack@eecs.umich.edu %(op_rd)s; 965163Sgblack@eecs.umich.edu if (%(cond_test)s) { 975163Sgblack@eecs.umich.edu //Return the fault we were constructed with 985163Sgblack@eecs.umich.edu return fault; 995163Sgblack@eecs.umich.edu } else { 1005163Sgblack@eecs.umich.edu return NoFault; 1015163Sgblack@eecs.umich.edu } 1024519Sgblack@eecs.umich.edu } 1034519Sgblack@eecs.umich.edu}}; 1044519Sgblack@eecs.umich.edu 1055172Sgblack@eecs.umich.eduoutput exec {{ 1065172Sgblack@eecs.umich.edu Fault 10710196SCurtis.Dunham@arm.com MicroHalt::execute(CPU_EXEC_CONTEXT *xc, 1085172Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1095172Sgblack@eecs.umich.edu { 1105173Sgblack@eecs.umich.edu xc->tcBase()->suspend(); 1115172Sgblack@eecs.umich.edu return NoFault; 1125172Sgblack@eecs.umich.edu } 1135172Sgblack@eecs.umich.edu}}; 1145172Sgblack@eecs.umich.edu 1154590Sgblack@eecs.umich.eduoutput decoder {{ 11610184SCurtis.Dunham@arm.com MicroFaultBase::MicroFaultBase( 1175163Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 1187620Sgblack@eecs.umich.edu uint64_t setFlags, Fault _fault, uint8_t _cc) : 1197620Sgblack@eecs.umich.edu X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass), 1205163Sgblack@eecs.umich.edu fault(_fault), cc(_cc) 1214519Sgblack@eecs.umich.edu { 1224519Sgblack@eecs.umich.edu } 1234519Sgblack@eecs.umich.edu}}; 1244519Sgblack@eecs.umich.edu 1255163Sgblack@eecs.umich.edudef template MicroFaultConstructor {{ 12610184SCurtis.Dunham@arm.com %(class_name)s::%(class_name)s( 1277620Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, uint64_t setFlags, 1285163Sgblack@eecs.umich.edu Fault _fault, uint8_t _cc) : 1297620Sgblack@eecs.umich.edu %(base_class)s(machInst, instMnem, setFlags, _fault, _cc) 1305163Sgblack@eecs.umich.edu { 1317626Sgblack@eecs.umich.edu %(constructor)s; 1325163Sgblack@eecs.umich.edu } 1335163Sgblack@eecs.umich.edu}}; 1345163Sgblack@eecs.umich.edu 1354696Sgblack@eecs.umich.eduoutput decoder {{ 1365163Sgblack@eecs.umich.edu std::string MicroFaultBase::generateDisassembly(Addr pc, 1374696Sgblack@eecs.umich.edu const SymbolTable *symtab) const 1384696Sgblack@eecs.umich.edu { 1394696Sgblack@eecs.umich.edu std::stringstream response; 1404696Sgblack@eecs.umich.edu 1414696Sgblack@eecs.umich.edu printMnemonic(response, instMnem, mnemonic); 1424696Sgblack@eecs.umich.edu if(fault) 1434696Sgblack@eecs.umich.edu response << fault->name(); 1444696Sgblack@eecs.umich.edu else 1454696Sgblack@eecs.umich.edu response << "No Fault"; 1464696Sgblack@eecs.umich.edu 1474696Sgblack@eecs.umich.edu return response.str(); 1484696Sgblack@eecs.umich.edu } 1495449Sgblack@eecs.umich.edu 1505449Sgblack@eecs.umich.edu std::string MicroHalt::generateDisassembly(Addr pc, 1515449Sgblack@eecs.umich.edu const SymbolTable *symtab) const 1525449Sgblack@eecs.umich.edu { 1535449Sgblack@eecs.umich.edu std::stringstream response; 1545449Sgblack@eecs.umich.edu 1555449Sgblack@eecs.umich.edu printMnemonic(response, instMnem, mnemonic); 1565449Sgblack@eecs.umich.edu 1575449Sgblack@eecs.umich.edu return response.str(); 1585449Sgblack@eecs.umich.edu } 1594696Sgblack@eecs.umich.edu}}; 1604696Sgblack@eecs.umich.edu 1614519Sgblack@eecs.umich.edulet {{ 1624590Sgblack@eecs.umich.edu class Fault(X86Microop): 1635163Sgblack@eecs.umich.edu className = "MicroFault" 1645163Sgblack@eecs.umich.edu def __init__(self, fault, flags=None): 1654590Sgblack@eecs.umich.edu self.fault = fault 1665163Sgblack@eecs.umich.edu if flags: 1675163Sgblack@eecs.umich.edu if not isinstance(flags, (list, tuple)): 1685163Sgblack@eecs.umich.edu raise Exception, "flags must be a list or tuple of flags" 1695163Sgblack@eecs.umich.edu self.cond = " | ".join(flags) 1705163Sgblack@eecs.umich.edu self.className += "Flags" 1715163Sgblack@eecs.umich.edu else: 1725163Sgblack@eecs.umich.edu self.cond = "0" 1734590Sgblack@eecs.umich.edu 1747620Sgblack@eecs.umich.edu def getAllocator(self, microFlags): 1757620Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, macrocodeBlock, 1765163Sgblack@eecs.umich.edu %(flags)s, %(fault)s, %(cc)s)''' % { 1775163Sgblack@eecs.umich.edu "class_name" : self.className, 1784590Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 1795163Sgblack@eecs.umich.edu "fault" : self.fault, 1805163Sgblack@eecs.umich.edu "cc" : self.cond} 1814590Sgblack@eecs.umich.edu return allocator 1825163Sgblack@eecs.umich.edu 1835293Sgblack@eecs.umich.edu iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase", 1845163Sgblack@eecs.umich.edu {"code": "", 1859211Snilay@cs.wisc.edu "cond_test": "checkCondition(ccFlagBits | cfofBits | dfBit | \ 1869010Snilay@cs.wisc.edu ecfBit | ezfBit, cc)"}) 1875163Sgblack@eecs.umich.edu exec_output = MicroFaultExecute.subst(iop) 1885163Sgblack@eecs.umich.edu header_output = MicroFaultDeclare.subst(iop) 1895163Sgblack@eecs.umich.edu decoder_output = MicroFaultConstructor.subst(iop) 1905293Sgblack@eecs.umich.edu iop = InstObjParams("fault", "MicroFault", "MicroFaultBase", 1915163Sgblack@eecs.umich.edu {"code": "", 1925163Sgblack@eecs.umich.edu "cond_test": "true"}) 1935163Sgblack@eecs.umich.edu exec_output += MicroFaultExecute.subst(iop) 1945163Sgblack@eecs.umich.edu header_output += MicroFaultDeclare.subst(iop) 1955163Sgblack@eecs.umich.edu decoder_output += MicroFaultConstructor.subst(iop) 1964590Sgblack@eecs.umich.edu microopClasses["fault"] = Fault 1975172Sgblack@eecs.umich.edu 1985172Sgblack@eecs.umich.edu class Halt(X86Microop): 1996047Sgblack@eecs.umich.edu className = "MicroHalt" 2005172Sgblack@eecs.umich.edu def __init__(self): 2015172Sgblack@eecs.umich.edu pass 2025172Sgblack@eecs.umich.edu 2037620Sgblack@eecs.umich.edu def getAllocator(self, microFlags): 2047620Sgblack@eecs.umich.edu return "new MicroHalt(machInst, macrocodeBlock, %s)" % \ 2055172Sgblack@eecs.umich.edu self.microFlagsText(microFlags) 2065172Sgblack@eecs.umich.edu 2075172Sgblack@eecs.umich.edu microopClasses["halt"] = Halt 2084519Sgblack@eecs.umich.edu}}; 2098610Snilay@cs.wisc.edu 2108610Snilay@cs.wisc.edudef template MicroFenceOpDeclare {{ 2118610Snilay@cs.wisc.edu class %(class_name)s : public X86ISA::X86MicroopBase 2128610Snilay@cs.wisc.edu { 2138610Snilay@cs.wisc.edu public: 2148610Snilay@cs.wisc.edu %(class_name)s(ExtMachInst _machInst, 2158610Snilay@cs.wisc.edu const char * instMnem, 2168610Snilay@cs.wisc.edu uint64_t setFlags); 2178610Snilay@cs.wisc.edu 2188610Snilay@cs.wisc.edu %(BasicExecDeclare)s 2198610Snilay@cs.wisc.edu }; 2208610Snilay@cs.wisc.edu}}; 2218610Snilay@cs.wisc.edu 2228610Snilay@cs.wisc.edudef template MicroFenceOpConstructor {{ 22310184SCurtis.Dunham@arm.com %(class_name)s::%(class_name)s( 2248610Snilay@cs.wisc.edu ExtMachInst machInst, const char * instMnem, uint64_t setFlags) : 2258610Snilay@cs.wisc.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 2268610Snilay@cs.wisc.edu setFlags, %(op_class)s) 2278610Snilay@cs.wisc.edu { 2288610Snilay@cs.wisc.edu %(constructor)s; 2298610Snilay@cs.wisc.edu } 2308610Snilay@cs.wisc.edu}}; 2318610Snilay@cs.wisc.edu 2328610Snilay@cs.wisc.edulet {{ 2338610Snilay@cs.wisc.edu class MfenceOp(X86Microop): 2348610Snilay@cs.wisc.edu def __init__(self): 2358610Snilay@cs.wisc.edu self.className = "Mfence" 2368610Snilay@cs.wisc.edu self.mnemonic = "mfence" 2378610Snilay@cs.wisc.edu self.instFlags = "| (1ULL << StaticInst::IsMemBarrier)" 2388610Snilay@cs.wisc.edu 2398610Snilay@cs.wisc.edu def getAllocator(self, microFlags): 2408610Snilay@cs.wisc.edu allocString = ''' 2418610Snilay@cs.wisc.edu (StaticInstPtr)(new %(class_name)s(machInst, 2428610Snilay@cs.wisc.edu macrocodeBlock, %(flags)s)) 2438610Snilay@cs.wisc.edu ''' 2448610Snilay@cs.wisc.edu allocator = allocString % { 2458610Snilay@cs.wisc.edu "class_name" : self.className, 2468610Snilay@cs.wisc.edu "mnemonic" : self.mnemonic, 2478610Snilay@cs.wisc.edu "flags" : self.microFlagsText(microFlags) + self.instFlags} 2488610Snilay@cs.wisc.edu return allocator 2498610Snilay@cs.wisc.edu 2508610Snilay@cs.wisc.edu microopClasses["mfence"] = MfenceOp 2518610Snilay@cs.wisc.edu}}; 2528610Snilay@cs.wisc.edu 2538610Snilay@cs.wisc.edulet {{ 2548610Snilay@cs.wisc.edu # Build up the all register version of this micro op 2558610Snilay@cs.wisc.edu iop = InstObjParams("mfence", "Mfence", 'X86MicroopBase', 2568610Snilay@cs.wisc.edu {"code" : ""}) 2578610Snilay@cs.wisc.edu header_output += MicroFenceOpDeclare.subst(iop) 2588610Snilay@cs.wisc.edu decoder_output += MicroFenceOpConstructor.subst(iop) 2598610Snilay@cs.wisc.edu exec_output += BasicExecute.subst(iop) 2608610Snilay@cs.wisc.edu}}; 261