seqop.isa revision 7087:fb8d5786ff30 
1// Copyright (c) 2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder.  You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38output header {{
39    class SeqOpBase : public X86ISA::X86MicroopBase
40    {
41      protected:
42        uint16_t target;
43        uint8_t cc;
44
45      public:
46        SeqOpBase(ExtMachInst _machInst, const char * instMnem,
47                const char * mnemonic,
48                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
49                uint16_t _target, uint8_t _cc);
50
51        SeqOpBase(ExtMachInst _machInst, const char * instMnem,
52                const char * mnemonic,
53                uint16_t _target, uint8_t _cc);
54
55        std::string generateDisassembly(Addr pc,
56                const SymbolTable *symtab) const;
57    };
58}};
59
60def template SeqOpDeclare {{
61    class %(class_name)s : public %(base_class)s
62    {
63      private:
64        void buildMe();
65      public:
66        %(class_name)s(ExtMachInst _machInst, const char * instMnem,
67                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
68                uint16_t _target, uint8_t _cc);
69
70        %(class_name)s(ExtMachInst _machInst, const char * instMnem,
71                uint16_t _target, uint8_t _cc);
72
73        %(BasicExecDeclare)s
74    };
75}};
76
77def template SeqOpExecute {{
78        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
79                Trace::InstRecord *traceData) const
80        {
81            %(op_decl)s;
82            %(op_rd)s;
83            if (%(cond_test)s) {
84                %(code)s;
85            } else {
86                %(else_code)s;
87            }
88            %(op_wb)s;
89            return NoFault;
90        }
91}};
92
93output decoder {{
94    inline SeqOpBase::SeqOpBase(
95            ExtMachInst machInst, const char * mnemonic, const char * instMnem,
96            uint16_t _target, uint8_t _cc) :
97        X86MicroopBase(machInst, mnemonic, instMnem,
98                false, false, false, false, No_OpClass),
99        target(_target), cc(_cc)
100    {
101    }
102
103    inline SeqOpBase::SeqOpBase(
104            ExtMachInst machInst, const char * mnemonic, const char * instMnem,
105            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
106            uint16_t _target, uint8_t _cc) :
107        X86MicroopBase(machInst, mnemonic, instMnem,
108                isMicro, isDelayed, isFirst, isLast, No_OpClass),
109                target(_target), cc(_cc)
110    {
111    }
112}};
113
114def template SeqOpConstructor {{
115
116    inline void %(class_name)s::buildMe()
117    {
118        %(constructor)s;
119    }
120
121    inline %(class_name)s::%(class_name)s(
122            ExtMachInst machInst, const char * instMnem,
123            uint16_t _target, uint8_t _cc) :
124        %(base_class)s(machInst, "%(mnemonic)s", instMnem, _target, _cc)
125    {
126        buildMe();
127    }
128
129    inline %(class_name)s::%(class_name)s(
130            ExtMachInst machInst, const char * instMnem,
131            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
132            uint16_t _target, uint8_t _cc) :
133        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
134                isMicro, isDelayed, isFirst, isLast, _target, _cc)
135    {
136        buildMe();
137    }
138}};
139
140output decoder {{
141    std::string SeqOpBase::generateDisassembly(Addr pc,
142            const SymbolTable *symtab) const
143    {
144        std::stringstream response;
145
146        printMnemonic(response, instMnem, mnemonic);
147        ccprintf(response, "%#x", target);
148
149        return response.str();
150    }
151}};
152
153let {{
154    class SeqOp(X86Microop):
155        def __init__(self, target, flags=None):
156            self.target = target
157            if flags:
158                if not isinstance(flags, (list, tuple)):
159                    raise Exception, "flags must be a list or tuple of flags"
160                self.cond = " | ".join(flags)
161                self.className += "Flags"
162            else:
163                self.cond = "0"
164
165        def getAllocator(self, *microFlags):
166            allocator = '''new %(class_name)s(machInst, macrocodeBlock
167                    %(flags)s, %(target)s, %(cc)s)''' % {
168                "class_name" : self.className,
169                "flags" : self.microFlagsText(microFlags),
170                "target" : self.target,
171                "cc" : self.cond}
172            return allocator
173
174    class Br(SeqOp):
175        className = "MicroBranch"
176
177        def getAllocator(self, *microFlags):
178            (is_micro, is_delayed, is_first, is_last) = microFlags
179            is_last = False
180            is_delayed = True
181            microFlags = (is_micro, is_delayed, is_first, is_last)
182            return super(Br, self).getAllocator(*microFlags)
183
184    class Eret(SeqOp):
185        target = "normalMicroPC(0)"
186        className = "Eret"
187
188        def __init__(self, flags=None):
189            if flags:
190                if not isinstance(flags, (list, tuple)):
191                    raise Exception, "flags must be a list or tuple of flags"
192                self.cond = " | ".join(flags)
193                self.className += "Flags"
194            else:
195                self.cond = "0"
196
197        def getAllocator(self, *microFlags):
198            (is_micro, is_delayed, is_first, is_last) = microFlags
199            is_last = True
200            is_delayed = False
201            microFlags = (is_micro, is_delayed, is_first, is_last)
202            return super(Eret, self).getAllocator(*microFlags)
203
204    iop = InstObjParams("br", "MicroBranchFlags", "SeqOpBase",
205            {"code": "nuIP = target",
206             "else_code": "nuIP = nuIP",
207             "cond_test": "checkCondition(ccFlagBits, cc)"})
208    exec_output += SeqOpExecute.subst(iop)
209    header_output += SeqOpDeclare.subst(iop)
210    decoder_output += SeqOpConstructor.subst(iop)
211    iop = InstObjParams("br", "MicroBranch", "SeqOpBase",
212            {"code": "nuIP = target",
213             "else_code": "nuIP = nuIP",
214             "cond_test": "true"})
215    exec_output += SeqOpExecute.subst(iop)
216    header_output += SeqOpDeclare.subst(iop)
217    decoder_output += SeqOpConstructor.subst(iop)
218    microopClasses["br"] = Br
219
220    iop = InstObjParams("eret", "EretFlags", "SeqOpBase",
221            {"code": "", "else_code": "",
222             "cond_test": "checkCondition(ccFlagBits, cc)"})
223    exec_output += SeqOpExecute.subst(iop)
224    header_output += SeqOpDeclare.subst(iop)
225    decoder_output += SeqOpConstructor.subst(iop)
226    iop = InstObjParams("eret", "Eret", "SeqOpBase",
227            {"code": "", "else_code": "",
228             "cond_test": "true"})
229    exec_output += SeqOpExecute.subst(iop)
230    header_output += SeqOpDeclare.subst(iop)
231    decoder_output += SeqOpConstructor.subst(iop)
232    microopClasses["eret"] = Eret
233}};
234