ldstop.isa revision 7620
17087Snate@binkert.org// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 27087Snate@binkert.org// All rights reserved. 37087Snate@binkert.org// 47087Snate@binkert.org// The license below extends only to copyright in the software and shall 57087Snate@binkert.org// not be construed as granting a license to any other intellectual 67087Snate@binkert.org// property including but not limited to intellectual property relating 77087Snate@binkert.org// to a hardware implementation of the functionality of the software 87087Snate@binkert.org// licensed hereunder. You may use the software subject to the license 97087Snate@binkert.org// terms below provided that you ensure that this notice is replicated 107087Snate@binkert.org// unmodified and in its entirety in all distributions of the software, 117087Snate@binkert.org// modified or unmodified, in source code or in binary form. 127087Snate@binkert.org// 135359Sgblack@eecs.umich.edu// Copyright (c) 2008 The Regents of The University of Michigan 145359Sgblack@eecs.umich.edu// All rights reserved. 155359Sgblack@eecs.umich.edu// 165359Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 175359Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 185359Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 195359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 205359Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 215359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 225359Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 235359Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 245359Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 255359Sgblack@eecs.umich.edu// this software without specific prior written permission. 265359Sgblack@eecs.umich.edu// 275359Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 285359Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 295359Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 305359Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 315359Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 325359Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 335359Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 345359Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 355359Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 365359Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 375359Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 385359Sgblack@eecs.umich.edu// 395359Sgblack@eecs.umich.edu// Authors: Gabe Black 405359Sgblack@eecs.umich.edu 414561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 424561Sgblack@eecs.umich.edu// 434561Sgblack@eecs.umich.edu// LdStOp Microop templates 444561Sgblack@eecs.umich.edu// 454561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 464561Sgblack@eecs.umich.edu 474601Sgblack@eecs.umich.edu// LEA template 484601Sgblack@eecs.umich.edu 494601Sgblack@eecs.umich.edudef template MicroLeaExecute {{ 504601Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 514601Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 524601Sgblack@eecs.umich.edu { 534601Sgblack@eecs.umich.edu Fault fault = NoFault; 544601Sgblack@eecs.umich.edu Addr EA; 554601Sgblack@eecs.umich.edu 564601Sgblack@eecs.umich.edu %(op_decl)s; 574601Sgblack@eecs.umich.edu %(op_rd)s; 584601Sgblack@eecs.umich.edu %(ea_code)s; 594601Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 604601Sgblack@eecs.umich.edu 614601Sgblack@eecs.umich.edu %(code)s; 624601Sgblack@eecs.umich.edu if(fault == NoFault) 634601Sgblack@eecs.umich.edu { 644601Sgblack@eecs.umich.edu %(op_wb)s; 654601Sgblack@eecs.umich.edu } 664601Sgblack@eecs.umich.edu 674601Sgblack@eecs.umich.edu return fault; 684601Sgblack@eecs.umich.edu } 694601Sgblack@eecs.umich.edu}}; 704601Sgblack@eecs.umich.edu 714601Sgblack@eecs.umich.edudef template MicroLeaDeclare {{ 724601Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 734601Sgblack@eecs.umich.edu { 744601Sgblack@eecs.umich.edu protected: 754601Sgblack@eecs.umich.edu void buildMe(); 764601Sgblack@eecs.umich.edu 774601Sgblack@eecs.umich.edu public: 784601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 797620Sgblack@eecs.umich.edu const char * instMnem, uint64_t setFlags, 806345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 816345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 826345Sgblack@eecs.umich.edu InstRegIndex _data, 835912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 845912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 854601Sgblack@eecs.umich.edu 864601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 874601Sgblack@eecs.umich.edu const char * instMnem, 886345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 896345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 906345Sgblack@eecs.umich.edu InstRegIndex _data, 915912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 925912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 934601Sgblack@eecs.umich.edu 944601Sgblack@eecs.umich.edu %(BasicExecDeclare)s 954601Sgblack@eecs.umich.edu }; 964601Sgblack@eecs.umich.edu}}; 974601Sgblack@eecs.umich.edu 984601Sgblack@eecs.umich.edu// Load templates 994601Sgblack@eecs.umich.edu 1004587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1014587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1024587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1034587Sgblack@eecs.umich.edu { 1044587Sgblack@eecs.umich.edu Fault fault = NoFault; 1054587Sgblack@eecs.umich.edu Addr EA; 1064587Sgblack@eecs.umich.edu 1074587Sgblack@eecs.umich.edu %(op_decl)s; 1084587Sgblack@eecs.umich.edu %(op_rd)s; 1094587Sgblack@eecs.umich.edu %(ea_code)s; 1104587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1114587Sgblack@eecs.umich.edu 1125912Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, memFlags); 1134720Sgblack@eecs.umich.edu 1145920Sgblack@eecs.umich.edu if (fault == NoFault) { 1154587Sgblack@eecs.umich.edu %(code)s; 1166736Sgblack@eecs.umich.edu } else if (memFlags & Request::PREFETCH) { 1175920Sgblack@eecs.umich.edu // For prefetches, ignore any faults/exceptions. 1185920Sgblack@eecs.umich.edu return NoFault; 1194587Sgblack@eecs.umich.edu } 1204587Sgblack@eecs.umich.edu if(fault == NoFault) 1214587Sgblack@eecs.umich.edu { 1224587Sgblack@eecs.umich.edu %(op_wb)s; 1234587Sgblack@eecs.umich.edu } 1244587Sgblack@eecs.umich.edu 1254587Sgblack@eecs.umich.edu return fault; 1264587Sgblack@eecs.umich.edu } 1274587Sgblack@eecs.umich.edu}}; 1284587Sgblack@eecs.umich.edu 1294587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1304587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1314587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1324587Sgblack@eecs.umich.edu { 1334587Sgblack@eecs.umich.edu Fault fault = NoFault; 1344587Sgblack@eecs.umich.edu Addr EA; 1354587Sgblack@eecs.umich.edu 1364587Sgblack@eecs.umich.edu %(op_decl)s; 1374587Sgblack@eecs.umich.edu %(op_rd)s; 1384587Sgblack@eecs.umich.edu %(ea_code)s; 1394587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1404587Sgblack@eecs.umich.edu 1415912Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, memFlags); 1424587Sgblack@eecs.umich.edu 1434587Sgblack@eecs.umich.edu return fault; 1444587Sgblack@eecs.umich.edu } 1454587Sgblack@eecs.umich.edu}}; 1464587Sgblack@eecs.umich.edu 1474587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1484587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1494587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1504587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1514587Sgblack@eecs.umich.edu { 1524587Sgblack@eecs.umich.edu Fault fault = NoFault; 1534587Sgblack@eecs.umich.edu 1544587Sgblack@eecs.umich.edu %(op_decl)s; 1554587Sgblack@eecs.umich.edu %(op_rd)s; 1564587Sgblack@eecs.umich.edu 1575727Sgblack@eecs.umich.edu Mem = get(pkt); 1585002Sgblack@eecs.umich.edu 1594587Sgblack@eecs.umich.edu %(code)s; 1604587Sgblack@eecs.umich.edu 1614587Sgblack@eecs.umich.edu if(fault == NoFault) 1624587Sgblack@eecs.umich.edu { 1634587Sgblack@eecs.umich.edu %(op_wb)s; 1644587Sgblack@eecs.umich.edu } 1654587Sgblack@eecs.umich.edu 1664587Sgblack@eecs.umich.edu return fault; 1674587Sgblack@eecs.umich.edu } 1684587Sgblack@eecs.umich.edu}}; 1694587Sgblack@eecs.umich.edu 1704587Sgblack@eecs.umich.edu// Store templates 1714587Sgblack@eecs.umich.edu 1724587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 1734587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 1744587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1754587Sgblack@eecs.umich.edu { 1764587Sgblack@eecs.umich.edu Fault fault = NoFault; 1774587Sgblack@eecs.umich.edu 1784587Sgblack@eecs.umich.edu Addr EA; 1794587Sgblack@eecs.umich.edu %(op_decl)s; 1804587Sgblack@eecs.umich.edu %(op_rd)s; 1814587Sgblack@eecs.umich.edu %(ea_code)s; 1824587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1834587Sgblack@eecs.umich.edu 1844587Sgblack@eecs.umich.edu %(code)s; 1854587Sgblack@eecs.umich.edu 1864587Sgblack@eecs.umich.edu if(fault == NoFault) 1874587Sgblack@eecs.umich.edu { 1885912Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, memFlags); 1894767Sgblack@eecs.umich.edu if(fault == NoFault) 1904720Sgblack@eecs.umich.edu { 1915892Sgblack@eecs.umich.edu %(post_code)s; 1924767Sgblack@eecs.umich.edu %(op_wb)s; 1934720Sgblack@eecs.umich.edu } 1944587Sgblack@eecs.umich.edu } 1954587Sgblack@eecs.umich.edu 1964587Sgblack@eecs.umich.edu return fault; 1974587Sgblack@eecs.umich.edu } 1984587Sgblack@eecs.umich.edu}}; 1994587Sgblack@eecs.umich.edu 2004587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2014587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2024587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2034587Sgblack@eecs.umich.edu { 2044587Sgblack@eecs.umich.edu Fault fault = NoFault; 2054587Sgblack@eecs.umich.edu 2064587Sgblack@eecs.umich.edu Addr EA; 2074587Sgblack@eecs.umich.edu %(op_decl)s; 2084587Sgblack@eecs.umich.edu %(op_rd)s; 2094587Sgblack@eecs.umich.edu %(ea_code)s; 2104587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2114587Sgblack@eecs.umich.edu 2124587Sgblack@eecs.umich.edu %(code)s; 2134587Sgblack@eecs.umich.edu 2144587Sgblack@eecs.umich.edu if(fault == NoFault) 2154587Sgblack@eecs.umich.edu { 2165912Sgblack@eecs.umich.edu write(xc, Mem, EA, memFlags); 2174587Sgblack@eecs.umich.edu } 2184587Sgblack@eecs.umich.edu return fault; 2194587Sgblack@eecs.umich.edu } 2204587Sgblack@eecs.umich.edu}}; 2214587Sgblack@eecs.umich.edu 2224587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 2235892Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 2245892Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, Trace::InstRecord * traceData) const 2254587Sgblack@eecs.umich.edu { 2265892Sgblack@eecs.umich.edu %(op_decl)s; 2275892Sgblack@eecs.umich.edu %(op_rd)s; 2285892Sgblack@eecs.umich.edu %(complete_code)s; 2295892Sgblack@eecs.umich.edu %(op_wb)s; 2304587Sgblack@eecs.umich.edu return NoFault; 2314587Sgblack@eecs.umich.edu } 2324587Sgblack@eecs.umich.edu}}; 2334587Sgblack@eecs.umich.edu 2344587Sgblack@eecs.umich.edu// Common templates 2354587Sgblack@eecs.umich.edu 2364587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2374587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2384587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2394587Sgblack@eecs.umich.edu}}; 2404587Sgblack@eecs.umich.edu 2414587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2424587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2434587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2444587Sgblack@eecs.umich.edu}}; 2454587Sgblack@eecs.umich.edu 2464587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 2474587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2484587Sgblack@eecs.umich.edu { 2494587Sgblack@eecs.umich.edu protected: 2504561Sgblack@eecs.umich.edu void buildMe(); 2514561Sgblack@eecs.umich.edu 2524561Sgblack@eecs.umich.edu public: 2534561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2547620Sgblack@eecs.umich.edu const char * instMnem, uint64_t setFlags, 2556345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 2566345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 2576345Sgblack@eecs.umich.edu InstRegIndex _data, 2585912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 2595912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 2604561Sgblack@eecs.umich.edu 2614561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2624561Sgblack@eecs.umich.edu const char * instMnem, 2636345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 2646345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 2656345Sgblack@eecs.umich.edu InstRegIndex _data, 2665912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 2675912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 2684561Sgblack@eecs.umich.edu 2694561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2704587Sgblack@eecs.umich.edu 2714587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 2724587Sgblack@eecs.umich.edu 2734587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 2744561Sgblack@eecs.umich.edu }; 2754561Sgblack@eecs.umich.edu}}; 2764561Sgblack@eecs.umich.edu 2774561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 2784561Sgblack@eecs.umich.edu 2794561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 2804561Sgblack@eecs.umich.edu { 2814561Sgblack@eecs.umich.edu %(constructor)s; 2824561Sgblack@eecs.umich.edu } 2834561Sgblack@eecs.umich.edu 2844561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 2854561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 2866345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 2876345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 2886345Sgblack@eecs.umich.edu InstRegIndex _data, 2895912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 2905912Sgblack@eecs.umich.edu Request::FlagsType _memFlags) : 2917620Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 0, 2924587Sgblack@eecs.umich.edu _scale, _index, _base, 2934587Sgblack@eecs.umich.edu _disp, _segment, _data, 2945912Sgblack@eecs.umich.edu _dataSize, _addressSize, _memFlags, %(op_class)s) 2954561Sgblack@eecs.umich.edu { 2964561Sgblack@eecs.umich.edu buildMe(); 2974561Sgblack@eecs.umich.edu } 2984561Sgblack@eecs.umich.edu 2994561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3007620Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, uint64_t setFlags, 3016345Sgblack@eecs.umich.edu uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 3026345Sgblack@eecs.umich.edu uint64_t _disp, InstRegIndex _segment, 3036345Sgblack@eecs.umich.edu InstRegIndex _data, 3045912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 3055912Sgblack@eecs.umich.edu Request::FlagsType _memFlags) : 3067620Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, 3074587Sgblack@eecs.umich.edu _scale, _index, _base, 3084587Sgblack@eecs.umich.edu _disp, _segment, _data, 3095912Sgblack@eecs.umich.edu _dataSize, _addressSize, _memFlags, %(op_class)s) 3104561Sgblack@eecs.umich.edu { 3114561Sgblack@eecs.umich.edu buildMe(); 3124561Sgblack@eecs.umich.edu } 3134561Sgblack@eecs.umich.edu}}; 3144561Sgblack@eecs.umich.edu 3154587Sgblack@eecs.umich.edulet {{ 3164587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3175912Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp, 3185920Sgblack@eecs.umich.edu dataSize, addressSize, baseFlags, atCPL0, prefetch): 3194587Sgblack@eecs.umich.edu self.data = data 3204587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 3214587Sgblack@eecs.umich.edu self.disp = disp 3224587Sgblack@eecs.umich.edu self.segment = segment 3234712Sgblack@eecs.umich.edu self.dataSize = dataSize 3245149Sgblack@eecs.umich.edu self.addressSize = addressSize 3255912Sgblack@eecs.umich.edu self.memFlags = baseFlags 3265912Sgblack@eecs.umich.edu if atCPL0: 3275912Sgblack@eecs.umich.edu self.memFlags += " | (CPL0FlagBit << FlagShift)" 3285920Sgblack@eecs.umich.edu if prefetch: 3296736Sgblack@eecs.umich.edu self.memFlags += " | Request::PREFETCH" 3305965Sgblack@eecs.umich.edu self.memFlags += " | (machInst.legacy.addr ? " + \ 3315965Sgblack@eecs.umich.edu "(AddrSizeFlagBit << FlagShift) : 0)" 3324587Sgblack@eecs.umich.edu 3337620Sgblack@eecs.umich.edu def getAllocator(self, microFlags): 3347620Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, macrocodeBlock, 3354587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 3364587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 3375912Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s, %(memFlags)s)''' % { 3384587Sgblack@eecs.umich.edu "class_name" : self.className, 3394587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 3404587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 3414587Sgblack@eecs.umich.edu "base" : self.base, 3424587Sgblack@eecs.umich.edu "disp" : self.disp, 3434587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 3445912Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize, 3455912Sgblack@eecs.umich.edu "memFlags" : self.memFlags} 3464587Sgblack@eecs.umich.edu return allocator 3474587Sgblack@eecs.umich.edu}}; 3484587Sgblack@eecs.umich.edu 3494587Sgblack@eecs.umich.edulet {{ 3504587Sgblack@eecs.umich.edu 3514587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 3524587Sgblack@eecs.umich.edu # them will always work. 3534587Sgblack@eecs.umich.edu header_output = "" 3544587Sgblack@eecs.umich.edu decoder_output = "" 3554587Sgblack@eecs.umich.edu exec_output = "" 3564587Sgblack@eecs.umich.edu 3575969Sgblack@eecs.umich.edu calculateEA = ''' 3585969Sgblack@eecs.umich.edu EA = bits(SegBase + scale * Index + Base + disp, addressSize * 8 - 1, 0); 3595969Sgblack@eecs.umich.edu ''' 3604587Sgblack@eecs.umich.edu 3615912Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code, mem_flags="0"): 3624587Sgblack@eecs.umich.edu global header_output 3634587Sgblack@eecs.umich.edu global decoder_output 3644587Sgblack@eecs.umich.edu global exec_output 3654587Sgblack@eecs.umich.edu global microopClasses 3664587Sgblack@eecs.umich.edu Name = mnemonic 3674587Sgblack@eecs.umich.edu name = mnemonic.lower() 3684587Sgblack@eecs.umich.edu 3694587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 3704679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 3715118Sgblack@eecs.umich.edu {"code": code, 3725912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 3734587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 3744587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 3754587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 3764587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 3774587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 3784587Sgblack@eecs.umich.edu 3794587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 3805149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 3815912Sgblack@eecs.umich.edu dataSize="env.dataSize", 3825912Sgblack@eecs.umich.edu addressSize="env.addressSize", 3835920Sgblack@eecs.umich.edu atCPL0=False, prefetch=False): 3845912Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, addr, 3855920Sgblack@eecs.umich.edu disp, dataSize, addressSize, mem_flags, 3865920Sgblack@eecs.umich.edu atCPL0, prefetch) 3874587Sgblack@eecs.umich.edu self.className = Name 3884587Sgblack@eecs.umich.edu self.mnemonic = name 3894587Sgblack@eecs.umich.edu 3904587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 3914587Sgblack@eecs.umich.edu 3924587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 3935912Sgblack@eecs.umich.edu defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 3946132Sgblack@eecs.umich.edu '(StoreCheck << FlagShift)') 3956079Sgblack@eecs.umich.edu defineMicroLoadOp('Ldstl', 'Data = merge(Data, Mem, dataSize);', 3966132Sgblack@eecs.umich.edu '(StoreCheck << FlagShift) | Request::LOCKED') 3975027Sgblack@eecs.umich.edu defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;') 3984587Sgblack@eecs.umich.edu 3995892Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code, \ 4005965Sgblack@eecs.umich.edu postCode="", completeCode="", mem_flags="0"): 4014587Sgblack@eecs.umich.edu global header_output 4024587Sgblack@eecs.umich.edu global decoder_output 4034587Sgblack@eecs.umich.edu global exec_output 4044587Sgblack@eecs.umich.edu global microopClasses 4054587Sgblack@eecs.umich.edu Name = mnemonic 4064587Sgblack@eecs.umich.edu name = mnemonic.lower() 4074587Sgblack@eecs.umich.edu 4084587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4094679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4105118Sgblack@eecs.umich.edu {"code": code, 4115892Sgblack@eecs.umich.edu "post_code": postCode, 4125892Sgblack@eecs.umich.edu "complete_code": completeCode, 4135912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 4144587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4154587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4164587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4174587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4184587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4194587Sgblack@eecs.umich.edu 4204587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4215149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4225912Sgblack@eecs.umich.edu dataSize="env.dataSize", 4235912Sgblack@eecs.umich.edu addressSize="env.addressSize", 4245912Sgblack@eecs.umich.edu atCPL0=False): 4255912Sgblack@eecs.umich.edu super(StoreOp, self).__init__(data, segment, addr, 4265920Sgblack@eecs.umich.edu disp, dataSize, addressSize, mem_flags, atCPL0, False) 4274587Sgblack@eecs.umich.edu self.className = Name 4284587Sgblack@eecs.umich.edu self.mnemonic = name 4294587Sgblack@eecs.umich.edu 4304587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4314587Sgblack@eecs.umich.edu 4325919Sgblack@eecs.umich.edu defineMicroStoreOp('St', 'Mem = pick(Data, 2, dataSize);') 4336080Sgblack@eecs.umich.edu defineMicroStoreOp('Stul', 'Mem = pick(Data, 2, dataSize);', 4346080Sgblack@eecs.umich.edu mem_flags="Request::LOCKED") 4355027Sgblack@eecs.umich.edu defineMicroStoreOp('Stfp', 'Mem = FpData.uqw;') 4365919Sgblack@eecs.umich.edu defineMicroStoreOp('Stupd', 'Mem = pick(Data, 2, dataSize);', 4375892Sgblack@eecs.umich.edu 'Base = merge(Base, EA - SegBase, addressSize);', 4385892Sgblack@eecs.umich.edu 'Base = merge(Base, pkt->req->getVaddr() - SegBase, addressSize);'); 4395892Sgblack@eecs.umich.edu defineMicroStoreOp('Cda', 'Mem = 0;', mem_flags="Request::NO_ACCESS") 4404601Sgblack@eecs.umich.edu 4414679Sgblack@eecs.umich.edu iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp', 4425118Sgblack@eecs.umich.edu {"code": "Data = merge(Data, EA, dataSize);", 4436056Sgblack@eecs.umich.edu "ea_code": ''' 4446056Sgblack@eecs.umich.edu EA = bits(scale * Index + Base + disp, addressSize * 8 - 1, 0); 4456056Sgblack@eecs.umich.edu '''}) 4464601Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4474601Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4484601Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4494601Sgblack@eecs.umich.edu 4504601Sgblack@eecs.umich.edu class LeaOp(LdStOp): 4515149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4525149Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4534712Sgblack@eecs.umich.edu super(LeaOp, self).__init__(data, segment, 4545920Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "0", False, False) 4554601Sgblack@eecs.umich.edu self.className = "Lea" 4564601Sgblack@eecs.umich.edu self.mnemonic = "lea" 4574601Sgblack@eecs.umich.edu 4584601Sgblack@eecs.umich.edu microopClasses["lea"] = LeaOp 4595178Sgblack@eecs.umich.edu 4605178Sgblack@eecs.umich.edu 4615359Sgblack@eecs.umich.edu iop = InstObjParams("tia", "Tia", 'X86ISA::LdStOp', 4625359Sgblack@eecs.umich.edu {"code": "xc->demapPage(EA, 0);", 4635912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 4645359Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4655359Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4665359Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4675359Sgblack@eecs.umich.edu 4685359Sgblack@eecs.umich.edu class TiaOp(LdStOp): 4695359Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 4705912Sgblack@eecs.umich.edu dataSize="env.dataSize", 4715912Sgblack@eecs.umich.edu addressSize="env.addressSize"): 4726345Sgblack@eecs.umich.edu super(TiaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, 4735920Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "0", False, False) 4745359Sgblack@eecs.umich.edu self.className = "Tia" 4755359Sgblack@eecs.umich.edu self.mnemonic = "tia" 4765359Sgblack@eecs.umich.edu 4775359Sgblack@eecs.umich.edu microopClasses["tia"] = TiaOp 4785359Sgblack@eecs.umich.edu 4795178Sgblack@eecs.umich.edu class CdaOp(LdStOp): 4805178Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 4815912Sgblack@eecs.umich.edu dataSize="env.dataSize", 4825912Sgblack@eecs.umich.edu addressSize="env.addressSize", atCPL0=False): 4836345Sgblack@eecs.umich.edu super(CdaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, 4846624Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "Request::NO_ACCESS", 4856624Sgblack@eecs.umich.edu atCPL0, False) 4865178Sgblack@eecs.umich.edu self.className = "Cda" 4875178Sgblack@eecs.umich.edu self.mnemonic = "cda" 4885178Sgblack@eecs.umich.edu 4895178Sgblack@eecs.umich.edu microopClasses["cda"] = CdaOp 4904587Sgblack@eecs.umich.edu}}; 4914587Sgblack@eecs.umich.edu 492