ldstop.isa revision 5965
15359Sgblack@eecs.umich.edu// Copyright (c) 2008 The Regents of The University of Michigan 25359Sgblack@eecs.umich.edu// All rights reserved. 35359Sgblack@eecs.umich.edu// 45359Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 55359Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 65359Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 75359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 85359Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 95359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 105359Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 115359Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 125359Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 135359Sgblack@eecs.umich.edu// this software without specific prior written permission. 145359Sgblack@eecs.umich.edu// 155359Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 165359Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 175359Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 185359Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 195359Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 205359Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 215359Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 225359Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 235359Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 245359Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 255359Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 265359Sgblack@eecs.umich.edu// 275359Sgblack@eecs.umich.edu// Authors: Gabe Black 285359Sgblack@eecs.umich.edu 295359Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 304561Sgblack@eecs.umich.edu// All rights reserved. 314561Sgblack@eecs.umich.edu// 324561Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 334561Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 344561Sgblack@eecs.umich.edu// following conditions are met: 354561Sgblack@eecs.umich.edu// 364561Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 374561Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 384561Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 394561Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 404561Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 414561Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 424561Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 434561Sgblack@eecs.umich.edu// commercial advantage. 444561Sgblack@eecs.umich.edu// 454561Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 464561Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 474561Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 484561Sgblack@eecs.umich.edu// Office of Strategy and Technology 494561Sgblack@eecs.umich.edu// Hewlett-Packard Company 504561Sgblack@eecs.umich.edu// 1501 Page Mill Road 514561Sgblack@eecs.umich.edu// Palo Alto, California 94304 524561Sgblack@eecs.umich.edu// 534561Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 544561Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 554561Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 564561Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 574561Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 584561Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 594561Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 604561Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 614561Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 624561Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 634561Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 644561Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 654561Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 664561Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 674561Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 684561Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 694561Sgblack@eecs.umich.edu// 704561Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 714561Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 724561Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 734561Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 744561Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 754561Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 764561Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 774561Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 784561Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 794561Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 804561Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 814561Sgblack@eecs.umich.edu// 824561Sgblack@eecs.umich.edu// Authors: Gabe Black 834561Sgblack@eecs.umich.edu 844561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 854561Sgblack@eecs.umich.edu// 864561Sgblack@eecs.umich.edu// LdStOp Microop templates 874561Sgblack@eecs.umich.edu// 884561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 894561Sgblack@eecs.umich.edu 904601Sgblack@eecs.umich.edu// LEA template 914601Sgblack@eecs.umich.edu 924601Sgblack@eecs.umich.edudef template MicroLeaExecute {{ 934601Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 944601Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 954601Sgblack@eecs.umich.edu { 964601Sgblack@eecs.umich.edu Fault fault = NoFault; 974601Sgblack@eecs.umich.edu Addr EA; 984601Sgblack@eecs.umich.edu 994601Sgblack@eecs.umich.edu %(op_decl)s; 1004601Sgblack@eecs.umich.edu %(op_rd)s; 1014601Sgblack@eecs.umich.edu %(ea_code)s; 1024601Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1034601Sgblack@eecs.umich.edu 1044601Sgblack@eecs.umich.edu %(code)s; 1054601Sgblack@eecs.umich.edu if(fault == NoFault) 1064601Sgblack@eecs.umich.edu { 1074601Sgblack@eecs.umich.edu %(op_wb)s; 1084601Sgblack@eecs.umich.edu } 1094601Sgblack@eecs.umich.edu 1104601Sgblack@eecs.umich.edu return fault; 1114601Sgblack@eecs.umich.edu } 1124601Sgblack@eecs.umich.edu}}; 1134601Sgblack@eecs.umich.edu 1144601Sgblack@eecs.umich.edudef template MicroLeaDeclare {{ 1154601Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 1164601Sgblack@eecs.umich.edu { 1174601Sgblack@eecs.umich.edu protected: 1184601Sgblack@eecs.umich.edu void buildMe(); 1194601Sgblack@eecs.umich.edu 1204601Sgblack@eecs.umich.edu public: 1214601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1224601Sgblack@eecs.umich.edu const char * instMnem, 1234601Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 1244601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1254601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1264601Sgblack@eecs.umich.edu RegIndex _data, 1275912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 1285912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 1294601Sgblack@eecs.umich.edu 1304601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1314601Sgblack@eecs.umich.edu const char * instMnem, 1324601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1334601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1344601Sgblack@eecs.umich.edu RegIndex _data, 1355912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 1365912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 1374601Sgblack@eecs.umich.edu 1384601Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1394601Sgblack@eecs.umich.edu }; 1404601Sgblack@eecs.umich.edu}}; 1414601Sgblack@eecs.umich.edu 1424601Sgblack@eecs.umich.edu// Load templates 1434601Sgblack@eecs.umich.edu 1444587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1454587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1464587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1474587Sgblack@eecs.umich.edu { 1484587Sgblack@eecs.umich.edu Fault fault = NoFault; 1494587Sgblack@eecs.umich.edu Addr EA; 1504587Sgblack@eecs.umich.edu 1514587Sgblack@eecs.umich.edu %(op_decl)s; 1524587Sgblack@eecs.umich.edu %(op_rd)s; 1534587Sgblack@eecs.umich.edu %(ea_code)s; 1544587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1554587Sgblack@eecs.umich.edu 1565912Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, memFlags); 1574720Sgblack@eecs.umich.edu 1585920Sgblack@eecs.umich.edu if (fault == NoFault) { 1594587Sgblack@eecs.umich.edu %(code)s; 1605920Sgblack@eecs.umich.edu } else if (memFlags & Request::PF_EXCLUSIVE) { 1615920Sgblack@eecs.umich.edu // For prefetches, ignore any faults/exceptions. 1625920Sgblack@eecs.umich.edu return NoFault; 1634587Sgblack@eecs.umich.edu } 1644587Sgblack@eecs.umich.edu if(fault == NoFault) 1654587Sgblack@eecs.umich.edu { 1664587Sgblack@eecs.umich.edu %(op_wb)s; 1674587Sgblack@eecs.umich.edu } 1684587Sgblack@eecs.umich.edu 1694587Sgblack@eecs.umich.edu return fault; 1704587Sgblack@eecs.umich.edu } 1714587Sgblack@eecs.umich.edu}}; 1724587Sgblack@eecs.umich.edu 1734587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1744587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1754587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1764587Sgblack@eecs.umich.edu { 1774587Sgblack@eecs.umich.edu Fault fault = NoFault; 1784587Sgblack@eecs.umich.edu Addr EA; 1794587Sgblack@eecs.umich.edu 1804587Sgblack@eecs.umich.edu %(op_decl)s; 1814587Sgblack@eecs.umich.edu %(op_rd)s; 1824587Sgblack@eecs.umich.edu %(ea_code)s; 1834587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1844587Sgblack@eecs.umich.edu 1855912Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, memFlags); 1864587Sgblack@eecs.umich.edu 1874587Sgblack@eecs.umich.edu return fault; 1884587Sgblack@eecs.umich.edu } 1894587Sgblack@eecs.umich.edu}}; 1904587Sgblack@eecs.umich.edu 1914587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1924587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1934587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1944587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1954587Sgblack@eecs.umich.edu { 1964587Sgblack@eecs.umich.edu Fault fault = NoFault; 1974587Sgblack@eecs.umich.edu 1984587Sgblack@eecs.umich.edu %(op_decl)s; 1994587Sgblack@eecs.umich.edu %(op_rd)s; 2004587Sgblack@eecs.umich.edu 2015727Sgblack@eecs.umich.edu Mem = get(pkt); 2025002Sgblack@eecs.umich.edu 2034587Sgblack@eecs.umich.edu %(code)s; 2044587Sgblack@eecs.umich.edu 2054587Sgblack@eecs.umich.edu if(fault == NoFault) 2064587Sgblack@eecs.umich.edu { 2074587Sgblack@eecs.umich.edu %(op_wb)s; 2084587Sgblack@eecs.umich.edu } 2094587Sgblack@eecs.umich.edu 2104587Sgblack@eecs.umich.edu return fault; 2114587Sgblack@eecs.umich.edu } 2124587Sgblack@eecs.umich.edu}}; 2134587Sgblack@eecs.umich.edu 2144587Sgblack@eecs.umich.edu// Store templates 2154587Sgblack@eecs.umich.edu 2164587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 2174587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 2184587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2194587Sgblack@eecs.umich.edu { 2204587Sgblack@eecs.umich.edu Fault fault = NoFault; 2214587Sgblack@eecs.umich.edu 2224587Sgblack@eecs.umich.edu Addr EA; 2234587Sgblack@eecs.umich.edu %(op_decl)s; 2244587Sgblack@eecs.umich.edu %(op_rd)s; 2254587Sgblack@eecs.umich.edu %(ea_code)s; 2264587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2274587Sgblack@eecs.umich.edu 2284587Sgblack@eecs.umich.edu %(code)s; 2294587Sgblack@eecs.umich.edu 2304587Sgblack@eecs.umich.edu if(fault == NoFault) 2314587Sgblack@eecs.umich.edu { 2325912Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, memFlags); 2334767Sgblack@eecs.umich.edu if(fault == NoFault) 2344720Sgblack@eecs.umich.edu { 2355892Sgblack@eecs.umich.edu %(post_code)s; 2364767Sgblack@eecs.umich.edu %(op_wb)s; 2374720Sgblack@eecs.umich.edu } 2384587Sgblack@eecs.umich.edu } 2394587Sgblack@eecs.umich.edu 2404587Sgblack@eecs.umich.edu return fault; 2414587Sgblack@eecs.umich.edu } 2424587Sgblack@eecs.umich.edu}}; 2434587Sgblack@eecs.umich.edu 2444587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2454587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2464587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2474587Sgblack@eecs.umich.edu { 2484587Sgblack@eecs.umich.edu Fault fault = NoFault; 2494587Sgblack@eecs.umich.edu 2504587Sgblack@eecs.umich.edu Addr EA; 2514587Sgblack@eecs.umich.edu %(op_decl)s; 2524587Sgblack@eecs.umich.edu %(op_rd)s; 2534587Sgblack@eecs.umich.edu %(ea_code)s; 2544587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2554587Sgblack@eecs.umich.edu 2564587Sgblack@eecs.umich.edu %(code)s; 2574587Sgblack@eecs.umich.edu 2584587Sgblack@eecs.umich.edu if(fault == NoFault) 2594587Sgblack@eecs.umich.edu { 2605912Sgblack@eecs.umich.edu write(xc, Mem, EA, memFlags); 2614587Sgblack@eecs.umich.edu } 2624587Sgblack@eecs.umich.edu return fault; 2634587Sgblack@eecs.umich.edu } 2644587Sgblack@eecs.umich.edu}}; 2654587Sgblack@eecs.umich.edu 2664587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 2675892Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 2685892Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, Trace::InstRecord * traceData) const 2694587Sgblack@eecs.umich.edu { 2705892Sgblack@eecs.umich.edu %(op_decl)s; 2715892Sgblack@eecs.umich.edu %(op_rd)s; 2725892Sgblack@eecs.umich.edu %(complete_code)s; 2735892Sgblack@eecs.umich.edu %(op_wb)s; 2744587Sgblack@eecs.umich.edu return NoFault; 2754587Sgblack@eecs.umich.edu } 2764587Sgblack@eecs.umich.edu}}; 2774587Sgblack@eecs.umich.edu 2784587Sgblack@eecs.umich.edu// Common templates 2794587Sgblack@eecs.umich.edu 2804587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2814587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2824587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2834587Sgblack@eecs.umich.edu}}; 2844587Sgblack@eecs.umich.edu 2854587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2864587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2874587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2884587Sgblack@eecs.umich.edu}}; 2894587Sgblack@eecs.umich.edu 2904587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 2914587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2924587Sgblack@eecs.umich.edu { 2934587Sgblack@eecs.umich.edu protected: 2944561Sgblack@eecs.umich.edu void buildMe(); 2954561Sgblack@eecs.umich.edu 2964561Sgblack@eecs.umich.edu public: 2974561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2984561Sgblack@eecs.umich.edu const char * instMnem, 2994561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3004561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3014561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3024561Sgblack@eecs.umich.edu RegIndex _data, 3035912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 3045912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 3054561Sgblack@eecs.umich.edu 3064561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 3074561Sgblack@eecs.umich.edu const char * instMnem, 3084561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3094561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3104561Sgblack@eecs.umich.edu RegIndex _data, 3115912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 3125912Sgblack@eecs.umich.edu Request::FlagsType _memFlags); 3134561Sgblack@eecs.umich.edu 3144561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3154587Sgblack@eecs.umich.edu 3164587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 3174587Sgblack@eecs.umich.edu 3184587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 3194561Sgblack@eecs.umich.edu }; 3204561Sgblack@eecs.umich.edu}}; 3214561Sgblack@eecs.umich.edu 3224561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 3234561Sgblack@eecs.umich.edu 3244561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 3254561Sgblack@eecs.umich.edu { 3264561Sgblack@eecs.umich.edu %(constructor)s; 3274561Sgblack@eecs.umich.edu } 3284561Sgblack@eecs.umich.edu 3294561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3304561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3314561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3324561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3334561Sgblack@eecs.umich.edu RegIndex _data, 3345912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 3355912Sgblack@eecs.umich.edu Request::FlagsType _memFlags) : 3364561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3374587Sgblack@eecs.umich.edu false, false, false, false, 3384587Sgblack@eecs.umich.edu _scale, _index, _base, 3394587Sgblack@eecs.umich.edu _disp, _segment, _data, 3405912Sgblack@eecs.umich.edu _dataSize, _addressSize, _memFlags, %(op_class)s) 3414561Sgblack@eecs.umich.edu { 3424561Sgblack@eecs.umich.edu buildMe(); 3434561Sgblack@eecs.umich.edu } 3444561Sgblack@eecs.umich.edu 3454561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3464561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3474561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3484561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3494587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3504587Sgblack@eecs.umich.edu RegIndex _data, 3515912Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 3525912Sgblack@eecs.umich.edu Request::FlagsType _memFlags) : 3534561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3544587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, 3554587Sgblack@eecs.umich.edu _scale, _index, _base, 3564587Sgblack@eecs.umich.edu _disp, _segment, _data, 3575912Sgblack@eecs.umich.edu _dataSize, _addressSize, _memFlags, %(op_class)s) 3584561Sgblack@eecs.umich.edu { 3594561Sgblack@eecs.umich.edu buildMe(); 3604561Sgblack@eecs.umich.edu } 3614561Sgblack@eecs.umich.edu}}; 3624561Sgblack@eecs.umich.edu 3634587Sgblack@eecs.umich.edulet {{ 3644587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3655912Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp, 3665920Sgblack@eecs.umich.edu dataSize, addressSize, baseFlags, atCPL0, prefetch): 3674587Sgblack@eecs.umich.edu self.data = data 3684587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 3694587Sgblack@eecs.umich.edu self.disp = disp 3704587Sgblack@eecs.umich.edu self.segment = segment 3714712Sgblack@eecs.umich.edu self.dataSize = dataSize 3725149Sgblack@eecs.umich.edu self.addressSize = addressSize 3735912Sgblack@eecs.umich.edu self.memFlags = baseFlags 3745912Sgblack@eecs.umich.edu if atCPL0: 3755912Sgblack@eecs.umich.edu self.memFlags += " | (CPL0FlagBit << FlagShift)" 3765920Sgblack@eecs.umich.edu if prefetch: 3775920Sgblack@eecs.umich.edu self.memFlags += " | Request::PF_EXCLUSIVE" 3785965Sgblack@eecs.umich.edu self.memFlags += " | (machInst.legacy.addr ? " + \ 3795965Sgblack@eecs.umich.edu "(AddrSizeFlagBit << FlagShift) : 0)" 3804587Sgblack@eecs.umich.edu 3814587Sgblack@eecs.umich.edu def getAllocator(self, *microFlags): 3825788Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, macrocodeBlock 3834587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 3844587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 3855912Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s, %(memFlags)s)''' % { 3864587Sgblack@eecs.umich.edu "class_name" : self.className, 3874587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 3884587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 3894587Sgblack@eecs.umich.edu "base" : self.base, 3904587Sgblack@eecs.umich.edu "disp" : self.disp, 3914587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 3925912Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize, 3935912Sgblack@eecs.umich.edu "memFlags" : self.memFlags} 3944587Sgblack@eecs.umich.edu return allocator 3954587Sgblack@eecs.umich.edu}}; 3964587Sgblack@eecs.umich.edu 3974587Sgblack@eecs.umich.edulet {{ 3984587Sgblack@eecs.umich.edu 3994587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 4004587Sgblack@eecs.umich.edu # them will always work. 4014587Sgblack@eecs.umich.edu header_output = "" 4024587Sgblack@eecs.umich.edu decoder_output = "" 4034587Sgblack@eecs.umich.edu exec_output = "" 4044587Sgblack@eecs.umich.edu 4054863Sgblack@eecs.umich.edu calculateEA = "EA = SegBase + scale * Index + Base + disp;" 4064587Sgblack@eecs.umich.edu 4075912Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code, mem_flags="0"): 4084587Sgblack@eecs.umich.edu global header_output 4094587Sgblack@eecs.umich.edu global decoder_output 4104587Sgblack@eecs.umich.edu global exec_output 4114587Sgblack@eecs.umich.edu global microopClasses 4124587Sgblack@eecs.umich.edu Name = mnemonic 4134587Sgblack@eecs.umich.edu name = mnemonic.lower() 4144587Sgblack@eecs.umich.edu 4154587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4164679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4175118Sgblack@eecs.umich.edu {"code": code, 4185912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 4194587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4204587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4214587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 4224587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 4234587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 4244587Sgblack@eecs.umich.edu 4254587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 4265149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4275912Sgblack@eecs.umich.edu dataSize="env.dataSize", 4285912Sgblack@eecs.umich.edu addressSize="env.addressSize", 4295920Sgblack@eecs.umich.edu atCPL0=False, prefetch=False): 4305912Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, addr, 4315920Sgblack@eecs.umich.edu disp, dataSize, addressSize, mem_flags, 4325920Sgblack@eecs.umich.edu atCPL0, prefetch) 4334587Sgblack@eecs.umich.edu self.className = Name 4344587Sgblack@eecs.umich.edu self.mnemonic = name 4354587Sgblack@eecs.umich.edu 4364587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 4374587Sgblack@eecs.umich.edu 4384587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 4395912Sgblack@eecs.umich.edu defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 4405912Sgblack@eecs.umich.edu 'X86ISA::StoreCheck') 4415027Sgblack@eecs.umich.edu defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;') 4424587Sgblack@eecs.umich.edu 4435892Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code, \ 4445965Sgblack@eecs.umich.edu postCode="", completeCode="", mem_flags="0"): 4454587Sgblack@eecs.umich.edu global header_output 4464587Sgblack@eecs.umich.edu global decoder_output 4474587Sgblack@eecs.umich.edu global exec_output 4484587Sgblack@eecs.umich.edu global microopClasses 4494587Sgblack@eecs.umich.edu Name = mnemonic 4504587Sgblack@eecs.umich.edu name = mnemonic.lower() 4514587Sgblack@eecs.umich.edu 4524587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4534679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4545118Sgblack@eecs.umich.edu {"code": code, 4555892Sgblack@eecs.umich.edu "post_code": postCode, 4565892Sgblack@eecs.umich.edu "complete_code": completeCode, 4575912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 4584587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4594587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4604587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4614587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4624587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4634587Sgblack@eecs.umich.edu 4644587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4655149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4665912Sgblack@eecs.umich.edu dataSize="env.dataSize", 4675912Sgblack@eecs.umich.edu addressSize="env.addressSize", 4685912Sgblack@eecs.umich.edu atCPL0=False): 4695912Sgblack@eecs.umich.edu super(StoreOp, self).__init__(data, segment, addr, 4705920Sgblack@eecs.umich.edu disp, dataSize, addressSize, mem_flags, atCPL0, False) 4714587Sgblack@eecs.umich.edu self.className = Name 4724587Sgblack@eecs.umich.edu self.mnemonic = name 4734587Sgblack@eecs.umich.edu 4744587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4754587Sgblack@eecs.umich.edu 4765919Sgblack@eecs.umich.edu defineMicroStoreOp('St', 'Mem = pick(Data, 2, dataSize);') 4775027Sgblack@eecs.umich.edu defineMicroStoreOp('Stfp', 'Mem = FpData.uqw;') 4785919Sgblack@eecs.umich.edu defineMicroStoreOp('Stupd', 'Mem = pick(Data, 2, dataSize);', 4795892Sgblack@eecs.umich.edu 'Base = merge(Base, EA - SegBase, addressSize);', 4805892Sgblack@eecs.umich.edu 'Base = merge(Base, pkt->req->getVaddr() - SegBase, addressSize);'); 4815892Sgblack@eecs.umich.edu defineMicroStoreOp('Cda', 'Mem = 0;', mem_flags="Request::NO_ACCESS") 4824601Sgblack@eecs.umich.edu 4834679Sgblack@eecs.umich.edu iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp', 4845118Sgblack@eecs.umich.edu {"code": "Data = merge(Data, EA, dataSize);", 4855912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 4864601Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4874601Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4884601Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4894601Sgblack@eecs.umich.edu 4904601Sgblack@eecs.umich.edu class LeaOp(LdStOp): 4915149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4925149Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4934712Sgblack@eecs.umich.edu super(LeaOp, self).__init__(data, segment, 4945920Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "0", False, False) 4954601Sgblack@eecs.umich.edu self.className = "Lea" 4964601Sgblack@eecs.umich.edu self.mnemonic = "lea" 4974601Sgblack@eecs.umich.edu 4984601Sgblack@eecs.umich.edu microopClasses["lea"] = LeaOp 4995178Sgblack@eecs.umich.edu 5005178Sgblack@eecs.umich.edu 5015359Sgblack@eecs.umich.edu iop = InstObjParams("tia", "Tia", 'X86ISA::LdStOp', 5025359Sgblack@eecs.umich.edu {"code": "xc->demapPage(EA, 0);", 5035912Sgblack@eecs.umich.edu "ea_code": calculateEA}) 5045359Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 5055359Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 5065359Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 5075359Sgblack@eecs.umich.edu 5085359Sgblack@eecs.umich.edu class TiaOp(LdStOp): 5095359Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 5105912Sgblack@eecs.umich.edu dataSize="env.dataSize", 5115912Sgblack@eecs.umich.edu addressSize="env.addressSize"): 5125359Sgblack@eecs.umich.edu super(TiaOp, self).__init__("NUM_INTREGS", segment, 5135920Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "0", False, False) 5145359Sgblack@eecs.umich.edu self.className = "Tia" 5155359Sgblack@eecs.umich.edu self.mnemonic = "tia" 5165359Sgblack@eecs.umich.edu 5175359Sgblack@eecs.umich.edu microopClasses["tia"] = TiaOp 5185359Sgblack@eecs.umich.edu 5195178Sgblack@eecs.umich.edu class CdaOp(LdStOp): 5205178Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 5215912Sgblack@eecs.umich.edu dataSize="env.dataSize", 5225912Sgblack@eecs.umich.edu addressSize="env.addressSize", atCPL0=False): 5235178Sgblack@eecs.umich.edu super(CdaOp, self).__init__("NUM_INTREGS", segment, 5245920Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize, "0", atCPL0, False) 5255178Sgblack@eecs.umich.edu self.className = "Cda" 5265178Sgblack@eecs.umich.edu self.mnemonic = "cda" 5275178Sgblack@eecs.umich.edu 5285178Sgblack@eecs.umich.edu microopClasses["cda"] = CdaOp 5294587Sgblack@eecs.umich.edu}}; 5304587Sgblack@eecs.umich.edu 531