ldstop.isa revision 5727
15359Sgblack@eecs.umich.edu// Copyright (c) 2008 The Regents of The University of Michigan 25359Sgblack@eecs.umich.edu// All rights reserved. 35359Sgblack@eecs.umich.edu// 45359Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 55359Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 65359Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 75359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 85359Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 95359Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 105359Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 115359Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 125359Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 135359Sgblack@eecs.umich.edu// this software without specific prior written permission. 145359Sgblack@eecs.umich.edu// 155359Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 165359Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 175359Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 185359Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 195359Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 205359Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 215359Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 225359Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 235359Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 245359Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 255359Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 265359Sgblack@eecs.umich.edu// 275359Sgblack@eecs.umich.edu// Authors: Gabe Black 285359Sgblack@eecs.umich.edu 295359Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 304561Sgblack@eecs.umich.edu// All rights reserved. 314561Sgblack@eecs.umich.edu// 324561Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 334561Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 344561Sgblack@eecs.umich.edu// following conditions are met: 354561Sgblack@eecs.umich.edu// 364561Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 374561Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 384561Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 394561Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 404561Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 414561Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 424561Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 434561Sgblack@eecs.umich.edu// commercial advantage. 444561Sgblack@eecs.umich.edu// 454561Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 464561Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 474561Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 484561Sgblack@eecs.umich.edu// Office of Strategy and Technology 494561Sgblack@eecs.umich.edu// Hewlett-Packard Company 504561Sgblack@eecs.umich.edu// 1501 Page Mill Road 514561Sgblack@eecs.umich.edu// Palo Alto, California 94304 524561Sgblack@eecs.umich.edu// 534561Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 544561Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 554561Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 564561Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 574561Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 584561Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 594561Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 604561Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 614561Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 624561Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 634561Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 644561Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 654561Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 664561Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 674561Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 684561Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 694561Sgblack@eecs.umich.edu// 704561Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 714561Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 724561Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 734561Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 744561Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 754561Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 764561Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 774561Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 784561Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 794561Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 804561Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 814561Sgblack@eecs.umich.edu// 824561Sgblack@eecs.umich.edu// Authors: Gabe Black 834561Sgblack@eecs.umich.edu 844561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 854561Sgblack@eecs.umich.edu// 864561Sgblack@eecs.umich.edu// LdStOp Microop templates 874561Sgblack@eecs.umich.edu// 884561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 894561Sgblack@eecs.umich.edu 904601Sgblack@eecs.umich.edu// LEA template 914601Sgblack@eecs.umich.edu 924601Sgblack@eecs.umich.edudef template MicroLeaExecute {{ 934601Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 944601Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 954601Sgblack@eecs.umich.edu { 964601Sgblack@eecs.umich.edu Fault fault = NoFault; 974601Sgblack@eecs.umich.edu Addr EA; 984601Sgblack@eecs.umich.edu 994601Sgblack@eecs.umich.edu %(op_decl)s; 1004601Sgblack@eecs.umich.edu %(op_rd)s; 1014601Sgblack@eecs.umich.edu %(ea_code)s; 1024601Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1034601Sgblack@eecs.umich.edu 1044601Sgblack@eecs.umich.edu %(code)s; 1054601Sgblack@eecs.umich.edu if(fault == NoFault) 1064601Sgblack@eecs.umich.edu { 1074601Sgblack@eecs.umich.edu %(op_wb)s; 1084601Sgblack@eecs.umich.edu } 1094601Sgblack@eecs.umich.edu 1104601Sgblack@eecs.umich.edu return fault; 1114601Sgblack@eecs.umich.edu } 1124601Sgblack@eecs.umich.edu}}; 1134601Sgblack@eecs.umich.edu 1144601Sgblack@eecs.umich.edudef template MicroLeaDeclare {{ 1154601Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 1164601Sgblack@eecs.umich.edu { 1174601Sgblack@eecs.umich.edu protected: 1184601Sgblack@eecs.umich.edu void buildMe(); 1194601Sgblack@eecs.umich.edu 1204601Sgblack@eecs.umich.edu public: 1214601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1224601Sgblack@eecs.umich.edu const char * instMnem, 1234601Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 1244601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1254601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1264601Sgblack@eecs.umich.edu RegIndex _data, 1274601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1284601Sgblack@eecs.umich.edu 1294601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1304601Sgblack@eecs.umich.edu const char * instMnem, 1314601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1324601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1334601Sgblack@eecs.umich.edu RegIndex _data, 1344601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1354601Sgblack@eecs.umich.edu 1364601Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1374601Sgblack@eecs.umich.edu }; 1384601Sgblack@eecs.umich.edu}}; 1394601Sgblack@eecs.umich.edu 1404601Sgblack@eecs.umich.edu// Load templates 1414601Sgblack@eecs.umich.edu 1424587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1434587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1444587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1454587Sgblack@eecs.umich.edu { 1464587Sgblack@eecs.umich.edu Fault fault = NoFault; 1474587Sgblack@eecs.umich.edu Addr EA; 1484587Sgblack@eecs.umich.edu 1494587Sgblack@eecs.umich.edu %(op_decl)s; 1504587Sgblack@eecs.umich.edu %(op_rd)s; 1514587Sgblack@eecs.umich.edu %(ea_code)s; 1524587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1534587Sgblack@eecs.umich.edu 1545232Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, (%(mem_flags)s) | segment); 1554720Sgblack@eecs.umich.edu 1564587Sgblack@eecs.umich.edu if(fault == NoFault) 1574587Sgblack@eecs.umich.edu { 1584587Sgblack@eecs.umich.edu %(code)s; 1594587Sgblack@eecs.umich.edu } 1604587Sgblack@eecs.umich.edu if(fault == NoFault) 1614587Sgblack@eecs.umich.edu { 1624587Sgblack@eecs.umich.edu %(op_wb)s; 1634587Sgblack@eecs.umich.edu } 1644587Sgblack@eecs.umich.edu 1654587Sgblack@eecs.umich.edu return fault; 1664587Sgblack@eecs.umich.edu } 1674587Sgblack@eecs.umich.edu}}; 1684587Sgblack@eecs.umich.edu 1694587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1704587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1714587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1724587Sgblack@eecs.umich.edu { 1734587Sgblack@eecs.umich.edu Fault fault = NoFault; 1744587Sgblack@eecs.umich.edu Addr EA; 1754587Sgblack@eecs.umich.edu 1764587Sgblack@eecs.umich.edu %(op_decl)s; 1774587Sgblack@eecs.umich.edu %(op_rd)s; 1784587Sgblack@eecs.umich.edu %(ea_code)s; 1794587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1804587Sgblack@eecs.umich.edu 1815232Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, (%(mem_flags)s) | segment); 1824587Sgblack@eecs.umich.edu 1834587Sgblack@eecs.umich.edu return fault; 1844587Sgblack@eecs.umich.edu } 1854587Sgblack@eecs.umich.edu}}; 1864587Sgblack@eecs.umich.edu 1874587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1884587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1894587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1904587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1914587Sgblack@eecs.umich.edu { 1924587Sgblack@eecs.umich.edu Fault fault = NoFault; 1934587Sgblack@eecs.umich.edu 1944587Sgblack@eecs.umich.edu %(op_decl)s; 1954587Sgblack@eecs.umich.edu %(op_rd)s; 1964587Sgblack@eecs.umich.edu 1975727Sgblack@eecs.umich.edu Mem = get(pkt); 1985002Sgblack@eecs.umich.edu 1994587Sgblack@eecs.umich.edu %(code)s; 2004587Sgblack@eecs.umich.edu 2014587Sgblack@eecs.umich.edu if(fault == NoFault) 2024587Sgblack@eecs.umich.edu { 2034587Sgblack@eecs.umich.edu %(op_wb)s; 2044587Sgblack@eecs.umich.edu } 2054587Sgblack@eecs.umich.edu 2064587Sgblack@eecs.umich.edu return fault; 2074587Sgblack@eecs.umich.edu } 2084587Sgblack@eecs.umich.edu}}; 2094587Sgblack@eecs.umich.edu 2104587Sgblack@eecs.umich.edu// Store templates 2114587Sgblack@eecs.umich.edu 2124587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 2134587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 2144587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2154587Sgblack@eecs.umich.edu { 2164587Sgblack@eecs.umich.edu Fault fault = NoFault; 2174587Sgblack@eecs.umich.edu 2184587Sgblack@eecs.umich.edu Addr EA; 2194587Sgblack@eecs.umich.edu %(op_decl)s; 2204587Sgblack@eecs.umich.edu %(op_rd)s; 2214587Sgblack@eecs.umich.edu %(ea_code)s; 2224587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2234587Sgblack@eecs.umich.edu 2244587Sgblack@eecs.umich.edu %(code)s; 2254587Sgblack@eecs.umich.edu 2264587Sgblack@eecs.umich.edu if(fault == NoFault) 2274587Sgblack@eecs.umich.edu { 2285232Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, (%(mem_flags)s) | segment); 2294767Sgblack@eecs.umich.edu if(fault == NoFault) 2304720Sgblack@eecs.umich.edu { 2314767Sgblack@eecs.umich.edu %(op_wb)s; 2324720Sgblack@eecs.umich.edu } 2334587Sgblack@eecs.umich.edu } 2344587Sgblack@eecs.umich.edu 2354587Sgblack@eecs.umich.edu return fault; 2364587Sgblack@eecs.umich.edu } 2374587Sgblack@eecs.umich.edu}}; 2384587Sgblack@eecs.umich.edu 2394587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2404587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2414587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2424587Sgblack@eecs.umich.edu { 2434587Sgblack@eecs.umich.edu Fault fault = NoFault; 2444587Sgblack@eecs.umich.edu 2454587Sgblack@eecs.umich.edu Addr EA; 2464587Sgblack@eecs.umich.edu %(op_decl)s; 2474587Sgblack@eecs.umich.edu %(op_rd)s; 2484587Sgblack@eecs.umich.edu %(ea_code)s; 2494587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2504587Sgblack@eecs.umich.edu 2514587Sgblack@eecs.umich.edu %(code)s; 2524587Sgblack@eecs.umich.edu 2534587Sgblack@eecs.umich.edu if(fault == NoFault) 2544587Sgblack@eecs.umich.edu { 2555232Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, (%(mem_flags)s) | segment); 2564767Sgblack@eecs.umich.edu if(fault == NoFault) 2574720Sgblack@eecs.umich.edu { 2584767Sgblack@eecs.umich.edu %(op_wb)s; 2594720Sgblack@eecs.umich.edu } 2604587Sgblack@eecs.umich.edu } 2614587Sgblack@eecs.umich.edu return fault; 2624587Sgblack@eecs.umich.edu } 2634587Sgblack@eecs.umich.edu}}; 2644587Sgblack@eecs.umich.edu 2654587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 2664587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc, 2674587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2684587Sgblack@eecs.umich.edu { 2694587Sgblack@eecs.umich.edu return NoFault; 2704587Sgblack@eecs.umich.edu } 2714587Sgblack@eecs.umich.edu}}; 2724587Sgblack@eecs.umich.edu 2734587Sgblack@eecs.umich.edu// Common templates 2744587Sgblack@eecs.umich.edu 2754587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2764587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2774587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2784587Sgblack@eecs.umich.edu}}; 2794587Sgblack@eecs.umich.edu 2804587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2814587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2824587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2834587Sgblack@eecs.umich.edu}}; 2844587Sgblack@eecs.umich.edu 2854587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 2864587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2874587Sgblack@eecs.umich.edu { 2884587Sgblack@eecs.umich.edu protected: 2894561Sgblack@eecs.umich.edu void buildMe(); 2904561Sgblack@eecs.umich.edu 2914561Sgblack@eecs.umich.edu public: 2924561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2934561Sgblack@eecs.umich.edu const char * instMnem, 2944561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 2954561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2964561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2974561Sgblack@eecs.umich.edu RegIndex _data, 2984561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 2994561Sgblack@eecs.umich.edu 3004561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 3014561Sgblack@eecs.umich.edu const char * instMnem, 3024561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3034561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3044561Sgblack@eecs.umich.edu RegIndex _data, 3054561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 3064561Sgblack@eecs.umich.edu 3074561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3084587Sgblack@eecs.umich.edu 3094587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 3104587Sgblack@eecs.umich.edu 3114587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 3124561Sgblack@eecs.umich.edu }; 3134561Sgblack@eecs.umich.edu}}; 3144561Sgblack@eecs.umich.edu 3154561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 3164561Sgblack@eecs.umich.edu 3174561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 3184561Sgblack@eecs.umich.edu { 3194561Sgblack@eecs.umich.edu %(constructor)s; 3204561Sgblack@eecs.umich.edu } 3214561Sgblack@eecs.umich.edu 3224561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3234561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3244561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3254561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3264561Sgblack@eecs.umich.edu RegIndex _data, 3274561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3284561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3294587Sgblack@eecs.umich.edu false, false, false, false, 3304587Sgblack@eecs.umich.edu _scale, _index, _base, 3314587Sgblack@eecs.umich.edu _disp, _segment, _data, 3324587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3334561Sgblack@eecs.umich.edu { 3344561Sgblack@eecs.umich.edu buildMe(); 3354561Sgblack@eecs.umich.edu } 3364561Sgblack@eecs.umich.edu 3374561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3384561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3394561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3404561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3414587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3424587Sgblack@eecs.umich.edu RegIndex _data, 3434587Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3444561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3454587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, 3464587Sgblack@eecs.umich.edu _scale, _index, _base, 3474587Sgblack@eecs.umich.edu _disp, _segment, _data, 3484587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3494561Sgblack@eecs.umich.edu { 3504561Sgblack@eecs.umich.edu buildMe(); 3514561Sgblack@eecs.umich.edu } 3524561Sgblack@eecs.umich.edu}}; 3534561Sgblack@eecs.umich.edu 3544587Sgblack@eecs.umich.edulet {{ 3554587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3565149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp, dataSize, addressSize): 3574587Sgblack@eecs.umich.edu self.data = data 3584587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 3594587Sgblack@eecs.umich.edu self.disp = disp 3604587Sgblack@eecs.umich.edu self.segment = segment 3614712Sgblack@eecs.umich.edu self.dataSize = dataSize 3625149Sgblack@eecs.umich.edu self.addressSize = addressSize 3634587Sgblack@eecs.umich.edu 3644587Sgblack@eecs.umich.edu def getAllocator(self, *microFlags): 3654587Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, mnemonic 3664587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 3674587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 3684587Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s)''' % { 3694587Sgblack@eecs.umich.edu "class_name" : self.className, 3704587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 3714587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 3724587Sgblack@eecs.umich.edu "base" : self.base, 3734587Sgblack@eecs.umich.edu "disp" : self.disp, 3744587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 3754587Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize} 3764587Sgblack@eecs.umich.edu return allocator 3774587Sgblack@eecs.umich.edu}}; 3784587Sgblack@eecs.umich.edu 3794587Sgblack@eecs.umich.edulet {{ 3804587Sgblack@eecs.umich.edu 3814587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 3824587Sgblack@eecs.umich.edu # them will always work. 3834587Sgblack@eecs.umich.edu header_output = "" 3844587Sgblack@eecs.umich.edu decoder_output = "" 3854587Sgblack@eecs.umich.edu exec_output = "" 3864587Sgblack@eecs.umich.edu 3874863Sgblack@eecs.umich.edu calculateEA = "EA = SegBase + scale * Index + Base + disp;" 3884587Sgblack@eecs.umich.edu 3895118Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code, mem_flags=0): 3904587Sgblack@eecs.umich.edu global header_output 3914587Sgblack@eecs.umich.edu global decoder_output 3924587Sgblack@eecs.umich.edu global exec_output 3934587Sgblack@eecs.umich.edu global microopClasses 3944587Sgblack@eecs.umich.edu Name = mnemonic 3954587Sgblack@eecs.umich.edu name = mnemonic.lower() 3964587Sgblack@eecs.umich.edu 3974587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 3984679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 3995118Sgblack@eecs.umich.edu {"code": code, 4005118Sgblack@eecs.umich.edu "ea_code": calculateEA, 4015118Sgblack@eecs.umich.edu "mem_flags": mem_flags}) 4024587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4034587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4044587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 4054587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 4064587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 4074587Sgblack@eecs.umich.edu 4084587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 4095149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4105149Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4114712Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, 4125149Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize) 4134587Sgblack@eecs.umich.edu self.className = Name 4144587Sgblack@eecs.umich.edu self.mnemonic = name 4154587Sgblack@eecs.umich.edu 4164587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 4174587Sgblack@eecs.umich.edu 4184587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 4195118Sgblack@eecs.umich.edu defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 'StoreCheck') 4205027Sgblack@eecs.umich.edu defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;') 4214587Sgblack@eecs.umich.edu 4225118Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code, mem_flags=0): 4234587Sgblack@eecs.umich.edu global header_output 4244587Sgblack@eecs.umich.edu global decoder_output 4254587Sgblack@eecs.umich.edu global exec_output 4264587Sgblack@eecs.umich.edu global microopClasses 4274587Sgblack@eecs.umich.edu Name = mnemonic 4284587Sgblack@eecs.umich.edu name = mnemonic.lower() 4294587Sgblack@eecs.umich.edu 4304587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4314679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4325118Sgblack@eecs.umich.edu {"code": code, 4335118Sgblack@eecs.umich.edu "ea_code": calculateEA, 4345118Sgblack@eecs.umich.edu "mem_flags": mem_flags}) 4354587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4364587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4374587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4384587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4394587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4404587Sgblack@eecs.umich.edu 4414587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4425149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4435149Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4444712Sgblack@eecs.umich.edu super(StoreOp, self).__init__(data, segment, 4455149Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize) 4464587Sgblack@eecs.umich.edu self.className = Name 4474587Sgblack@eecs.umich.edu self.mnemonic = name 4484587Sgblack@eecs.umich.edu 4494587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4504587Sgblack@eecs.umich.edu 4514706Sgblack@eecs.umich.edu defineMicroStoreOp('St', 'Mem = Data;') 4525027Sgblack@eecs.umich.edu defineMicroStoreOp('Stfp', 'Mem = FpData.uqw;') 4535175Sgblack@eecs.umich.edu defineMicroStoreOp('Stupd', ''' 4545175Sgblack@eecs.umich.edu Mem = Data; 4555175Sgblack@eecs.umich.edu Base = merge(Base, EA - SegBase, addressSize); 4565175Sgblack@eecs.umich.edu '''); 4575175Sgblack@eecs.umich.edu 4584601Sgblack@eecs.umich.edu 4594679Sgblack@eecs.umich.edu iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp', 4605118Sgblack@eecs.umich.edu {"code": "Data = merge(Data, EA, dataSize);", 4615118Sgblack@eecs.umich.edu "ea_code": calculateEA, 4625118Sgblack@eecs.umich.edu "mem_flags": 0}) 4634601Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4644601Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4654601Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4664601Sgblack@eecs.umich.edu 4674601Sgblack@eecs.umich.edu class LeaOp(LdStOp): 4685149Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0, 4695149Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4704712Sgblack@eecs.umich.edu super(LeaOp, self).__init__(data, segment, 4715149Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize) 4724601Sgblack@eecs.umich.edu self.className = "Lea" 4734601Sgblack@eecs.umich.edu self.mnemonic = "lea" 4744601Sgblack@eecs.umich.edu 4754601Sgblack@eecs.umich.edu microopClasses["lea"] = LeaOp 4765178Sgblack@eecs.umich.edu 4775178Sgblack@eecs.umich.edu 4785359Sgblack@eecs.umich.edu iop = InstObjParams("tia", "Tia", 'X86ISA::LdStOp', 4795359Sgblack@eecs.umich.edu {"code": "xc->demapPage(EA, 0);", 4805359Sgblack@eecs.umich.edu "ea_code": calculateEA, 4815359Sgblack@eecs.umich.edu "mem_flags": 0}) 4825359Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4835359Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4845359Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4855359Sgblack@eecs.umich.edu 4865359Sgblack@eecs.umich.edu class TiaOp(LdStOp): 4875359Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 4885359Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 4895359Sgblack@eecs.umich.edu super(TiaOp, self).__init__("NUM_INTREGS", segment, 4905359Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize) 4915359Sgblack@eecs.umich.edu self.className = "Tia" 4925359Sgblack@eecs.umich.edu self.mnemonic = "tia" 4935359Sgblack@eecs.umich.edu 4945359Sgblack@eecs.umich.edu microopClasses["tia"] = TiaOp 4955359Sgblack@eecs.umich.edu 4965178Sgblack@eecs.umich.edu iop = InstObjParams("cda", "Cda", 'X86ISA::LdStOp', 4975178Sgblack@eecs.umich.edu {"code": ''' 4985178Sgblack@eecs.umich.edu Addr paddr; 4995178Sgblack@eecs.umich.edu fault = xc->translateDataWriteAddr(EA, paddr, 5005178Sgblack@eecs.umich.edu dataSize, (1 << segment)); 5015178Sgblack@eecs.umich.edu ''', 5025178Sgblack@eecs.umich.edu "ea_code": calculateEA}) 5035178Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 5045178Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 5055178Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 5065178Sgblack@eecs.umich.edu 5075178Sgblack@eecs.umich.edu class CdaOp(LdStOp): 5085178Sgblack@eecs.umich.edu def __init__(self, segment, addr, disp = 0, 5095178Sgblack@eecs.umich.edu dataSize="env.dataSize", addressSize="env.addressSize"): 5105178Sgblack@eecs.umich.edu super(CdaOp, self).__init__("NUM_INTREGS", segment, 5115178Sgblack@eecs.umich.edu addr, disp, dataSize, addressSize) 5125178Sgblack@eecs.umich.edu self.className = "Cda" 5135178Sgblack@eecs.umich.edu self.mnemonic = "cda" 5145178Sgblack@eecs.umich.edu 5155178Sgblack@eecs.umich.edu microopClasses["cda"] = CdaOp 5164587Sgblack@eecs.umich.edu}}; 5174587Sgblack@eecs.umich.edu 518