ldstop.isa revision 5002
14561Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company 24561Sgblack@eecs.umich.edu// All rights reserved. 34561Sgblack@eecs.umich.edu// 44561Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 54561Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 64561Sgblack@eecs.umich.edu// following conditions are met: 74561Sgblack@eecs.umich.edu// 84561Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 94561Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 104561Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 114561Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 124561Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 134561Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 144561Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 154561Sgblack@eecs.umich.edu// commercial advantage. 164561Sgblack@eecs.umich.edu// 174561Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 184561Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 194561Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 204561Sgblack@eecs.umich.edu// Office of Strategy and Technology 214561Sgblack@eecs.umich.edu// Hewlett-Packard Company 224561Sgblack@eecs.umich.edu// 1501 Page Mill Road 234561Sgblack@eecs.umich.edu// Palo Alto, California 94304 244561Sgblack@eecs.umich.edu// 254561Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 264561Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 274561Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 284561Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 294561Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 304561Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 314561Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 324561Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 334561Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 344561Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 354561Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 364561Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 374561Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 384561Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 394561Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 404561Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 414561Sgblack@eecs.umich.edu// 424561Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 434561Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 444561Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 454561Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 464561Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 474561Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 484561Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 494561Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 504561Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 514561Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 524561Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 534561Sgblack@eecs.umich.edu// 544561Sgblack@eecs.umich.edu// Authors: Gabe Black 554561Sgblack@eecs.umich.edu 564561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 574561Sgblack@eecs.umich.edu// 584561Sgblack@eecs.umich.edu// LdStOp Microop templates 594561Sgblack@eecs.umich.edu// 604561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 614561Sgblack@eecs.umich.edu 624601Sgblack@eecs.umich.edu// LEA template 634601Sgblack@eecs.umich.edu 644601Sgblack@eecs.umich.edudef template MicroLeaExecute {{ 654601Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 664601Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 674601Sgblack@eecs.umich.edu { 684601Sgblack@eecs.umich.edu Fault fault = NoFault; 694601Sgblack@eecs.umich.edu Addr EA; 704601Sgblack@eecs.umich.edu 714601Sgblack@eecs.umich.edu %(op_decl)s; 724601Sgblack@eecs.umich.edu %(op_rd)s; 734601Sgblack@eecs.umich.edu %(ea_code)s; 744601Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 754601Sgblack@eecs.umich.edu 764601Sgblack@eecs.umich.edu %(code)s; 774601Sgblack@eecs.umich.edu if(fault == NoFault) 784601Sgblack@eecs.umich.edu { 794601Sgblack@eecs.umich.edu %(op_wb)s; 804601Sgblack@eecs.umich.edu } 814601Sgblack@eecs.umich.edu 824601Sgblack@eecs.umich.edu return fault; 834601Sgblack@eecs.umich.edu } 844601Sgblack@eecs.umich.edu}}; 854601Sgblack@eecs.umich.edu 864601Sgblack@eecs.umich.edudef template MicroLeaDeclare {{ 874601Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 884601Sgblack@eecs.umich.edu { 894601Sgblack@eecs.umich.edu protected: 904601Sgblack@eecs.umich.edu void buildMe(); 914601Sgblack@eecs.umich.edu 924601Sgblack@eecs.umich.edu public: 934601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 944601Sgblack@eecs.umich.edu const char * instMnem, 954601Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 964601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 974601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 984601Sgblack@eecs.umich.edu RegIndex _data, 994601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1004601Sgblack@eecs.umich.edu 1014601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1024601Sgblack@eecs.umich.edu const char * instMnem, 1034601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1044601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1054601Sgblack@eecs.umich.edu RegIndex _data, 1064601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1074601Sgblack@eecs.umich.edu 1084601Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1094601Sgblack@eecs.umich.edu }; 1104601Sgblack@eecs.umich.edu}}; 1114601Sgblack@eecs.umich.edu 1124601Sgblack@eecs.umich.edu// Load templates 1134601Sgblack@eecs.umich.edu 1144587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1154587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1164587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1174587Sgblack@eecs.umich.edu { 1184587Sgblack@eecs.umich.edu Fault fault = NoFault; 1194587Sgblack@eecs.umich.edu Addr EA; 1204587Sgblack@eecs.umich.edu 1214587Sgblack@eecs.umich.edu %(op_decl)s; 1224587Sgblack@eecs.umich.edu %(op_rd)s; 1234587Sgblack@eecs.umich.edu %(ea_code)s; 1244587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1254587Sgblack@eecs.umich.edu 1265002Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, 0); 1274720Sgblack@eecs.umich.edu 1284587Sgblack@eecs.umich.edu if(fault == NoFault) 1294587Sgblack@eecs.umich.edu { 1304587Sgblack@eecs.umich.edu %(code)s; 1314587Sgblack@eecs.umich.edu } 1324587Sgblack@eecs.umich.edu if(fault == NoFault) 1334587Sgblack@eecs.umich.edu { 1344587Sgblack@eecs.umich.edu %(op_wb)s; 1354587Sgblack@eecs.umich.edu } 1364587Sgblack@eecs.umich.edu 1374587Sgblack@eecs.umich.edu return fault; 1384587Sgblack@eecs.umich.edu } 1394587Sgblack@eecs.umich.edu}}; 1404587Sgblack@eecs.umich.edu 1414587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1424587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1434587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1444587Sgblack@eecs.umich.edu { 1454587Sgblack@eecs.umich.edu Fault fault = NoFault; 1464587Sgblack@eecs.umich.edu Addr EA; 1474587Sgblack@eecs.umich.edu 1484587Sgblack@eecs.umich.edu %(op_decl)s; 1494587Sgblack@eecs.umich.edu %(op_rd)s; 1504587Sgblack@eecs.umich.edu %(ea_code)s; 1514587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1524587Sgblack@eecs.umich.edu 1535002Sgblack@eecs.umich.edu fault = read(xc, EA, Mem, 0); 1544587Sgblack@eecs.umich.edu 1554587Sgblack@eecs.umich.edu return fault; 1564587Sgblack@eecs.umich.edu } 1574587Sgblack@eecs.umich.edu}}; 1584587Sgblack@eecs.umich.edu 1594587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1604587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1614587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1624587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1634587Sgblack@eecs.umich.edu { 1644587Sgblack@eecs.umich.edu Fault fault = NoFault; 1654587Sgblack@eecs.umich.edu 1664587Sgblack@eecs.umich.edu %(op_decl)s; 1674587Sgblack@eecs.umich.edu %(op_rd)s; 1684587Sgblack@eecs.umich.edu 1695002Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 1705002Sgblack@eecs.umich.edu 1714587Sgblack@eecs.umich.edu %(code)s; 1724587Sgblack@eecs.umich.edu 1734587Sgblack@eecs.umich.edu if(fault == NoFault) 1744587Sgblack@eecs.umich.edu { 1754587Sgblack@eecs.umich.edu %(op_wb)s; 1764587Sgblack@eecs.umich.edu } 1774587Sgblack@eecs.umich.edu 1784587Sgblack@eecs.umich.edu return fault; 1794587Sgblack@eecs.umich.edu } 1804587Sgblack@eecs.umich.edu}}; 1814587Sgblack@eecs.umich.edu 1824587Sgblack@eecs.umich.edu// Store templates 1834587Sgblack@eecs.umich.edu 1844587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 1854587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 1864587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1874587Sgblack@eecs.umich.edu { 1884587Sgblack@eecs.umich.edu Fault fault = NoFault; 1894587Sgblack@eecs.umich.edu 1904587Sgblack@eecs.umich.edu Addr EA; 1914587Sgblack@eecs.umich.edu %(op_decl)s; 1924587Sgblack@eecs.umich.edu %(op_rd)s; 1934587Sgblack@eecs.umich.edu %(ea_code)s; 1944587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1954587Sgblack@eecs.umich.edu 1964587Sgblack@eecs.umich.edu %(code)s; 1974587Sgblack@eecs.umich.edu 1984587Sgblack@eecs.umich.edu if(fault == NoFault) 1994587Sgblack@eecs.umich.edu { 2005002Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, 0); 2014767Sgblack@eecs.umich.edu if(fault == NoFault) 2024720Sgblack@eecs.umich.edu { 2034767Sgblack@eecs.umich.edu %(op_wb)s; 2044720Sgblack@eecs.umich.edu } 2054587Sgblack@eecs.umich.edu } 2064587Sgblack@eecs.umich.edu 2074587Sgblack@eecs.umich.edu return fault; 2084587Sgblack@eecs.umich.edu } 2094587Sgblack@eecs.umich.edu}}; 2104587Sgblack@eecs.umich.edu 2114587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2124587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2134587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2144587Sgblack@eecs.umich.edu { 2154587Sgblack@eecs.umich.edu Fault fault = NoFault; 2164587Sgblack@eecs.umich.edu 2174587Sgblack@eecs.umich.edu Addr EA; 2184587Sgblack@eecs.umich.edu %(op_decl)s; 2194587Sgblack@eecs.umich.edu %(op_rd)s; 2204587Sgblack@eecs.umich.edu %(ea_code)s; 2214587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2224587Sgblack@eecs.umich.edu 2234587Sgblack@eecs.umich.edu %(code)s; 2244587Sgblack@eecs.umich.edu 2254587Sgblack@eecs.umich.edu if(fault == NoFault) 2264587Sgblack@eecs.umich.edu { 2275002Sgblack@eecs.umich.edu fault = write(xc, Mem, EA, 0); 2284767Sgblack@eecs.umich.edu if(fault == NoFault) 2294720Sgblack@eecs.umich.edu { 2304767Sgblack@eecs.umich.edu %(op_wb)s; 2314720Sgblack@eecs.umich.edu } 2324587Sgblack@eecs.umich.edu } 2334587Sgblack@eecs.umich.edu return fault; 2344587Sgblack@eecs.umich.edu } 2354587Sgblack@eecs.umich.edu}}; 2364587Sgblack@eecs.umich.edu 2374587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 2384587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc, 2394587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2404587Sgblack@eecs.umich.edu { 2414587Sgblack@eecs.umich.edu return NoFault; 2424587Sgblack@eecs.umich.edu } 2434587Sgblack@eecs.umich.edu}}; 2444587Sgblack@eecs.umich.edu 2454587Sgblack@eecs.umich.edu// Common templates 2464587Sgblack@eecs.umich.edu 2474587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2484587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2494587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2504587Sgblack@eecs.umich.edu}}; 2514587Sgblack@eecs.umich.edu 2524587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2534587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2544587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2554587Sgblack@eecs.umich.edu}}; 2564587Sgblack@eecs.umich.edu 2574587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 2584587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2594587Sgblack@eecs.umich.edu { 2604587Sgblack@eecs.umich.edu protected: 2614561Sgblack@eecs.umich.edu void buildMe(); 2624561Sgblack@eecs.umich.edu 2634561Sgblack@eecs.umich.edu public: 2644561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2654561Sgblack@eecs.umich.edu const char * instMnem, 2664561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 2674561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2684561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2694561Sgblack@eecs.umich.edu RegIndex _data, 2704561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 2714561Sgblack@eecs.umich.edu 2724561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2734561Sgblack@eecs.umich.edu const char * instMnem, 2744561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2754561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2764561Sgblack@eecs.umich.edu RegIndex _data, 2774561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 2784561Sgblack@eecs.umich.edu 2794561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2804587Sgblack@eecs.umich.edu 2814587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 2824587Sgblack@eecs.umich.edu 2834587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 2844561Sgblack@eecs.umich.edu }; 2854561Sgblack@eecs.umich.edu}}; 2864561Sgblack@eecs.umich.edu 2874561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 2884561Sgblack@eecs.umich.edu 2894561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 2904561Sgblack@eecs.umich.edu { 2914561Sgblack@eecs.umich.edu %(constructor)s; 2924561Sgblack@eecs.umich.edu } 2934561Sgblack@eecs.umich.edu 2944561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 2954561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 2964561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2974561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2984561Sgblack@eecs.umich.edu RegIndex _data, 2994561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3004561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3014587Sgblack@eecs.umich.edu false, false, false, false, 3024587Sgblack@eecs.umich.edu _scale, _index, _base, 3034587Sgblack@eecs.umich.edu _disp, _segment, _data, 3044587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3054561Sgblack@eecs.umich.edu { 3064561Sgblack@eecs.umich.edu buildMe(); 3074561Sgblack@eecs.umich.edu } 3084561Sgblack@eecs.umich.edu 3094561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3104561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3114561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3124561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3134587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3144587Sgblack@eecs.umich.edu RegIndex _data, 3154587Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3164561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3174587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, 3184587Sgblack@eecs.umich.edu _scale, _index, _base, 3194587Sgblack@eecs.umich.edu _disp, _segment, _data, 3204587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3214561Sgblack@eecs.umich.edu { 3224561Sgblack@eecs.umich.edu buildMe(); 3234561Sgblack@eecs.umich.edu } 3244561Sgblack@eecs.umich.edu}}; 3254561Sgblack@eecs.umich.edu 3264587Sgblack@eecs.umich.edulet {{ 3274587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3284712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp, dataSize): 3294587Sgblack@eecs.umich.edu self.data = data 3304587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 3314587Sgblack@eecs.umich.edu self.disp = disp 3324587Sgblack@eecs.umich.edu self.segment = segment 3334712Sgblack@eecs.umich.edu self.dataSize = dataSize 3344587Sgblack@eecs.umich.edu self.addressSize = "env.addressSize" 3354587Sgblack@eecs.umich.edu 3364587Sgblack@eecs.umich.edu def getAllocator(self, *microFlags): 3374587Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, mnemonic 3384587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 3394587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 3404587Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s)''' % { 3414587Sgblack@eecs.umich.edu "class_name" : self.className, 3424587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 3434587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 3444587Sgblack@eecs.umich.edu "base" : self.base, 3454587Sgblack@eecs.umich.edu "disp" : self.disp, 3464587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 3474587Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize} 3484587Sgblack@eecs.umich.edu return allocator 3494587Sgblack@eecs.umich.edu}}; 3504587Sgblack@eecs.umich.edu 3514587Sgblack@eecs.umich.edulet {{ 3524587Sgblack@eecs.umich.edu 3534587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 3544587Sgblack@eecs.umich.edu # them will always work. 3554587Sgblack@eecs.umich.edu header_output = "" 3564587Sgblack@eecs.umich.edu decoder_output = "" 3574587Sgblack@eecs.umich.edu exec_output = "" 3584587Sgblack@eecs.umich.edu 3594863Sgblack@eecs.umich.edu calculateEA = "EA = SegBase + scale * Index + Base + disp;" 3604587Sgblack@eecs.umich.edu 3614587Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code): 3624587Sgblack@eecs.umich.edu global header_output 3634587Sgblack@eecs.umich.edu global decoder_output 3644587Sgblack@eecs.umich.edu global exec_output 3654587Sgblack@eecs.umich.edu global microopClasses 3664587Sgblack@eecs.umich.edu Name = mnemonic 3674587Sgblack@eecs.umich.edu name = mnemonic.lower() 3684587Sgblack@eecs.umich.edu 3694587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 3704679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 3714587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 3724587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 3734587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 3744587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 3754587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 3764587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 3774587Sgblack@eecs.umich.edu 3784587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 3794712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 3804712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 3814712Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, 3824712Sgblack@eecs.umich.edu addr, disp, dataSize) 3834587Sgblack@eecs.umich.edu self.className = Name 3844587Sgblack@eecs.umich.edu self.mnemonic = name 3854587Sgblack@eecs.umich.edu 3864587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 3874587Sgblack@eecs.umich.edu 3884587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 3894587Sgblack@eecs.umich.edu 3904587Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code): 3914587Sgblack@eecs.umich.edu global header_output 3924587Sgblack@eecs.umich.edu global decoder_output 3934587Sgblack@eecs.umich.edu global exec_output 3944587Sgblack@eecs.umich.edu global microopClasses 3954587Sgblack@eecs.umich.edu Name = mnemonic 3964587Sgblack@eecs.umich.edu name = mnemonic.lower() 3974587Sgblack@eecs.umich.edu 3984587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 3994679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4004587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 4014587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4024587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4034587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4044587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4054587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4064587Sgblack@eecs.umich.edu 4074587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4084712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 4094712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 4104712Sgblack@eecs.umich.edu super(StoreOp, self).__init__(data, segment, 4114712Sgblack@eecs.umich.edu addr, disp, dataSize) 4124587Sgblack@eecs.umich.edu self.className = Name 4134587Sgblack@eecs.umich.edu self.mnemonic = name 4144587Sgblack@eecs.umich.edu 4154587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4164587Sgblack@eecs.umich.edu 4174706Sgblack@eecs.umich.edu defineMicroStoreOp('St', 'Mem = Data;') 4184601Sgblack@eecs.umich.edu 4194679Sgblack@eecs.umich.edu iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp', 4204601Sgblack@eecs.umich.edu {"code": "Data = merge(Data, EA, dataSize);", "ea_code": calculateEA}) 4214601Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4224601Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4234601Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4244601Sgblack@eecs.umich.edu 4254601Sgblack@eecs.umich.edu class LeaOp(LdStOp): 4264712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 4274712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 4284712Sgblack@eecs.umich.edu super(LeaOp, self).__init__(data, segment, 4294712Sgblack@eecs.umich.edu addr, disp, dataSize) 4304601Sgblack@eecs.umich.edu self.className = "Lea" 4314601Sgblack@eecs.umich.edu self.mnemonic = "lea" 4324601Sgblack@eecs.umich.edu 4334601Sgblack@eecs.umich.edu microopClasses["lea"] = LeaOp 4344587Sgblack@eecs.umich.edu}}; 4354587Sgblack@eecs.umich.edu 436