ldstop.isa revision 4720
14561Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company 24561Sgblack@eecs.umich.edu// All rights reserved. 34561Sgblack@eecs.umich.edu// 44561Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 54561Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 64561Sgblack@eecs.umich.edu// following conditions are met: 74561Sgblack@eecs.umich.edu// 84561Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 94561Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 104561Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 114561Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 124561Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 134561Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 144561Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 154561Sgblack@eecs.umich.edu// commercial advantage. 164561Sgblack@eecs.umich.edu// 174561Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 184561Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 194561Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 204561Sgblack@eecs.umich.edu// Office of Strategy and Technology 214561Sgblack@eecs.umich.edu// Hewlett-Packard Company 224561Sgblack@eecs.umich.edu// 1501 Page Mill Road 234561Sgblack@eecs.umich.edu// Palo Alto, California 94304 244561Sgblack@eecs.umich.edu// 254561Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 264561Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 274561Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 284561Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 294561Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 304561Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 314561Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 324561Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 334561Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 344561Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 354561Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 364561Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 374561Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 384561Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 394561Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 404561Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 414561Sgblack@eecs.umich.edu// 424561Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 434561Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 444561Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 454561Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 464561Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 474561Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 484561Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 494561Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 504561Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 514561Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 524561Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 534561Sgblack@eecs.umich.edu// 544561Sgblack@eecs.umich.edu// Authors: Gabe Black 554561Sgblack@eecs.umich.edu 564561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 574561Sgblack@eecs.umich.edu// 584561Sgblack@eecs.umich.edu// LdStOp Microop templates 594561Sgblack@eecs.umich.edu// 604561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 614561Sgblack@eecs.umich.edu 624601Sgblack@eecs.umich.edu// LEA template 634601Sgblack@eecs.umich.edu 644601Sgblack@eecs.umich.edudef template MicroLeaExecute {{ 654601Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 664601Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 674601Sgblack@eecs.umich.edu { 684601Sgblack@eecs.umich.edu Fault fault = NoFault; 694601Sgblack@eecs.umich.edu Addr EA; 704601Sgblack@eecs.umich.edu 714601Sgblack@eecs.umich.edu %(op_decl)s; 724601Sgblack@eecs.umich.edu %(op_rd)s; 734601Sgblack@eecs.umich.edu %(ea_code)s; 744601Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 754601Sgblack@eecs.umich.edu 764601Sgblack@eecs.umich.edu %(code)s; 774601Sgblack@eecs.umich.edu if(fault == NoFault) 784601Sgblack@eecs.umich.edu { 794601Sgblack@eecs.umich.edu %(op_wb)s; 804601Sgblack@eecs.umich.edu } 814601Sgblack@eecs.umich.edu 824601Sgblack@eecs.umich.edu return fault; 834601Sgblack@eecs.umich.edu } 844601Sgblack@eecs.umich.edu}}; 854601Sgblack@eecs.umich.edu 864601Sgblack@eecs.umich.edudef template MicroLeaDeclare {{ 874601Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 884601Sgblack@eecs.umich.edu { 894601Sgblack@eecs.umich.edu protected: 904601Sgblack@eecs.umich.edu void buildMe(); 914601Sgblack@eecs.umich.edu 924601Sgblack@eecs.umich.edu public: 934601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 944601Sgblack@eecs.umich.edu const char * instMnem, 954601Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 964601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 974601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 984601Sgblack@eecs.umich.edu RegIndex _data, 994601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1004601Sgblack@eecs.umich.edu 1014601Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 1024601Sgblack@eecs.umich.edu const char * instMnem, 1034601Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 1044601Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 1054601Sgblack@eecs.umich.edu RegIndex _data, 1064601Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 1074601Sgblack@eecs.umich.edu 1084601Sgblack@eecs.umich.edu %(BasicExecDeclare)s 1094601Sgblack@eecs.umich.edu }; 1104601Sgblack@eecs.umich.edu}}; 1114601Sgblack@eecs.umich.edu 1124601Sgblack@eecs.umich.edu// Load templates 1134601Sgblack@eecs.umich.edu 1144587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1154587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1164587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1174587Sgblack@eecs.umich.edu { 1184587Sgblack@eecs.umich.edu Fault fault = NoFault; 1194587Sgblack@eecs.umich.edu Addr EA; 1204587Sgblack@eecs.umich.edu 1214587Sgblack@eecs.umich.edu %(op_decl)s; 1224587Sgblack@eecs.umich.edu %(op_rd)s; 1234587Sgblack@eecs.umich.edu %(ea_code)s; 1244587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1254587Sgblack@eecs.umich.edu 1264720Sgblack@eecs.umich.edu unsigned flags = 0; 1274720Sgblack@eecs.umich.edu switch(dataSize) 1284720Sgblack@eecs.umich.edu { 1294720Sgblack@eecs.umich.edu case 1: 1304720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint8_t&)Mem, flags); 1314720Sgblack@eecs.umich.edu break; 1324720Sgblack@eecs.umich.edu case 2: 1334720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint16_t&)Mem, flags); 1344720Sgblack@eecs.umich.edu break; 1354720Sgblack@eecs.umich.edu case 4: 1364720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint32_t&)Mem, flags); 1374720Sgblack@eecs.umich.edu break; 1384720Sgblack@eecs.umich.edu case 8: 1394720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint64_t&)Mem, flags); 1404720Sgblack@eecs.umich.edu break; 1414720Sgblack@eecs.umich.edu default: 1424720Sgblack@eecs.umich.edu panic("Bad operand size!\n"); 1434720Sgblack@eecs.umich.edu } 1444720Sgblack@eecs.umich.edu 1454587Sgblack@eecs.umich.edu if(fault == NoFault) 1464587Sgblack@eecs.umich.edu { 1474587Sgblack@eecs.umich.edu %(code)s; 1484587Sgblack@eecs.umich.edu } 1494587Sgblack@eecs.umich.edu if(fault == NoFault) 1504587Sgblack@eecs.umich.edu { 1514587Sgblack@eecs.umich.edu %(op_wb)s; 1524587Sgblack@eecs.umich.edu } 1534587Sgblack@eecs.umich.edu 1544587Sgblack@eecs.umich.edu return fault; 1554587Sgblack@eecs.umich.edu } 1564587Sgblack@eecs.umich.edu}}; 1574587Sgblack@eecs.umich.edu 1584587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1594587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1604587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1614587Sgblack@eecs.umich.edu { 1624587Sgblack@eecs.umich.edu Fault fault = NoFault; 1634587Sgblack@eecs.umich.edu Addr EA; 1644587Sgblack@eecs.umich.edu 1654587Sgblack@eecs.umich.edu %(op_decl)s; 1664587Sgblack@eecs.umich.edu %(op_rd)s; 1674587Sgblack@eecs.umich.edu %(ea_code)s; 1684587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1694587Sgblack@eecs.umich.edu 1704720Sgblack@eecs.umich.edu unsigned flags = 0; 1714720Sgblack@eecs.umich.edu switch(dataSize) 1724720Sgblack@eecs.umich.edu { 1734720Sgblack@eecs.umich.edu case 1: 1744720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint8_t&)Mem, flags); 1754720Sgblack@eecs.umich.edu break; 1764720Sgblack@eecs.umich.edu case 2: 1774720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint16_t&)Mem, flags); 1784720Sgblack@eecs.umich.edu break; 1794720Sgblack@eecs.umich.edu case 4: 1804720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint32_t&)Mem, flags); 1814720Sgblack@eecs.umich.edu break; 1824720Sgblack@eecs.umich.edu case 8: 1834720Sgblack@eecs.umich.edu fault = xc->read(EA, (uint64_t&)Mem, flags); 1844720Sgblack@eecs.umich.edu break; 1854720Sgblack@eecs.umich.edu default: 1864720Sgblack@eecs.umich.edu panic("Bad operand size!\n"); 1874720Sgblack@eecs.umich.edu } 1884587Sgblack@eecs.umich.edu 1894587Sgblack@eecs.umich.edu return fault; 1904587Sgblack@eecs.umich.edu } 1914587Sgblack@eecs.umich.edu}}; 1924587Sgblack@eecs.umich.edu 1934587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1944587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1954587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1964587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1974587Sgblack@eecs.umich.edu { 1984587Sgblack@eecs.umich.edu Fault fault = NoFault; 1994587Sgblack@eecs.umich.edu 2004587Sgblack@eecs.umich.edu %(op_decl)s; 2014587Sgblack@eecs.umich.edu %(op_rd)s; 2024587Sgblack@eecs.umich.edu 2034587Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 2044587Sgblack@eecs.umich.edu %(code)s; 2054587Sgblack@eecs.umich.edu 2064587Sgblack@eecs.umich.edu if(fault == NoFault) 2074587Sgblack@eecs.umich.edu { 2084587Sgblack@eecs.umich.edu %(op_wb)s; 2094587Sgblack@eecs.umich.edu } 2104587Sgblack@eecs.umich.edu 2114587Sgblack@eecs.umich.edu return fault; 2124587Sgblack@eecs.umich.edu } 2134587Sgblack@eecs.umich.edu}}; 2144587Sgblack@eecs.umich.edu 2154587Sgblack@eecs.umich.edu// Store templates 2164587Sgblack@eecs.umich.edu 2174587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 2184587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 2194587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2204587Sgblack@eecs.umich.edu { 2214587Sgblack@eecs.umich.edu Fault fault = NoFault; 2224587Sgblack@eecs.umich.edu 2234587Sgblack@eecs.umich.edu Addr EA; 2244587Sgblack@eecs.umich.edu %(op_decl)s; 2254587Sgblack@eecs.umich.edu %(op_rd)s; 2264587Sgblack@eecs.umich.edu %(ea_code)s; 2274587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2284587Sgblack@eecs.umich.edu 2294587Sgblack@eecs.umich.edu %(code)s; 2304587Sgblack@eecs.umich.edu 2314587Sgblack@eecs.umich.edu if(fault == NoFault) 2324587Sgblack@eecs.umich.edu { 2334720Sgblack@eecs.umich.edu unsigned flags = 0; 2344720Sgblack@eecs.umich.edu uint64_t *res = 0; 2354720Sgblack@eecs.umich.edu switch(dataSize) 2364720Sgblack@eecs.umich.edu { 2374720Sgblack@eecs.umich.edu case 1: 2384720Sgblack@eecs.umich.edu fault = xc->write((uint8_t&)Mem, EA, flags, res); 2394720Sgblack@eecs.umich.edu break; 2404720Sgblack@eecs.umich.edu case 2: 2414720Sgblack@eecs.umich.edu fault = xc->write((uint16_t&)Mem, EA, flags, res); 2424720Sgblack@eecs.umich.edu break; 2434720Sgblack@eecs.umich.edu case 4: 2444720Sgblack@eecs.umich.edu fault = xc->write((uint32_t&)Mem, EA, flags, res); 2454720Sgblack@eecs.umich.edu break; 2464720Sgblack@eecs.umich.edu case 8: 2474720Sgblack@eecs.umich.edu fault = xc->write((uint64_t&)Mem, EA, flags, res); 2484720Sgblack@eecs.umich.edu break; 2494720Sgblack@eecs.umich.edu default: 2504720Sgblack@eecs.umich.edu panic("Bad operand size!\n"); 2514720Sgblack@eecs.umich.edu } 2524587Sgblack@eecs.umich.edu } 2534587Sgblack@eecs.umich.edu if(fault == NoFault) 2544587Sgblack@eecs.umich.edu { 2554587Sgblack@eecs.umich.edu %(op_wb)s; 2564587Sgblack@eecs.umich.edu } 2574587Sgblack@eecs.umich.edu 2584587Sgblack@eecs.umich.edu return fault; 2594587Sgblack@eecs.umich.edu } 2604587Sgblack@eecs.umich.edu}}; 2614587Sgblack@eecs.umich.edu 2624587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2634587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2644587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2654587Sgblack@eecs.umich.edu { 2664587Sgblack@eecs.umich.edu Fault fault = NoFault; 2674587Sgblack@eecs.umich.edu 2684587Sgblack@eecs.umich.edu Addr EA; 2694587Sgblack@eecs.umich.edu %(op_decl)s; 2704587Sgblack@eecs.umich.edu %(op_rd)s; 2714587Sgblack@eecs.umich.edu %(ea_code)s; 2724587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2734587Sgblack@eecs.umich.edu 2744587Sgblack@eecs.umich.edu %(code)s; 2754587Sgblack@eecs.umich.edu 2764587Sgblack@eecs.umich.edu if(fault == NoFault) 2774587Sgblack@eecs.umich.edu { 2784720Sgblack@eecs.umich.edu unsigned flags = 0; 2794720Sgblack@eecs.umich.edu uint64_t *res = 0; 2804720Sgblack@eecs.umich.edu switch(dataSize) 2814720Sgblack@eecs.umich.edu { 2824720Sgblack@eecs.umich.edu case 1: 2834720Sgblack@eecs.umich.edu fault = xc->write((uint8_t&)Mem, EA, flags, res); 2844720Sgblack@eecs.umich.edu break; 2854720Sgblack@eecs.umich.edu case 2: 2864720Sgblack@eecs.umich.edu fault = xc->write((uint16_t&)Mem, EA, flags, res); 2874720Sgblack@eecs.umich.edu break; 2884720Sgblack@eecs.umich.edu case 4: 2894720Sgblack@eecs.umich.edu fault = xc->write((uint32_t&)Mem, EA, flags, res); 2904720Sgblack@eecs.umich.edu break; 2914720Sgblack@eecs.umich.edu case 8: 2924720Sgblack@eecs.umich.edu fault = xc->write((uint64_t&)Mem, EA, flags, res); 2934720Sgblack@eecs.umich.edu break; 2944720Sgblack@eecs.umich.edu default: 2954720Sgblack@eecs.umich.edu panic("Bad operand size!\n"); 2964720Sgblack@eecs.umich.edu } 2974587Sgblack@eecs.umich.edu } 2984587Sgblack@eecs.umich.edu if(fault == NoFault) 2994587Sgblack@eecs.umich.edu { 3004587Sgblack@eecs.umich.edu %(op_wb)s; 3014587Sgblack@eecs.umich.edu } 3024587Sgblack@eecs.umich.edu return fault; 3034587Sgblack@eecs.umich.edu } 3044587Sgblack@eecs.umich.edu}}; 3054587Sgblack@eecs.umich.edu 3064587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 3074587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc, 3084587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 3094587Sgblack@eecs.umich.edu { 3104587Sgblack@eecs.umich.edu return NoFault; 3114587Sgblack@eecs.umich.edu } 3124587Sgblack@eecs.umich.edu}}; 3134587Sgblack@eecs.umich.edu 3144587Sgblack@eecs.umich.edu// Common templates 3154587Sgblack@eecs.umich.edu 3164587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 3174587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 3184587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 3194587Sgblack@eecs.umich.edu}}; 3204587Sgblack@eecs.umich.edu 3214587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 3224587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 3234587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 3244587Sgblack@eecs.umich.edu}}; 3254587Sgblack@eecs.umich.edu 3264587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 3274587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 3284587Sgblack@eecs.umich.edu { 3294587Sgblack@eecs.umich.edu protected: 3304561Sgblack@eecs.umich.edu void buildMe(); 3314561Sgblack@eecs.umich.edu 3324561Sgblack@eecs.umich.edu public: 3334561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 3344561Sgblack@eecs.umich.edu const char * instMnem, 3354561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3364561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3374561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3384561Sgblack@eecs.umich.edu RegIndex _data, 3394561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 3404561Sgblack@eecs.umich.edu 3414561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 3424561Sgblack@eecs.umich.edu const char * instMnem, 3434561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3444561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3454561Sgblack@eecs.umich.edu RegIndex _data, 3464561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 3474561Sgblack@eecs.umich.edu 3484561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 3494587Sgblack@eecs.umich.edu 3504587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 3514587Sgblack@eecs.umich.edu 3524587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 3534561Sgblack@eecs.umich.edu }; 3544561Sgblack@eecs.umich.edu}}; 3554561Sgblack@eecs.umich.edu 3564561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 3574561Sgblack@eecs.umich.edu 3584561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 3594561Sgblack@eecs.umich.edu { 3604561Sgblack@eecs.umich.edu %(constructor)s; 3614561Sgblack@eecs.umich.edu } 3624561Sgblack@eecs.umich.edu 3634561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3644561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3654561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3664561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3674561Sgblack@eecs.umich.edu RegIndex _data, 3684561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3694561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3704587Sgblack@eecs.umich.edu false, false, false, false, 3714587Sgblack@eecs.umich.edu _scale, _index, _base, 3724587Sgblack@eecs.umich.edu _disp, _segment, _data, 3734587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3744561Sgblack@eecs.umich.edu { 3754561Sgblack@eecs.umich.edu buildMe(); 3764561Sgblack@eecs.umich.edu } 3774561Sgblack@eecs.umich.edu 3784561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3794561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3804561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3814561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3824587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3834587Sgblack@eecs.umich.edu RegIndex _data, 3844587Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3854561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3864587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, 3874587Sgblack@eecs.umich.edu _scale, _index, _base, 3884587Sgblack@eecs.umich.edu _disp, _segment, _data, 3894587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3904561Sgblack@eecs.umich.edu { 3914561Sgblack@eecs.umich.edu buildMe(); 3924561Sgblack@eecs.umich.edu } 3934561Sgblack@eecs.umich.edu}}; 3944561Sgblack@eecs.umich.edu 3954587Sgblack@eecs.umich.edulet {{ 3964587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3974712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp, dataSize): 3984587Sgblack@eecs.umich.edu self.data = data 3994587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 4004587Sgblack@eecs.umich.edu self.disp = disp 4014587Sgblack@eecs.umich.edu self.segment = segment 4024712Sgblack@eecs.umich.edu self.dataSize = dataSize 4034587Sgblack@eecs.umich.edu self.addressSize = "env.addressSize" 4044587Sgblack@eecs.umich.edu 4054587Sgblack@eecs.umich.edu def getAllocator(self, *microFlags): 4064587Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, mnemonic 4074587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 4084587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 4094587Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s)''' % { 4104587Sgblack@eecs.umich.edu "class_name" : self.className, 4114587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 4124587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 4134587Sgblack@eecs.umich.edu "base" : self.base, 4144587Sgblack@eecs.umich.edu "disp" : self.disp, 4154587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 4164587Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize} 4174587Sgblack@eecs.umich.edu return allocator 4184587Sgblack@eecs.umich.edu}}; 4194587Sgblack@eecs.umich.edu 4204587Sgblack@eecs.umich.edulet {{ 4214587Sgblack@eecs.umich.edu 4224587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 4234587Sgblack@eecs.umich.edu # them will always work. 4244587Sgblack@eecs.umich.edu header_output = "" 4254587Sgblack@eecs.umich.edu decoder_output = "" 4264587Sgblack@eecs.umich.edu exec_output = "" 4274587Sgblack@eecs.umich.edu 4284587Sgblack@eecs.umich.edu calculateEA = "EA = scale * Index + Base + disp;" 4294587Sgblack@eecs.umich.edu 4304587Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code): 4314587Sgblack@eecs.umich.edu global header_output 4324587Sgblack@eecs.umich.edu global decoder_output 4334587Sgblack@eecs.umich.edu global exec_output 4344587Sgblack@eecs.umich.edu global microopClasses 4354587Sgblack@eecs.umich.edu Name = mnemonic 4364587Sgblack@eecs.umich.edu name = mnemonic.lower() 4374587Sgblack@eecs.umich.edu 4384587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4394679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4404587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 4414587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4424587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4434587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 4444587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 4454587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 4464587Sgblack@eecs.umich.edu 4474587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 4484712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 4494712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 4504712Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, 4514712Sgblack@eecs.umich.edu addr, disp, dataSize) 4524587Sgblack@eecs.umich.edu self.className = Name 4534587Sgblack@eecs.umich.edu self.mnemonic = name 4544587Sgblack@eecs.umich.edu 4554587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 4564587Sgblack@eecs.umich.edu 4574587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 4584587Sgblack@eecs.umich.edu 4594587Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code): 4604587Sgblack@eecs.umich.edu global header_output 4614587Sgblack@eecs.umich.edu global decoder_output 4624587Sgblack@eecs.umich.edu global exec_output 4634587Sgblack@eecs.umich.edu global microopClasses 4644587Sgblack@eecs.umich.edu Name = mnemonic 4654587Sgblack@eecs.umich.edu name = mnemonic.lower() 4664587Sgblack@eecs.umich.edu 4674587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4684679Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'X86ISA::LdStOp', 4694587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 4704587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4714587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4724587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4734587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4744587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4754587Sgblack@eecs.umich.edu 4764587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4774712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 4784712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 4794712Sgblack@eecs.umich.edu super(StoreOp, self).__init__(data, segment, 4804712Sgblack@eecs.umich.edu addr, disp, dataSize) 4814587Sgblack@eecs.umich.edu self.className = Name 4824587Sgblack@eecs.umich.edu self.mnemonic = name 4834587Sgblack@eecs.umich.edu 4844587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4854587Sgblack@eecs.umich.edu 4864706Sgblack@eecs.umich.edu defineMicroStoreOp('St', 'Mem = Data;') 4874601Sgblack@eecs.umich.edu 4884679Sgblack@eecs.umich.edu iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp', 4894601Sgblack@eecs.umich.edu {"code": "Data = merge(Data, EA, dataSize);", "ea_code": calculateEA}) 4904601Sgblack@eecs.umich.edu header_output += MicroLeaDeclare.subst(iop) 4914601Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4924601Sgblack@eecs.umich.edu exec_output += MicroLeaExecute.subst(iop) 4934601Sgblack@eecs.umich.edu 4944601Sgblack@eecs.umich.edu class LeaOp(LdStOp): 4954712Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, 4964712Sgblack@eecs.umich.edu disp = 0, dataSize="env.dataSize"): 4974712Sgblack@eecs.umich.edu super(LeaOp, self).__init__(data, segment, 4984712Sgblack@eecs.umich.edu addr, disp, dataSize) 4994601Sgblack@eecs.umich.edu self.className = "Lea" 5004601Sgblack@eecs.umich.edu self.mnemonic = "lea" 5014601Sgblack@eecs.umich.edu 5024601Sgblack@eecs.umich.edu microopClasses["lea"] = LeaOp 5034587Sgblack@eecs.umich.edu}}; 5044587Sgblack@eecs.umich.edu 505