ldstop.isa revision 4587
14561Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company 24561Sgblack@eecs.umich.edu// All rights reserved. 34561Sgblack@eecs.umich.edu// 44561Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 54561Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 64561Sgblack@eecs.umich.edu// following conditions are met: 74561Sgblack@eecs.umich.edu// 84561Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 94561Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 104561Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 114561Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 124561Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 134561Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 144561Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 154561Sgblack@eecs.umich.edu// commercial advantage. 164561Sgblack@eecs.umich.edu// 174561Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 184561Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 194561Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 204561Sgblack@eecs.umich.edu// Office of Strategy and Technology 214561Sgblack@eecs.umich.edu// Hewlett-Packard Company 224561Sgblack@eecs.umich.edu// 1501 Page Mill Road 234561Sgblack@eecs.umich.edu// Palo Alto, California 94304 244561Sgblack@eecs.umich.edu// 254561Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 264561Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 274561Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 284561Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 294561Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 304561Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 314561Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 324561Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 334561Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 344561Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 354561Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 364561Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 374561Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 384561Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 394561Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 404561Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 414561Sgblack@eecs.umich.edu// 424561Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 434561Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 444561Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 454561Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 464561Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 474561Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 484561Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 494561Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 504561Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 514561Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 524561Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 534561Sgblack@eecs.umich.edu// 544561Sgblack@eecs.umich.edu// Authors: Gabe Black 554561Sgblack@eecs.umich.edu 564561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 574561Sgblack@eecs.umich.edu// 584561Sgblack@eecs.umich.edu// LdStOp Microop templates 594561Sgblack@eecs.umich.edu// 604561Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 614561Sgblack@eecs.umich.edu 624587Sgblack@eecs.umich.edu 634587Sgblack@eecs.umich.edu// Load templates 644587Sgblack@eecs.umich.edu 654587Sgblack@eecs.umich.eduoutput header {{ 664587Sgblack@eecs.umich.edu /** 674587Sgblack@eecs.umich.edu * Base class for load and store ops 684587Sgblack@eecs.umich.edu */ 694587Sgblack@eecs.umich.edu class LdStOp : public X86MicroopBase 704561Sgblack@eecs.umich.edu { 714561Sgblack@eecs.umich.edu protected: 724561Sgblack@eecs.umich.edu const uint8_t scale; 734561Sgblack@eecs.umich.edu const RegIndex index; 744561Sgblack@eecs.umich.edu const RegIndex base; 754561Sgblack@eecs.umich.edu const uint64_t disp; 764561Sgblack@eecs.umich.edu const uint8_t segment; 774561Sgblack@eecs.umich.edu const RegIndex data; 784561Sgblack@eecs.umich.edu const uint8_t dataSize; 794561Sgblack@eecs.umich.edu const uint8_t addressSize; 804587Sgblack@eecs.umich.edu 814587Sgblack@eecs.umich.edu //Constructor 824587Sgblack@eecs.umich.edu LdStOp(ExtMachInst _machInst, 834587Sgblack@eecs.umich.edu const char * mnem, const char * _instMnem, 844587Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 854587Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 864587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 874587Sgblack@eecs.umich.edu RegIndex _data, 884587Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize, 894587Sgblack@eecs.umich.edu OpClass __opClass) : 904587Sgblack@eecs.umich.edu X86MicroopBase(machInst, mnem, _instMnem, 914587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, __opClass), 924587Sgblack@eecs.umich.edu scale(_scale), index(_index), base(_base), 934587Sgblack@eecs.umich.edu disp(_disp), segment(_segment), 944587Sgblack@eecs.umich.edu data(_data), 954587Sgblack@eecs.umich.edu dataSize(_dataSize), addressSize(_addressSize) 964587Sgblack@eecs.umich.edu {} 974587Sgblack@eecs.umich.edu 984587Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 994587Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 1004587Sgblack@eecs.umich.edu }; 1014587Sgblack@eecs.umich.edu}}; 1024587Sgblack@eecs.umich.edu 1034587Sgblack@eecs.umich.eduoutput decoder {{ 1044587Sgblack@eecs.umich.edu std::string LdStOp::generateDisassembly(Addr pc, 1054587Sgblack@eecs.umich.edu const SymbolTable *symtab) const 1064587Sgblack@eecs.umich.edu { 1074587Sgblack@eecs.umich.edu std::stringstream response; 1084587Sgblack@eecs.umich.edu 1094587Sgblack@eecs.umich.edu printMnemonic(response, instMnem, mnemonic); 1104587Sgblack@eecs.umich.edu printReg(response, data); 1114587Sgblack@eecs.umich.edu response << ", "; 1124587Sgblack@eecs.umich.edu printSegment(response, segment); 1134587Sgblack@eecs.umich.edu ccprintf(response, ":[%d*", scale); 1144587Sgblack@eecs.umich.edu printReg(response, index); 1154587Sgblack@eecs.umich.edu response << " + "; 1164587Sgblack@eecs.umich.edu printReg(response, base); 1174587Sgblack@eecs.umich.edu ccprintf(response, " + %#x]", disp); 1184587Sgblack@eecs.umich.edu return response.str(); 1194587Sgblack@eecs.umich.edu } 1204587Sgblack@eecs.umich.edu}}; 1214587Sgblack@eecs.umich.edu 1224587Sgblack@eecs.umich.edudef template MicroLoadExecute {{ 1234587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1244587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1254587Sgblack@eecs.umich.edu { 1264587Sgblack@eecs.umich.edu Fault fault = NoFault; 1274587Sgblack@eecs.umich.edu Addr EA; 1284587Sgblack@eecs.umich.edu 1294587Sgblack@eecs.umich.edu %(op_decl)s; 1304587Sgblack@eecs.umich.edu %(op_rd)s; 1314587Sgblack@eecs.umich.edu %(ea_code)s; 1324587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1334587Sgblack@eecs.umich.edu 1344587Sgblack@eecs.umich.edu fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, 0); 1354587Sgblack@eecs.umich.edu if(fault == NoFault) 1364587Sgblack@eecs.umich.edu { 1374587Sgblack@eecs.umich.edu %(code)s; 1384587Sgblack@eecs.umich.edu } 1394587Sgblack@eecs.umich.edu if(fault == NoFault) 1404587Sgblack@eecs.umich.edu { 1414587Sgblack@eecs.umich.edu %(op_wb)s; 1424587Sgblack@eecs.umich.edu } 1434587Sgblack@eecs.umich.edu 1444587Sgblack@eecs.umich.edu return fault; 1454587Sgblack@eecs.umich.edu } 1464587Sgblack@eecs.umich.edu}}; 1474587Sgblack@eecs.umich.edu 1484587Sgblack@eecs.umich.edudef template MicroLoadInitiateAcc {{ 1494587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1504587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1514587Sgblack@eecs.umich.edu { 1524587Sgblack@eecs.umich.edu Fault fault = NoFault; 1534587Sgblack@eecs.umich.edu Addr EA; 1544587Sgblack@eecs.umich.edu 1554587Sgblack@eecs.umich.edu %(op_decl)s; 1564587Sgblack@eecs.umich.edu %(op_rd)s; 1574587Sgblack@eecs.umich.edu %(ea_code)s; 1584587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 1594587Sgblack@eecs.umich.edu 1604587Sgblack@eecs.umich.edu fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, 0); 1614587Sgblack@eecs.umich.edu 1624587Sgblack@eecs.umich.edu return fault; 1634587Sgblack@eecs.umich.edu } 1644587Sgblack@eecs.umich.edu}}; 1654587Sgblack@eecs.umich.edu 1664587Sgblack@eecs.umich.edudef template MicroLoadCompleteAcc {{ 1674587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, 1684587Sgblack@eecs.umich.edu %(CPU_exec_context)s * xc, 1694587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1704587Sgblack@eecs.umich.edu { 1714587Sgblack@eecs.umich.edu Fault fault = NoFault; 1724587Sgblack@eecs.umich.edu 1734587Sgblack@eecs.umich.edu %(op_decl)s; 1744587Sgblack@eecs.umich.edu %(op_rd)s; 1754587Sgblack@eecs.umich.edu 1764587Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 1774587Sgblack@eecs.umich.edu %(code)s; 1784587Sgblack@eecs.umich.edu 1794587Sgblack@eecs.umich.edu if(fault == NoFault) 1804587Sgblack@eecs.umich.edu { 1814587Sgblack@eecs.umich.edu %(op_wb)s; 1824587Sgblack@eecs.umich.edu } 1834587Sgblack@eecs.umich.edu 1844587Sgblack@eecs.umich.edu return fault; 1854587Sgblack@eecs.umich.edu } 1864587Sgblack@eecs.umich.edu}}; 1874587Sgblack@eecs.umich.edu 1884587Sgblack@eecs.umich.edu// Store templates 1894587Sgblack@eecs.umich.edu 1904587Sgblack@eecs.umich.edudef template MicroStoreExecute {{ 1914587Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s * xc, 1924587Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1934587Sgblack@eecs.umich.edu { 1944587Sgblack@eecs.umich.edu Fault fault = NoFault; 1954587Sgblack@eecs.umich.edu 1964587Sgblack@eecs.umich.edu Addr EA; 1974587Sgblack@eecs.umich.edu %(op_decl)s; 1984587Sgblack@eecs.umich.edu %(op_rd)s; 1994587Sgblack@eecs.umich.edu %(ea_code)s; 2004587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2014587Sgblack@eecs.umich.edu 2024587Sgblack@eecs.umich.edu %(code)s; 2034587Sgblack@eecs.umich.edu 2044587Sgblack@eecs.umich.edu if(fault == NoFault) 2054587Sgblack@eecs.umich.edu { 2064587Sgblack@eecs.umich.edu fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, 2074587Sgblack@eecs.umich.edu EA, 0, 0); 2084587Sgblack@eecs.umich.edu } 2094587Sgblack@eecs.umich.edu if(fault == NoFault) 2104587Sgblack@eecs.umich.edu { 2114587Sgblack@eecs.umich.edu %(op_wb)s; 2124587Sgblack@eecs.umich.edu } 2134587Sgblack@eecs.umich.edu 2144587Sgblack@eecs.umich.edu return fault; 2154587Sgblack@eecs.umich.edu } 2164587Sgblack@eecs.umich.edu}}; 2174587Sgblack@eecs.umich.edu 2184587Sgblack@eecs.umich.edudef template MicroStoreInitiateAcc {{ 2194587Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2204587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2214587Sgblack@eecs.umich.edu { 2224587Sgblack@eecs.umich.edu Fault fault = NoFault; 2234587Sgblack@eecs.umich.edu 2244587Sgblack@eecs.umich.edu Addr EA; 2254587Sgblack@eecs.umich.edu %(op_decl)s; 2264587Sgblack@eecs.umich.edu %(op_rd)s; 2274587Sgblack@eecs.umich.edu %(ea_code)s; 2284587Sgblack@eecs.umich.edu DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA); 2294587Sgblack@eecs.umich.edu 2304587Sgblack@eecs.umich.edu %(code)s; 2314587Sgblack@eecs.umich.edu 2324587Sgblack@eecs.umich.edu if(fault == NoFault) 2334587Sgblack@eecs.umich.edu { 2344587Sgblack@eecs.umich.edu fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, 2354587Sgblack@eecs.umich.edu EA, 0, 0); 2364587Sgblack@eecs.umich.edu } 2374587Sgblack@eecs.umich.edu if(fault == NoFault) 2384587Sgblack@eecs.umich.edu { 2394587Sgblack@eecs.umich.edu %(op_wb)s; 2404587Sgblack@eecs.umich.edu } 2414587Sgblack@eecs.umich.edu return fault; 2424587Sgblack@eecs.umich.edu } 2434587Sgblack@eecs.umich.edu}}; 2444587Sgblack@eecs.umich.edu 2454587Sgblack@eecs.umich.edudef template MicroStoreCompleteAcc {{ 2464587Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc, 2474587Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2484587Sgblack@eecs.umich.edu { 2494587Sgblack@eecs.umich.edu return NoFault; 2504587Sgblack@eecs.umich.edu } 2514587Sgblack@eecs.umich.edu}}; 2524587Sgblack@eecs.umich.edu 2534587Sgblack@eecs.umich.edu// Common templates 2544587Sgblack@eecs.umich.edu 2554587Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2564587Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2574587Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2584587Sgblack@eecs.umich.edu}}; 2594587Sgblack@eecs.umich.edu 2604587Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2614587Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2624587Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2634587Sgblack@eecs.umich.edu}}; 2644587Sgblack@eecs.umich.edu 2654587Sgblack@eecs.umich.edudef template MicroLdStOpDeclare {{ 2664587Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 2674587Sgblack@eecs.umich.edu { 2684587Sgblack@eecs.umich.edu protected: 2694561Sgblack@eecs.umich.edu void buildMe(); 2704561Sgblack@eecs.umich.edu 2714561Sgblack@eecs.umich.edu public: 2724561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2734561Sgblack@eecs.umich.edu const char * instMnem, 2744561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 2754561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2764561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2774561Sgblack@eecs.umich.edu RegIndex _data, 2784561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 2794561Sgblack@eecs.umich.edu 2804561Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 2814561Sgblack@eecs.umich.edu const char * instMnem, 2824561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 2834561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 2844561Sgblack@eecs.umich.edu RegIndex _data, 2854561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize); 2864561Sgblack@eecs.umich.edu 2874561Sgblack@eecs.umich.edu %(BasicExecDeclare)s 2884587Sgblack@eecs.umich.edu 2894587Sgblack@eecs.umich.edu %(InitiateAccDeclare)s 2904587Sgblack@eecs.umich.edu 2914587Sgblack@eecs.umich.edu %(CompleteAccDeclare)s 2924561Sgblack@eecs.umich.edu }; 2934561Sgblack@eecs.umich.edu}}; 2944561Sgblack@eecs.umich.edu 2954561Sgblack@eecs.umich.edudef template MicroLdStOpConstructor {{ 2964561Sgblack@eecs.umich.edu 2974561Sgblack@eecs.umich.edu inline void %(class_name)s::buildMe() 2984561Sgblack@eecs.umich.edu { 2994561Sgblack@eecs.umich.edu %(constructor)s; 3004561Sgblack@eecs.umich.edu } 3014561Sgblack@eecs.umich.edu 3024561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3034561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3044561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3054561Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3064561Sgblack@eecs.umich.edu RegIndex _data, 3074561Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3084561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3094587Sgblack@eecs.umich.edu false, false, false, false, 3104587Sgblack@eecs.umich.edu _scale, _index, _base, 3114587Sgblack@eecs.umich.edu _disp, _segment, _data, 3124587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3134561Sgblack@eecs.umich.edu { 3144561Sgblack@eecs.umich.edu buildMe(); 3154561Sgblack@eecs.umich.edu } 3164561Sgblack@eecs.umich.edu 3174561Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s( 3184561Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, 3194561Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 3204561Sgblack@eecs.umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 3214587Sgblack@eecs.umich.edu uint64_t _disp, uint8_t _segment, 3224587Sgblack@eecs.umich.edu RegIndex _data, 3234587Sgblack@eecs.umich.edu uint8_t _dataSize, uint8_t _addressSize) : 3244561Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, 3254587Sgblack@eecs.umich.edu isMicro, isDelayed, isFirst, isLast, 3264587Sgblack@eecs.umich.edu _scale, _index, _base, 3274587Sgblack@eecs.umich.edu _disp, _segment, _data, 3284587Sgblack@eecs.umich.edu _dataSize, _addressSize, %(op_class)s) 3294561Sgblack@eecs.umich.edu { 3304561Sgblack@eecs.umich.edu buildMe(); 3314561Sgblack@eecs.umich.edu } 3324561Sgblack@eecs.umich.edu}}; 3334561Sgblack@eecs.umich.edu 3344587Sgblack@eecs.umich.edulet {{ 3354587Sgblack@eecs.umich.edu class LdStOp(X86Microop): 3364587Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp): 3374587Sgblack@eecs.umich.edu self.data = data 3384587Sgblack@eecs.umich.edu [self.scale, self.index, self.base] = addr 3394587Sgblack@eecs.umich.edu self.disp = disp 3404587Sgblack@eecs.umich.edu self.segment = segment 3414587Sgblack@eecs.umich.edu self.dataSize = "env.dataSize" 3424587Sgblack@eecs.umich.edu self.addressSize = "env.addressSize" 3434587Sgblack@eecs.umich.edu 3444587Sgblack@eecs.umich.edu def getAllocator(self, *microFlags): 3454587Sgblack@eecs.umich.edu allocator = '''new %(class_name)s(machInst, mnemonic 3464587Sgblack@eecs.umich.edu %(flags)s, %(scale)s, %(index)s, %(base)s, 3474587Sgblack@eecs.umich.edu %(disp)s, %(segment)s, %(data)s, 3484587Sgblack@eecs.umich.edu %(dataSize)s, %(addressSize)s)''' % { 3494587Sgblack@eecs.umich.edu "class_name" : self.className, 3504587Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 3514587Sgblack@eecs.umich.edu "scale" : self.scale, "index" : self.index, 3524587Sgblack@eecs.umich.edu "base" : self.base, 3534587Sgblack@eecs.umich.edu "disp" : self.disp, 3544587Sgblack@eecs.umich.edu "segment" : self.segment, "data" : self.data, 3554587Sgblack@eecs.umich.edu "dataSize" : self.dataSize, "addressSize" : self.addressSize} 3564587Sgblack@eecs.umich.edu return allocator 3574587Sgblack@eecs.umich.edu}}; 3584587Sgblack@eecs.umich.edu 3594587Sgblack@eecs.umich.edulet {{ 3604587Sgblack@eecs.umich.edu 3614587Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 3624587Sgblack@eecs.umich.edu # them will always work. 3634587Sgblack@eecs.umich.edu header_output = "" 3644587Sgblack@eecs.umich.edu decoder_output = "" 3654587Sgblack@eecs.umich.edu exec_output = "" 3664587Sgblack@eecs.umich.edu 3674587Sgblack@eecs.umich.edu calculateEA = "EA = scale * Index + Base + disp;" 3684587Sgblack@eecs.umich.edu 3694587Sgblack@eecs.umich.edu def defineMicroLoadOp(mnemonic, code): 3704587Sgblack@eecs.umich.edu global header_output 3714587Sgblack@eecs.umich.edu global decoder_output 3724587Sgblack@eecs.umich.edu global exec_output 3734587Sgblack@eecs.umich.edu global microopClasses 3744587Sgblack@eecs.umich.edu Name = mnemonic 3754587Sgblack@eecs.umich.edu name = mnemonic.lower() 3764587Sgblack@eecs.umich.edu 3774587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 3784587Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'LdStOp', 3794587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 3804587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 3814587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 3824587Sgblack@eecs.umich.edu exec_output += MicroLoadExecute.subst(iop) 3834587Sgblack@eecs.umich.edu exec_output += MicroLoadInitiateAcc.subst(iop) 3844587Sgblack@eecs.umich.edu exec_output += MicroLoadCompleteAcc.subst(iop) 3854587Sgblack@eecs.umich.edu 3864587Sgblack@eecs.umich.edu class LoadOp(LdStOp): 3874587Sgblack@eecs.umich.edu def __init__(self, data, segment, addr, disp = 0): 3884587Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, segment, addr, disp) 3894587Sgblack@eecs.umich.edu self.className = Name 3904587Sgblack@eecs.umich.edu self.mnemonic = name 3914587Sgblack@eecs.umich.edu 3924587Sgblack@eecs.umich.edu microopClasses[name] = LoadOp 3934587Sgblack@eecs.umich.edu 3944587Sgblack@eecs.umich.edu defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') 3954587Sgblack@eecs.umich.edu 3964587Sgblack@eecs.umich.edu def defineMicroStoreOp(mnemonic, code): 3974587Sgblack@eecs.umich.edu global header_output 3984587Sgblack@eecs.umich.edu global decoder_output 3994587Sgblack@eecs.umich.edu global exec_output 4004587Sgblack@eecs.umich.edu global microopClasses 4014587Sgblack@eecs.umich.edu Name = mnemonic 4024587Sgblack@eecs.umich.edu name = mnemonic.lower() 4034587Sgblack@eecs.umich.edu 4044587Sgblack@eecs.umich.edu # Build up the all register version of this micro op 4054587Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'LdStOp', 4064587Sgblack@eecs.umich.edu {"code": code, "ea_code": calculateEA}) 4074587Sgblack@eecs.umich.edu header_output += MicroLdStOpDeclare.subst(iop) 4084587Sgblack@eecs.umich.edu decoder_output += MicroLdStOpConstructor.subst(iop) 4094587Sgblack@eecs.umich.edu exec_output += MicroStoreExecute.subst(iop) 4104587Sgblack@eecs.umich.edu exec_output += MicroStoreInitiateAcc.subst(iop) 4114587Sgblack@eecs.umich.edu exec_output += MicroStoreCompleteAcc.subst(iop) 4124587Sgblack@eecs.umich.edu 4134587Sgblack@eecs.umich.edu class StoreOp(LdStOp): 4144587Sgblack@eecs.umich.edu def __init__(self, data, addr, segment): 4154587Sgblack@eecs.umich.edu super(LoadOp, self).__init__(data, addr, segment) 4164587Sgblack@eecs.umich.edu self.className = Name 4174587Sgblack@eecs.umich.edu self.mnemonic = name 4184587Sgblack@eecs.umich.edu 4194587Sgblack@eecs.umich.edu microopClasses[name] = StoreOp 4204587Sgblack@eecs.umich.edu 4214587Sgblack@eecs.umich.edu defineMicroLoadOp('St', 'Mem = Data;') 4224587Sgblack@eecs.umich.edu}}; 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