fpop.isa revision 7620:3d8a23caa1ef
15449Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company
28610Snilay@cs.wisc.edu// All rights reserved.
34519Sgblack@eecs.umich.edu//
44519Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall
57087Snate@binkert.org// not be construed as granting a license to any other intellectual
67087Snate@binkert.org// property including but not limited to intellectual property relating
77087Snate@binkert.org// to a hardware implementation of the functionality of the software
87087Snate@binkert.org// licensed hereunder.  You may use the software subject to the license
97087Snate@binkert.org// terms below provided that you ensure that this notice is replicated
107087Snate@binkert.org// unmodified and in its entirety in all distributions of the software,
117087Snate@binkert.org// modified or unmodified, in source code or in binary form.
127087Snate@binkert.org//
134519Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without
147087Snate@binkert.org// modification, are permitted provided that the following conditions are
157087Snate@binkert.org// met: redistributions of source code must retain the above copyright
167087Snate@binkert.org// notice, this list of conditions and the following disclaimer;
177087Snate@binkert.org// redistributions in binary form must reproduce the above copyright
187087Snate@binkert.org// notice, this list of conditions and the following disclaimer in the
197087Snate@binkert.org// documentation and/or other materials provided with the distribution;
207087Snate@binkert.org// neither the name of the copyright holders nor the names of its
217087Snate@binkert.org// contributors may be used to endorse or promote products derived from
224519Sgblack@eecs.umich.edu// this software without specific prior written permission.
237087Snate@binkert.org//
244519Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
254519Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
264519Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
274519Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
284519Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
294519Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
304519Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
314519Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
324519Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
334519Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
344519Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
354519Sgblack@eecs.umich.edu//
364519Sgblack@eecs.umich.edu// Authors: Gabe Black
374519Sgblack@eecs.umich.edu
384519Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////////////
394519Sgblack@eecs.umich.edu//
404519Sgblack@eecs.umich.edu// FpOp Microop templates
414519Sgblack@eecs.umich.edu//
424519Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////////////
434519Sgblack@eecs.umich.edu
444519Sgblack@eecs.umich.edudef template MicroFpOpExecute {{
454590Sgblack@eecs.umich.edu        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
465163Sgblack@eecs.umich.edu                Trace::InstRecord *traceData) const
474590Sgblack@eecs.umich.edu        {
484590Sgblack@eecs.umich.edu            Fault fault = NoFault;
494590Sgblack@eecs.umich.edu
505163Sgblack@eecs.umich.edu            DPRINTF(X86, "The data size is %d\n", dataSize);
514590Sgblack@eecs.umich.edu            %(op_decl)s;
524590Sgblack@eecs.umich.edu            %(op_rd)s;
535163Sgblack@eecs.umich.edu
547620Sgblack@eecs.umich.edu            if(%(cond_check)s)
554590Sgblack@eecs.umich.edu            {
564696Sgblack@eecs.umich.edu                %(code)s;
574696Sgblack@eecs.umich.edu                %(flag_code)s;
584590Sgblack@eecs.umich.edu                %(top_code)s;
595172Sgblack@eecs.umich.edu            }
605172Sgblack@eecs.umich.edu            else
615172Sgblack@eecs.umich.edu            {
625172Sgblack@eecs.umich.edu                %(else_code)s;
635172Sgblack@eecs.umich.edu            }
647620Sgblack@eecs.umich.edu
657682Sgblack@eecs.umich.edu            //Write the resulting state to the execution context
667682Sgblack@eecs.umich.edu            if(fault == NoFault)
677682Sgblack@eecs.umich.edu            {
685172Sgblack@eecs.umich.edu                %(op_wb)s;
695172Sgblack@eecs.umich.edu            }
705172Sgblack@eecs.umich.edu            return fault;
715172Sgblack@eecs.umich.edu        }
725449Sgblack@eecs.umich.edu}};
735449Sgblack@eecs.umich.edu
745449Sgblack@eecs.umich.edudef template MicroFpOpDeclare {{
755172Sgblack@eecs.umich.edu    class %(class_name)s : public %(base_class)s
764590Sgblack@eecs.umich.edu    {
774590Sgblack@eecs.umich.edu      protected:
785163Sgblack@eecs.umich.edu        void buildMe();
795163Sgblack@eecs.umich.edu
805163Sgblack@eecs.umich.edu      public:
815163Sgblack@eecs.umich.edu        %(class_name)s(ExtMachInst _machInst,
825163Sgblack@eecs.umich.edu                const char * instMnem, uint64_t setFlags,
837620Sgblack@eecs.umich.edu                InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
845163Sgblack@eecs.umich.edu                uint8_t _dataSize, int8_t _spm);
855163Sgblack@eecs.umich.edu
865163Sgblack@eecs.umich.edu        %(class_name)s(ExtMachInst _machInst,
875163Sgblack@eecs.umich.edu                const char * instMnem,
885163Sgblack@eecs.umich.edu                InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
895163Sgblack@eecs.umich.edu                uint8_t _dataSize, int8_t _spm);
905163Sgblack@eecs.umich.edu
914519Sgblack@eecs.umich.edu        %(BasicExecDeclare)s
924519Sgblack@eecs.umich.edu    };
935163Sgblack@eecs.umich.edu}};
945163Sgblack@eecs.umich.edu
955163Sgblack@eecs.umich.edudef template MicroFpOpConstructor {{
965163Sgblack@eecs.umich.edu
975163Sgblack@eecs.umich.edu    inline void %(class_name)s::buildMe()
985163Sgblack@eecs.umich.edu    {
995163Sgblack@eecs.umich.edu        %(constructor)s;
1005163Sgblack@eecs.umich.edu    }
1014519Sgblack@eecs.umich.edu
1024519Sgblack@eecs.umich.edu    inline %(class_name)s::%(class_name)s(
1034519Sgblack@eecs.umich.edu            ExtMachInst machInst, const char * instMnem,
1045172Sgblack@eecs.umich.edu            InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
1055172Sgblack@eecs.umich.edu            uint8_t _dataSize, int8_t _spm) :
1065172Sgblack@eecs.umich.edu        %(base_class)s(machInst, "%(mnemonic)s", instMnem, 0,
1075172Sgblack@eecs.umich.edu                _src1, _src2, _dest, _dataSize, _spm,
1085172Sgblack@eecs.umich.edu                %(op_class)s)
1095173Sgblack@eecs.umich.edu    {
1105172Sgblack@eecs.umich.edu        buildMe();
1115172Sgblack@eecs.umich.edu    }
1125172Sgblack@eecs.umich.edu
1135172Sgblack@eecs.umich.edu    inline %(class_name)s::%(class_name)s(
1144590Sgblack@eecs.umich.edu            ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
1155163Sgblack@eecs.umich.edu            InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
1165163Sgblack@eecs.umich.edu            uint8_t _dataSize, int8_t _spm) :
1177620Sgblack@eecs.umich.edu        %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
1187620Sgblack@eecs.umich.edu                _src1, _src2, _dest, _dataSize, _spm,
1195163Sgblack@eecs.umich.edu                %(op_class)s)
1204519Sgblack@eecs.umich.edu    {
1214519Sgblack@eecs.umich.edu        buildMe();
1224519Sgblack@eecs.umich.edu    }
1234519Sgblack@eecs.umich.edu}};
1245163Sgblack@eecs.umich.edu
1255163Sgblack@eecs.umich.edulet {{
1267620Sgblack@eecs.umich.edu    # Make these empty strings so that concatenating onto
1275163Sgblack@eecs.umich.edu    # them will always work.
1287620Sgblack@eecs.umich.edu    header_output = ""
1295163Sgblack@eecs.umich.edu    decoder_output = ""
1307626Sgblack@eecs.umich.edu    exec_output = ""
1315163Sgblack@eecs.umich.edu
1325163Sgblack@eecs.umich.edu    class FpOpMeta(type):
1335163Sgblack@eecs.umich.edu        def buildCppClasses(self, name, Name, suffix, \
1344696Sgblack@eecs.umich.edu                code, flag_code, cond_check, else_code):
1355163Sgblack@eecs.umich.edu
1364696Sgblack@eecs.umich.edu            # Globals to stick the output in
1374696Sgblack@eecs.umich.edu            global header_output
1384696Sgblack@eecs.umich.edu            global decoder_output
1394696Sgblack@eecs.umich.edu            global exec_output
1404696Sgblack@eecs.umich.edu
1414696Sgblack@eecs.umich.edu            # Stick all the code together so it can be searched at once
1424696Sgblack@eecs.umich.edu            allCode = "|".join((code, flag_code, cond_check, else_code))
1434696Sgblack@eecs.umich.edu
1444696Sgblack@eecs.umich.edu            # If there's something optional to do with flags, generate
1454696Sgblack@eecs.umich.edu            # a version without it and fix up this version to use it.
1464696Sgblack@eecs.umich.edu            if flag_code is not "" or cond_check is not "true":
1474696Sgblack@eecs.umich.edu                self.buildCppClasses(name, Name, suffix,
1485449Sgblack@eecs.umich.edu                        code, "", "true", else_code)
1495449Sgblack@eecs.umich.edu                suffix = "Flags" + suffix
1505449Sgblack@eecs.umich.edu
1515449Sgblack@eecs.umich.edu            base = "X86ISA::FpOp"
1525449Sgblack@eecs.umich.edu
1535449Sgblack@eecs.umich.edu            # Get everything ready for the substitution
1545449Sgblack@eecs.umich.edu            iop_top = InstObjParams(name, Name + suffix + "Top", base,
1555449Sgblack@eecs.umich.edu                    {"code" : code,
1565449Sgblack@eecs.umich.edu                     "flag_code" : flag_code,
1575449Sgblack@eecs.umich.edu                     "cond_check" : cond_check,
1584696Sgblack@eecs.umich.edu                     "else_code" : else_code,
1594696Sgblack@eecs.umich.edu                     "top_code" : "TOP = (TOP + spm + 8) % 8;"})
1604519Sgblack@eecs.umich.edu            iop = InstObjParams(name, Name + suffix, base,
1614590Sgblack@eecs.umich.edu                    {"code" : code,
1625163Sgblack@eecs.umich.edu                     "flag_code" : flag_code,
1635163Sgblack@eecs.umich.edu                     "cond_check" : cond_check,
1644590Sgblack@eecs.umich.edu                     "else_code" : else_code,
1655163Sgblack@eecs.umich.edu                     "top_code" : ";"})
1665163Sgblack@eecs.umich.edu
1675163Sgblack@eecs.umich.edu            # Generate the actual code (finally!)
1685163Sgblack@eecs.umich.edu            header_output += MicroFpOpDeclare.subst(iop_top)
1695163Sgblack@eecs.umich.edu            decoder_output += MicroFpOpConstructor.subst(iop_top)
1705163Sgblack@eecs.umich.edu            exec_output += MicroFpOpExecute.subst(iop_top)
1715163Sgblack@eecs.umich.edu            header_output += MicroFpOpDeclare.subst(iop)
1724590Sgblack@eecs.umich.edu            decoder_output += MicroFpOpConstructor.subst(iop)
1737620Sgblack@eecs.umich.edu            exec_output += MicroFpOpExecute.subst(iop)
1747620Sgblack@eecs.umich.edu
1755163Sgblack@eecs.umich.edu
1765163Sgblack@eecs.umich.edu        def __new__(mcls, Name, bases, dict):
1774590Sgblack@eecs.umich.edu            abstract = False
1785163Sgblack@eecs.umich.edu            name = Name.lower()
1795163Sgblack@eecs.umich.edu            if "abstract" in dict:
1804590Sgblack@eecs.umich.edu                abstract = dict['abstract']
1815163Sgblack@eecs.umich.edu                del dict['abstract']
1825293Sgblack@eecs.umich.edu
1835163Sgblack@eecs.umich.edu            cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict)
1845163Sgblack@eecs.umich.edu            if not abstract:
1855163Sgblack@eecs.umich.edu                cls.className = Name
1865163Sgblack@eecs.umich.edu                cls.mnemonic = name
1875163Sgblack@eecs.umich.edu                code = cls.code
1885293Sgblack@eecs.umich.edu                flag_code = cls.flag_code
1895163Sgblack@eecs.umich.edu                cond_check = cls.cond_check
1905163Sgblack@eecs.umich.edu                else_code = cls.else_code
1915163Sgblack@eecs.umich.edu
1925163Sgblack@eecs.umich.edu                # Set up the C++ classes
1935163Sgblack@eecs.umich.edu                mcls.buildCppClasses(cls, name, Name, "",
1944590Sgblack@eecs.umich.edu                        code, flag_code, cond_check, else_code)
1955172Sgblack@eecs.umich.edu
1965172Sgblack@eecs.umich.edu                # Hook into the microassembler dict
1976047Sgblack@eecs.umich.edu                global microopClasses
1985172Sgblack@eecs.umich.edu                microopClasses[name] = cls
1995172Sgblack@eecs.umich.edu
2005172Sgblack@eecs.umich.edu            return cls
2017620Sgblack@eecs.umich.edu
2027620Sgblack@eecs.umich.edu
2035172Sgblack@eecs.umich.edu    class FpOp(X86Microop):
2045172Sgblack@eecs.umich.edu        __metaclass__ = FpOpMeta
2055172Sgblack@eecs.umich.edu        # This class itself doesn't act as a microop
2064519Sgblack@eecs.umich.edu        abstract = True
2078610Snilay@cs.wisc.edu
2088610Snilay@cs.wisc.edu        # Default template parameter values
2098610Snilay@cs.wisc.edu        flag_code = ""
2108610Snilay@cs.wisc.edu        cond_check = "true"
2118610Snilay@cs.wisc.edu        else_code = ";"
2128610Snilay@cs.wisc.edu
2138610Snilay@cs.wisc.edu        def __init__(self, dest, src1, src2, spm=0, \
2148610Snilay@cs.wisc.edu                SetStatus=False, dataSize="env.dataSize"):
2158610Snilay@cs.wisc.edu            self.dest = dest
2168610Snilay@cs.wisc.edu            self.src1 = src1
2178610Snilay@cs.wisc.edu            self.src2 = src2
2188610Snilay@cs.wisc.edu            self.spm = spm
2198610Snilay@cs.wisc.edu            self.dataSize = dataSize
2208610Snilay@cs.wisc.edu            if SetStatus:
2218610Snilay@cs.wisc.edu                self.className += "Flags"
2228610Snilay@cs.wisc.edu            if spm:
2238610Snilay@cs.wisc.edu                self.className += "Top"
2248610Snilay@cs.wisc.edu
2258610Snilay@cs.wisc.edu        def getAllocator(self, microFlags):
2268610Snilay@cs.wisc.edu            return '''new %(class_name)s(machInst, macrocodeBlock,
2278610Snilay@cs.wisc.edu                    %(flags)s, %(src1)s, %(src2)s, %(dest)s,
2288610Snilay@cs.wisc.edu                    %(dataSize)s, %(spm)d)''' % {
2298610Snilay@cs.wisc.edu                "class_name" : self.className,
2308610Snilay@cs.wisc.edu                "flags" : self.microFlagsText(microFlags),
2318610Snilay@cs.wisc.edu                "src1" : self.src1, "src2" : self.src2,
2328610Snilay@cs.wisc.edu                "dest" : self.dest,
2338610Snilay@cs.wisc.edu                "dataSize" : self.dataSize,
2348610Snilay@cs.wisc.edu                "spm" : self.spm}
2358610Snilay@cs.wisc.edu
2368610Snilay@cs.wisc.edu    class Movfp(FpOp):
2378610Snilay@cs.wisc.edu        def __init__(self, dest, src1, spm=0, \
2388610Snilay@cs.wisc.edu                SetStatus=False, dataSize="env.dataSize"):
2398610Snilay@cs.wisc.edu            super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \
2408610Snilay@cs.wisc.edu                    spm, SetStatus, dataSize)
2418610Snilay@cs.wisc.edu        code = 'FpDestReg.uqw = FpSrcReg1.uqw;'
2428610Snilay@cs.wisc.edu        else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
2438610Snilay@cs.wisc.edu        cond_check = "checkCondition(ccFlagBits, src2)"
2448610Snilay@cs.wisc.edu
2458610Snilay@cs.wisc.edu    class Xorfp(FpOp):
2468610Snilay@cs.wisc.edu        code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;'
2478610Snilay@cs.wisc.edu
2488610Snilay@cs.wisc.edu    class Sqrtfp(FpOp):
2498610Snilay@cs.wisc.edu        code = 'FpDestReg = sqrt(FpSrcReg2);'
2508610Snilay@cs.wisc.edu
2518610Snilay@cs.wisc.edu    # Conversion microops
2528610Snilay@cs.wisc.edu    class ConvOp(FpOp):
2538610Snilay@cs.wisc.edu        abstract = True
2548610Snilay@cs.wisc.edu        def __init__(self, dest, src1):
2558610Snilay@cs.wisc.edu            super(ConvOp, self).__init__(dest, src1, \
2568610Snilay@cs.wisc.edu                    "InstRegIndex(FLOATREG_MICROFP0)")
2578610Snilay@cs.wisc.edu
2588610Snilay@cs.wisc.edu    # These probably shouldn't look at the ExtMachInst directly to figure
259    # out what size to use and should instead delegate that to the macroop's
260    # constructor. That would be more efficient, and it would make the
261    # microops a little more modular.
262    class cvtf_i2d(ConvOp):
263        code = '''
264            X86IntReg intReg = SSrcReg1;
265            if (REX_W)
266                FpDestReg = intReg.SR;
267            else
268                FpDestReg = intReg.SE;
269            '''
270
271    class cvtf_i2d_hi(ConvOp):
272        code = 'FpDestReg = bits(SSrcReg1, 63, 32);'
273
274    class cvtf_d2i(ConvOp):
275        code = '''
276            int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
277            if (REX_W)
278                SDestReg = intSrcReg1;
279            else
280                SDestReg = merge(SDestReg, intSrcReg1, 4);
281            '''
282
283    # These need to consider size at some point. They'll always use doubles
284    # for the moment.
285    class addfp(FpOp):
286        code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
287
288    class mulfp(FpOp):
289        code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
290
291    class divfp(FpOp):
292        code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
293
294    class subfp(FpOp):
295        code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
296
297    class Compfp(FpOp):
298        def __init__(self, src1, src2, spm=0, setStatus=False, \
299                dataSize="env.dataSize"):
300            super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
301                    src1, src2, spm, setStatus, dataSize)
302        # This class sets the condition codes in rflags according to the
303        # rules for comparing floating point.
304        code = '''
305            //               ZF PF CF
306            // Unordered      1  1  1
307            // Greater than   0  0  0
308            // Less than      0  0  1
309            // Equal          1  0  0
310            //           OF = SF = AF = 0
311            ccFlagBits = ccFlagBits & ~(OFBit | SFBit | AFBit |
312                                        ZFBit | PFBit | CFBit);
313            if (isnan(FpSrcReg1) || isnan(FpSrcReg2))
314                ccFlagBits = ccFlagBits | (ZFBit | PFBit | CFBit);
315            else if(FpSrcReg1 < FpSrcReg2)
316                ccFlagBits = ccFlagBits | CFBit;
317            else if(FpSrcReg1 == FpSrcReg2)
318                ccFlagBits = ccFlagBits | ZFBit;
319        '''
320}};
321