base.isa revision 4519
12501SN/A// -*- mode:c++ -*- 22501SN/A 32501SN/A// Copyright (c) 2007 The Hewlett-Packard Development Company 42501SN/A// All rights reserved. 52501SN/A// 62501SN/A// Redistribution and use of this software in source and binary forms, 72501SN/A// with or without modification, are permitted provided that the 82501SN/A// following conditions are met: 92501SN/A// 102501SN/A// The software must be used only for Non-Commercial Use which means any 112501SN/A// use which is NOT directed to receiving any direct monetary 122501SN/A// compensation for, or commercial advantage from such use. Illustrative 132501SN/A// examples of non-commercial use are academic research, personal study, 142501SN/A// teaching, education and corporate research & development. 152501SN/A// Illustrative examples of commercial use are distributing products for 162501SN/A// commercial advantage and providing services using the software for 172501SN/A// commercial advantage. 182501SN/A// 192501SN/A// If you wish to use this software or functionality therein that may be 202501SN/A// covered by patents for commercial use, please contact: 212501SN/A// Director of Intellectual Property Licensing 222501SN/A// Office of Strategy and Technology 232501SN/A// Hewlett-Packard Company 242501SN/A// 1501 Page Mill Road 252501SN/A// Palo Alto, California 94304 262501SN/A// 272665Ssaidi@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 282665Ssaidi@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 292501SN/A// in binary form must reproduce the above copyright notice, this list of 302501SN/A// conditions and the following disclaimer in the documentation and/or 312501SN/A// other materials provided with the distribution. Neither the name of 322501SN/A// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 332501SN/A// contributors may be used to endorse or promote products derived from 342501SN/A// this software without specific prior written permission. No right of 356335Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 363603Ssaidi@eecs.umich.edu// output created using the software may be prepared, but only for 378229Snate@binkert.org// Non-Commercial Uses. Derivatives of the software may be shared with 382501SN/A// others provided: (i) the others agree to abide by the list of 397720Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 403272Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 417878Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 428767Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 432501SN/A// 442501SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 452501SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 467720Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 477741Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 487741Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 497741Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 507741Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 517741Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 527741Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 537741Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 547741Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 557720Sgblack@eecs.umich.edu// 567741Sgblack@eecs.umich.edu// Authors: Gabe Black 574826Ssaidi@eecs.umich.edu 587741Sgblack@eecs.umich.edulet {{ 597741Sgblack@eecs.umich.edu # This will be populated with mappings between microop mnemonics and 607741Sgblack@eecs.umich.edu # the classes that represent them. 618829Sgblack@eecs.umich.edu microopClasses = {} 628829Sgblack@eecs.umich.edu}}; 638829Sgblack@eecs.umich.edu 647741Sgblack@eecs.umich.edu//A class which is the base of all x86 micro ops. It provides a function to 653577Sgblack@eecs.umich.edu//set necessary flags appropriately. 667741Sgblack@eecs.umich.eduoutput header {{ 677741Sgblack@eecs.umich.edu class X86MicroOpBase : public X86StaticInst 687741Sgblack@eecs.umich.edu { 697741Sgblack@eecs.umich.edu protected: 707741Sgblack@eecs.umich.edu const char * instMnem; 717741Sgblack@eecs.umich.edu uint8_t opSize; 722501SN/A uint8_t addrSize; 737741Sgblack@eecs.umich.edu 744194Ssaidi@eecs.umich.edu X86MicroOpBase(ExtMachInst _machInst, 757741Sgblack@eecs.umich.edu const char *mnem, const char *_instMnem, 767741Sgblack@eecs.umich.edu bool isMicro, bool isDelayed, 777741Sgblack@eecs.umich.edu bool isFirst, bool isLast, 787741Sgblack@eecs.umich.edu OpClass __opClass) : 798767Sgblack@eecs.umich.edu X86StaticInst(mnem, _machInst, __opClass), 8010407Smitch.hayenga@arm.com instMnem(_instMnem) 817741Sgblack@eecs.umich.edu { 823528Sgblack@eecs.umich.edu flags[IsMicroOp] = isMicro; 837741Sgblack@eecs.umich.edu flags[IsDelayedCommit] = isDelayed; 846329Sgblack@eecs.umich.edu flags[IsFirstMicroOp] = isFirst; 857741Sgblack@eecs.umich.edu flags[IsLastMicroOp] = isLast; 866329Sgblack@eecs.umich.edu } 877741Sgblack@eecs.umich.edu 887693SAli.Saidi@ARM.com std::string generateDisassembly(Addr pc, 897741Sgblack@eecs.umich.edu const SymbolTable *symtab) const 907741Sgblack@eecs.umich.edu { 917741Sgblack@eecs.umich.edu std::stringstream ss; 927741Sgblack@eecs.umich.edu 937741Sgblack@eecs.umich.edu ccprintf(ss, "\t%s.%s", instMnem, mnemonic); 947720Sgblack@eecs.umich.edu 958300Schander.sudanthi@arm.com return ss.str(); 968300Schander.sudanthi@arm.com } 978300Schander.sudanthi@arm.com }; 988300Schander.sudanthi@arm.com}}; 998300Schander.sudanthi@arm.com 1008300Schander.sudanthi@arm.com////////////////////////////////////////////////////////////////////////// 1012501SN/A// 1022501SN/A// Base class for the python representation of x86 microops 1032501SN/A 104let {{ 105 class X86Microop(object): 106 def __init__(self, name): 107 self.name = name 108 109 # This converts a list of python bools into 110 # a comma seperated list of C++ bools. 111 def microFlagsText(self, vals): 112 text = "" 113 for val in vals: 114 if val: 115 text += ", true" 116 else: 117 text += ", false" 118 return text 119 120 def getAllocator(self, mnemonic, *microFlags): 121 return 'new %s(machInst, %s)' % (self.className, mnemonic, self.microFlagsText(microFlags)) 122}}; 123 124////////////////////////////////////////////////////////////////////////// 125// 126// LdStOp Microop templates 127// 128////////////////////////////////////////////////////////////////////////// 129 130def template MicroLdStOpDeclare {{ 131 class %(class_name)s : public X86MicroOpBase 132 { 133 protected: 134 const uint8_t scale; 135 const RegIndex index; 136 const RegIndex base; 137 const uint64_t disp; 138 const uint8_t segment; 139 const RegIndex data; 140 const uint8_t dataSize; 141 const uint8_t addressSize; 142 void buildMe(); 143 144 public: 145 %(class_name)s(ExtMachInst _machInst, 146 const char * instMnem, 147 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 148 uint8_t _scale, RegIndex _index, RegIndex _base, 149 uint64_t _disp, uint8_t _segment, 150 RegIndex _data, 151 uint8_t _dataSize, uint8_t _addressSize); 152 153 %(class_name)s(ExtMachInst _machInst, 154 const char * instMnem, 155 uint8_t _scale, RegIndex _index, RegIndex _base, 156 uint64_t _disp, uint8_t _segment, 157 RegIndex _data, 158 uint8_t _dataSize, uint8_t _addressSize); 159 160 %(BasicExecDeclare)s 161 }; 162}}; 163 164def template MicroLdStOpConstructor {{ 165 166 inline void %(class_name)s::buildMe() 167 { 168 %(constructor)s; 169 } 170 171 inline %(class_name)s::%(class_name)s( 172 ExtMachInst machInst, const char * instMnem, 173 uint8_t _scale, RegIndex _index, RegIndex _base, 174 uint64_t _disp, uint8_t _segment, 175 RegIndex _data, 176 uint8_t _dataSize, uint8_t _addressSize) : 177 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 178 false, false, false, false, %(op_class)s), 179 scale(_scale), index(_index), base(_base), 180 disp(_disp), segment(_segment), 181 data(_data), 182 dataSize(_dataSize), addressSize(_addressSize) 183 { 184 buildMe(); 185 } 186 187 inline %(class_name)s::%(class_name)s( 188 ExtMachInst machInst, const char * instMnem, 189 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 190 uint8_t _scale, RegIndex _index, RegIndex _base, 191 uint64_t _disp, uint8_t segment, 192 RegIndex data, 193 uint8_t dataSize, uint8_t addressSize) : 194 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 195 isMicro, isDelayed, isFirst, isLast, %(op_class)s), 196 scale(_scale), index(_index), base(_base), 197 disp(_disp), segment(_segment), 198 data(_data), 199 dataSize(_dataSize), addressSize(_addressSize) 200 { 201 buildMe(); 202 } 203}}; 204 205////////////////////////////////////////////////////////////////////////// 206// 207// LIMMOp Microop templates 208// 209////////////////////////////////////////////////////////////////////////// 210 211def template MicroLIMMOpDeclare {{ 212 class %(class_name)s : public X86MicroOpBase 213 { 214 protected: 215 const RegIndex dest; 216 const uint64_t imm; 217 void buildMe(); 218 219 public: 220 %(class_name)s(ExtMachInst _machInst, 221 const char * instMnem, 222 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 223 RegIndex _dest, uint64_t _imm); 224 225 %(class_name)s(ExtMachInst _machInst, 226 const char * instMnem, 227 RegIndex _dest, uint64_t _imm); 228 229 %(BasicExecDeclare)s 230 }; 231}}; 232 233def template MicroLIMMOpConstructor {{ 234 235 inline void %(class_name)s::buildMe() 236 { 237 %(constructor)s; 238 } 239 240 inline %(class_name)s::%(class_name)s( 241 ExtMachInst machInst, const char * instMnem, 242 RegIndex _dest, uint64_t _imm) : 243 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 244 false, false, false, false, %(op_class)s), 245 dest(_dest), imm(_imm) 246 { 247 buildMe(); 248 } 249 250 inline %(class_name)s::%(class_name)s( 251 ExtMachInst machInst, const char * instMnem, 252 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 253 RegIndex _dest, uint64_t _imm) : 254 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 255 isMicro, isDelayed, isFirst, isLast, %(op_class)s), 256 dest(_dest), imm(_imm) 257 { 258 buildMe(); 259 } 260}}; 261 262////////////////////////////////////////////////////////////////////////// 263// 264// FpOp Microop templates 265// 266////////////////////////////////////////////////////////////////////////// 267 268//TODO Actually write an fp microop base class. 269