bit_test.py revision 5306:79cedb731af5
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Derivatives of the software may be shared with 36# others provided: (i) the others agree to abide by the list of 37# conditions herein which includes the Non-Commercial Use restrictions; 38# and (ii) such Derivatives of the software include the above copyright 39# notice to acknowledge the contribution from this software where 40# applicable, this list of conditions and the disclaimer below. 41# 42# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 43# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 44# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 45# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 46# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 47# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 48# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 49# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 50# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 51# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53# 54# Authors: Gabe Black 55 56microcode = ''' 57def macroop BT_R_I { 58 sexti t0, reg, imm, flags=(CF,) 59}; 60 61def macroop BT_M_I { 62 limm t1, imm, dataSize=asz 63 # This fudges just a tiny bit, but it's reasonable to expect the 64 # microcode generation logic to have the log of the various sizes 65 # floating around as well. 66 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 67 dataSize=asz 68 add t2, t2, base, dataSize=asz 69 ld t1, seg, [scale, index, t2], disp 70 sexti t0, t1, imm, flags=(CF,) 71}; 72 73def macroop BT_P_I { 74 rdip t7 75 limm t1, imm, dataSize=asz 76 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 77 dataSize=asz 78 ld t1, seg, [1, t2, t7] 79 sexti t0, t1, imm, flags=(CF,) 80}; 81 82def macroop BT_R_R { 83 sext t0, reg, regm, flags=(CF,) 84}; 85 86def macroop BT_M_R { 87 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 88 dataSize=asz 89 add t2, t2, base, dataSize=asz 90 ld t1, seg, [scale, index, t2], disp 91 sext t0, t1, reg, flags=(CF,) 92}; 93 94def macroop BT_P_R { 95 rdip t7 96 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 97 dataSize=asz 98 ld t1, seg, [1, t2, t7] 99 sext t0, t1, reg, flags=(CF,) 100}; 101 102def macroop BTC_R_I { 103 sexti t0, reg, imm, flags=(CF,) 104 limm t1, 1 105 roli t1, t1, imm 106 xor reg, reg, t1 107}; 108 109def macroop BTC_M_I { 110 limm t1, imm, dataSize=asz 111 # This fudges just a tiny bit, but it's reasonable to expect the 112 # microcode generation logic to have the log of the various sizes 113 # floating around as well. 114 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 115 dataSize=asz 116 add t2, t2, base, dataSize=asz 117 limm t3, 1 118 roli t3, t3, imm 119 ldst t1, seg, [scale, index, t2], disp 120 sexti t0, t1, imm, flags=(CF,) 121 xor t1, t1, t3 122 st t1, seg, [scale, index, t2], disp 123}; 124 125def macroop BTC_P_I { 126 rdip t7, dataSize=asz 127 limm t1, imm, dataSize=asz 128 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 129 dataSize=asz 130 limm t3, 1 131 roli t3, t3, imm 132 ldst t1, seg, [1, t2, t7] 133 sexti t0, t1, imm, flags=(CF,) 134 xor t1, t1, t3 135 st t1, seg, [1, t2, t7], disp 136}; 137 138def macroop BTC_R_R { 139 sext t0, reg, regm, flags=(CF,) 140 limm t1, 1 141 rol t1, t1, regm 142 xor reg, reg, t1 143}; 144 145def macroop BTC_M_R { 146 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 147 dataSize=asz 148 add t2, t2, base, dataSize=asz 149 limm t3, 1 150 rol t3, t3, reg 151 ldst t1, seg, [scale, index, t2], disp 152 sext t0, t1, reg, flags=(CF,) 153 xor t1, t1, t3 154 st t1, seg, [scale, index, t2], disp 155}; 156 157def macroop BTC_P_R { 158 rdip t7, dataSize=asz 159 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 160 dataSize=asz 161 limm t3, 1 162 rol t3, t3, reg 163 ldst t1, seg, [1, t2, t7] 164 sext t0, t1, reg, flags=(CF,) 165 xor t1, t1, t3 166 st t1, seg, [1, t2, t7], disp 167}; 168 169def macroop BTR_R_I { 170 sexti t0, reg, imm, flags=(CF,) 171 limm t1, "(uint64_t(-(2ULL)))" 172 roli t1, t1, imm 173 and reg, reg, t1 174}; 175 176def macroop BTR_M_I { 177 limm t1, imm, dataSize=asz 178 # This fudges just a tiny bit, but it's reasonable to expect the 179 # microcode generation logic to have the log of the various sizes 180 # floating around as well. 181 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 182 dataSize=asz 183 add t2, t2, base, dataSize=asz 184 limm t3, "(uint64_t(-(2ULL)))" 185 roli t3, t3, imm 186 ldst t1, seg, [scale, index, t2], disp 187 sexti t0, t1, imm, flags=(CF,) 188 and t1, t1, t3 189 st t1, seg, [scale, index, t2], disp 190}; 191 192def macroop BTR_P_I { 193 rdip t7, dataSize=asz 194 limm t1, imm, dataSize=asz 195 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 196 dataSize=asz 197 limm t3, "(uint64_t(-(2ULL)))" 198 roli t3, t3, imm 199 ldst t1, seg, [1, t2, t7] 200 sexti t0, t1, imm, flags=(CF,) 201 and t1, t1, t3 202 st t1, seg, [1, t2, t7], disp 203}; 204 205def macroop BTR_R_R { 206 sext t0, reg, regm, flags=(CF,) 207 limm t1, "(uint64_t(-(2ULL)))" 208 rol t1, t1, regm 209 and reg, reg, t1 210}; 211 212def macroop BTR_M_R { 213 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 214 dataSize=asz 215 add t2, t2, base, dataSize=asz 216 limm t3, "(uint64_t(-(2ULL)))" 217 rol t3, t3, reg 218 ldst t1, seg, [scale, index, t2], disp 219 sext t0, t1, reg, flags=(CF,) 220 and t1, t1, t3 221 st t1, seg, [scale, index, t2], disp 222}; 223 224def macroop BTR_P_R { 225 rdip t7, dataSize=asz 226 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 227 dataSize=asz 228 limm t3, "(uint64_t(-(2ULL)))" 229 rol t3, t3, reg 230 ldst t1, seg, [1, t2, t7] 231 sext t0, t1, reg, flags=(CF,) 232 and t1, t1, t3 233 st t1, seg, [1, t2, t7], disp 234}; 235 236def macroop BTS_R_I { 237 sexti t0, reg, imm, flags=(CF,) 238 limm t1, 1 239 roli t1, t1, imm 240 or reg, reg, t1 241}; 242 243def macroop BTS_M_I { 244 limm t1, imm, dataSize=asz 245 # This fudges just a tiny bit, but it's reasonable to expect the 246 # microcode generation logic to have the log of the various sizes 247 # floating around as well. 248 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 249 dataSize=asz 250 add t2, t2, base, dataSize=asz 251 limm t3, 1 252 roli t3, t3, imm 253 ldst t1, seg, [scale, index, t2], disp 254 sexti t0, t1, imm, flags=(CF,) 255 or t1, t1, t3 256 st t1, seg, [scale, index, t2], disp 257}; 258 259def macroop BTS_P_I { 260 rdip t7, dataSize=asz 261 limm t1, imm, dataSize=asz 262 srai t2, t1, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 263 dataSize=asz 264 limm t3, 1 265 roli t3, t3, imm 266 ldst t1, seg, [1, t2, t7] 267 sexti t0, t1, imm, flags=(CF,) 268 or t1, t1, t3 269 st t1, seg, [1, t2, t7], disp 270}; 271 272def macroop BTS_R_R { 273 sext t0, reg, regm, flags=(CF,) 274 limm t1, 1 275 rol t1, t1, regm 276 or reg, reg, t1 277}; 278 279def macroop BTS_M_R { 280 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 281 dataSize=asz 282 add t2, t2, base, dataSize=asz 283 limm t3, 1 284 rol t3, t3, reg 285 ldst t1, seg, [scale, index, t2], disp 286 sext t0, t1, reg, flags=(CF,) 287 or t1, t1, t3 288 st t1, seg, [scale, index, t2], disp 289}; 290 291def macroop BTS_P_R { 292 rdip t7, dataSize=asz 293 srai t2, reg, "(env.dataSize == 8) ? 3 : ((env.dataSize == 4) ? 2 : 1)", \ 294 dataSize=asz 295 limm t3, 1 296 rol t3, t3, reg 297 ldst t1, seg, [1, t2, t7] 298 sext t0, t1, reg, flags=(CF,) 299 or t1, t1, t3 300 st t1, seg, [1, t2, t7], disp 301}; 302''' 303