includes.isa revision 8229:78bf55f23338
12SN/A// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
21762SN/A// All rights reserved.
32SN/A//
42SN/A// The license below extends only to copyright in the software and shall
52SN/A// not be construed as granting a license to any other intellectual
62SN/A// property including but not limited to intellectual property relating
72SN/A// to a hardware implementation of the functionality of the software
82SN/A// licensed hereunder.  You may use the software subject to the license
92SN/A// terms below provided that you ensure that this notice is replicated
102SN/A// unmodified and in its entirety in all distributions of the software,
112SN/A// modified or unmodified, in source code or in binary form.
122SN/A//
132SN/A// Copyright (c) 2007 The Regents of The University of Michigan
142SN/A// All rights reserved.
152SN/A//
162SN/A// Redistribution and use in source and binary forms, with or without
172SN/A// modification, are permitted provided that the following conditions are
182SN/A// met: redistributions of source code must retain the above copyright
192SN/A// notice, this list of conditions and the following disclaimer;
202SN/A// redistributions in binary form must reproduce the above copyright
212SN/A// notice, this list of conditions and the following disclaimer in the
222SN/A// documentation and/or other materials provided with the distribution;
232SN/A// neither the name of the copyright holders nor the names of its
242SN/A// contributors may be used to endorse or promote products derived from
252SN/A// this software without specific prior written permission.
262SN/A//
272665Ssaidi@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
282665Ssaidi@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
292665Ssaidi@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
302SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
312SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
322SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
332SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
342SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
352SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
362SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
372SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3811168Sandreas.hansson@arm.com//
392SN/A// Authors: Gabe Black
402SN/A
41229SN/A////////////////////////////////////////////////////////////////////
42229SN/A//
43229SN/A// Output include file directives. Also import the python modules we
44229SN/A// need for all the x86 custom decoder stuff
45229SN/A//
46160SN/A
47160SN/Alet {{
48160SN/A    import copy
49160SN/A}};
50160SN/A
51160SN/Aoutput header {{
52160SN/A#include <cstring>
53160SN/A#include <iostream>
542SN/A#include <sstream>
552SN/A
562SN/A#include "arch/generic/debugfaults.hh"
57160SN/A#include "arch/x86/insts/macroop.hh"
58160SN/A#include "arch/x86/insts/microfpop.hh"
59160SN/A#include "arch/x86/insts/microldstop.hh"
60160SN/A#include "arch/x86/insts/micromediaop.hh"
612SN/A#include "arch/x86/insts/microregop.hh"
622SN/A#include "arch/x86/insts/static_inst.hh"
635543Ssaidi@eecs.umich.edu#include "arch/x86/emulenv.hh"
645543Ssaidi@eecs.umich.edu#include "arch/x86/isa_traits.hh"
652SN/A#include "arch/x86/registers.hh"
662SN/A#include "arch/x86/types.hh"
67160SN/A#include "base/misc.hh"
682SN/A#include "cpu/static_inst.hh"
692SN/A#include "mem/packet.hh"
702SN/A#include "sim/faults.hh"
712SN/A
722SN/Ausing X86ISA::InstRegIndex;
73160SN/A}};
742SN/A
752SN/Aoutput decoder {{
76160SN/A#include "arch/x86/regs/float.hh"
772SN/A#include "arch/x86/regs/misc.hh"
782SN/A#include "arch/x86/regs/segment.hh"
79160SN/A#include "arch/x86/faults.hh"
802SN/A#include "arch/x86/microcode_rom.hh"
81160SN/A#include "arch/x86/tlb.hh"
82160SN/A#include "base/loader/symtab.hh"
83160SN/A#include "base/cprintf.hh"
84160SN/A#include "base/misc.hh"
85160SN/A#include "cpu/thread_context.hh"  // for Jump::branchTarget()
86160SN/A#include "mem/packet.hh"
87160SN/A
882SN/A#if defined(linux) || defined(__APPLE__)
892SN/A#include <fenv.h>
90160SN/A#endif
91160SN/A#include <algorithm>
92160SN/A
932SN/Ausing namespace X86ISA;
942SN/A}};
95160SN/A
9611168Sandreas.hansson@arm.comoutput exec {{
972SN/A#if defined(linux) || defined(__APPLE__)
985543Ssaidi@eecs.umich.edu#include <fenv.h>
995543Ssaidi@eecs.umich.edu#endif
1002SN/A
1012SN/A#if defined(__sun) || defined (__OpenBSD__)
102160SN/A#include <ieeefp.h>
1032SN/A#endif
1042SN/A
1052SN/A#if FULL_SYSTEM
1062SN/A#include "sim/pseudo_inst.hh"
1072SN/A#endif
108160SN/A
1092SN/A#include <cmath>
1102SN/A#include <limits>
111160SN/A
112160SN/A#include "arch/x86/regs/misc.hh"
113160SN/A#include "arch/x86/cpuid.hh"
114160SN/A#include "arch/x86/faults.hh"
115160SN/A#include "arch/x86/tlb.hh"
116160SN/A#include "base/bigint.hh"
117160SN/A#include "base/compiler.hh"
118160SN/A#include "base/condcodes.hh"
119160SN/A#include "cpu/base.hh"
120160SN/A#include "cpu/exetrace.hh"
121160SN/A#include "mem/packet.hh"
122160SN/A#include "mem/packet_access.hh"
123160SN/A#include "mem/request.hh"
124160SN/A#include "sim/pseudo_inst.hh"
125160SN/A#include "sim/sim_exit.hh"
126160SN/A
1272SN/Ausing namespace X86ISA;
1282SN/Ausing namespace std;
129160SN/A}};
130160SN/A
131160SN/A