includes.isa revision 7087:fb8d5786ff30
19243SN/A// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
210206Sandreas.hansson@arm.com// All rights reserved.
39243SN/A//
49243SN/A// The license below extends only to copyright in the software and shall
59243SN/A// not be construed as granting a license to any other intellectual
69243SN/A// property including but not limited to intellectual property relating
79243SN/A// to a hardware implementation of the functionality of the software
89243SN/A// licensed hereunder.  You may use the software subject to the license
99243SN/A// terms below provided that you ensure that this notice is replicated
109243SN/A// unmodified and in its entirety in all distributions of the software,
119243SN/A// modified or unmodified, in source code or in binary form.
129243SN/A//
139243SN/A// Copyright (c) 2007 The Regents of The University of Michigan
149831SN/A// All rights reserved.
159831SN/A//
169831SN/A// Redistribution and use in source and binary forms, with or without
179243SN/A// modification, are permitted provided that the following conditions are
189243SN/A// met: redistributions of source code must retain the above copyright
199243SN/A// notice, this list of conditions and the following disclaimer;
209243SN/A// redistributions in binary form must reproduce the above copyright
219243SN/A// notice, this list of conditions and the following disclaimer in the
229243SN/A// documentation and/or other materials provided with the distribution;
239243SN/A// neither the name of the copyright holders nor the names of its
249243SN/A// contributors may be used to endorse or promote products derived from
259243SN/A// this software without specific prior written permission.
269243SN/A//
279243SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
289243SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
299243SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
309243SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
319243SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
329243SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
339243SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
349243SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
359243SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
369243SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
379243SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
389243SN/A//
399243SN/A// Authors: Gabe Black
409243SN/A
419243SN/A////////////////////////////////////////////////////////////////////
429967SN/A//
439243SN/A// Output include file directives. Also import the python modules we
449243SN/A// need for all the x86 custom decoder stuff
4510146Sandreas.hansson@arm.com//
469356SN/A
4710146Sandreas.hansson@arm.comlet {{
4810208Sandreas.hansson@arm.com    import copy
499352SN/A}};
5010146Sandreas.hansson@arm.com
519814SN/Aoutput header {{
529243SN/A#include <cstring>
539243SN/A#include <sstream>
549243SN/A#include <iostream>
5510146Sandreas.hansson@arm.com
569243SN/A#include "arch/x86/emulenv.hh"
579243SN/A#include "arch/x86/insts/macroop.hh"
589243SN/A#include "arch/x86/insts/microfpop.hh"
5910211Sandreas.hansson@arm.com#include "arch/x86/insts/microldstop.hh"
6010208Sandreas.hansson@arm.com#include "arch/x86/insts/micromediaop.hh"
6110208Sandreas.hansson@arm.com#include "arch/x86/insts/microregop.hh"
6210208Sandreas.hansson@arm.com#include "arch/x86/insts/static_inst.hh"
639831SN/A#include "arch/x86/isa_traits.hh"
649831SN/A#include "arch/x86/registers.hh"
659831SN/A#include "arch/x86/types.hh"
669831SN/A#include "base/misc.hh"
679831SN/A#include "cpu/static_inst.hh"
6810140SN/A#include "mem/packet.hh"
699243SN/A#include "sim/faults.hh"
709566SN/A
719243SN/Ausing X86ISA::InstRegIndex;
729243SN/A}};
7310140SN/A
7410140SN/Aoutput decoder {{
7510147Sandreas.hansson@arm.com#include "arch/x86/faults.hh"
7610147Sandreas.hansson@arm.com#include "arch/x86/floatregs.hh"
7710206Sandreas.hansson@arm.com#include "arch/x86/microcode_rom.hh"
7810210Sandreas.hansson@arm.com#include "arch/x86/miscregs.hh"
7910212Sandreas.hansson@arm.com#include "arch/x86/segmentregs.hh"
809488SN/A#include "arch/x86/tlb.hh"
819243SN/A#include "base/cprintf.hh"
829243SN/A#include "base/loader/symtab.hh"
8310141SN/A#include "base/misc.hh"
849726SN/A#include "cpu/thread_context.hh"  // for Jump::branchTarget()
859726SN/A#include "mem/packet.hh"
8610208Sandreas.hansson@arm.com
8710208Sandreas.hansson@arm.com#if defined(linux) || defined(__APPLE__)
8810208Sandreas.hansson@arm.com#include <fenv.h>
899243SN/A#endif
909243SN/A#include <algorithm>
919243SN/A
929243SN/Ausing namespace X86ISA;
939969SN/A}};
949243SN/A
959243SN/Aoutput exec {{
969969SN/A#if defined(linux) || defined(__APPLE__)
979243SN/A#include <fenv.h>
989243SN/A#endif
9910140SN/A
10010140SN/A#if defined(__sun) || defined (__OpenBSD__)
10110140SN/A#include <ieeefp.h>
10210140SN/A#endif
10310140SN/A
1049243SN/A#if FULL_SYSTEM
1059243SN/A#include "sim/pseudo_inst.hh"
1069567SN/A#endif
1079243SN/A
1089243SN/A#include <limits>
1099243SN/A
1109831SN/A#include <cmath>
1119831SN/A#include "arch/x86/cpuid.hh"
1129831SN/A#include "arch/x86/faults.hh"
1139831SN/A#include "arch/x86/miscregs.hh"
1149831SN/A#include "arch/x86/tlb.hh"
1159243SN/A#include "base/bigint.hh"
1169566SN/A#include "base/condcodes.hh"
1179566SN/A#include "cpu/base.hh"
11810143SN/A#include "cpu/exetrace.hh"
1199566SN/A#include "sim/sim_exit.hh"
1209566SN/A#include "mem/packet.hh"
12110136SN/A#include "mem/packet_access.hh"
1229831SN/A#include "mem/request.hh"
12310143SN/A#include "sim/pseudo_inst.hh"
12410136SN/A
1259566SN/Ausing namespace X86ISA;
12610136SN/Ausing namespace std;
12710136SN/A}};
12810143SN/A
12910136SN/A