nop.isa revision 4806
113481Sgiacomo.travaglini@arm.com// -*- mode:c++ -*- 213481Sgiacomo.travaglini@arm.com 313481Sgiacomo.travaglini@arm.com// Copyright (c) 2007 The Hewlett-Packard Development Company 413481Sgiacomo.travaglini@arm.com// All rights reserved. 513481Sgiacomo.travaglini@arm.com// 613481Sgiacomo.travaglini@arm.com// Redistribution and use of this software in source and binary forms, 713481Sgiacomo.travaglini@arm.com// with or without modification, are permitted provided that the 813481Sgiacomo.travaglini@arm.com// following conditions are met: 913481Sgiacomo.travaglini@arm.com// 1013481Sgiacomo.travaglini@arm.com// The software must be used only for Non-Commercial Use which means any 1113481Sgiacomo.travaglini@arm.com// use which is NOT directed to receiving any direct monetary 1213481Sgiacomo.travaglini@arm.com// compensation for, or commercial advantage from such use. Illustrative 1313481Sgiacomo.travaglini@arm.com// examples of non-commercial use are academic research, personal study, 1413481Sgiacomo.travaglini@arm.com// teaching, education and corporate research & development. 1513481Sgiacomo.travaglini@arm.com// Illustrative examples of commercial use are distributing products for 1613481Sgiacomo.travaglini@arm.com// commercial advantage and providing services using the software for 1713481Sgiacomo.travaglini@arm.com// commercial advantage. 1813481Sgiacomo.travaglini@arm.com// 1913481Sgiacomo.travaglini@arm.com// If you wish to use this software or functionality therein that may be 2013481Sgiacomo.travaglini@arm.com// covered by patents for commercial use, please contact: 2113481Sgiacomo.travaglini@arm.com// Director of Intellectual Property Licensing 2213481Sgiacomo.travaglini@arm.com// Office of Strategy and Technology 2313481Sgiacomo.travaglini@arm.com// Hewlett-Packard Company 2413481Sgiacomo.travaglini@arm.com// 1501 Page Mill Road 2513481Sgiacomo.travaglini@arm.com// Palo Alto, California 94304 2613481Sgiacomo.travaglini@arm.com// 2713481Sgiacomo.travaglini@arm.com// Redistributions of source code must retain the above copyright notice, 2813481Sgiacomo.travaglini@arm.com// this list of conditions and the following disclaimer. Redistributions 2913481Sgiacomo.travaglini@arm.com// in binary form must reproduce the above copyright notice, this list of 3013481Sgiacomo.travaglini@arm.com// conditions and the following disclaimer in the documentation and/or 3113481Sgiacomo.travaglini@arm.com// other materials provided with the distribution. Neither the name of 3213481Sgiacomo.travaglini@arm.com// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 3313481Sgiacomo.travaglini@arm.com// contributors may be used to endorse or promote products derived from 3413481Sgiacomo.travaglini@arm.com// this software without specific prior written permission. No right of 3513481Sgiacomo.travaglini@arm.com// sublicense is granted herewith. Derivatives of the software and 3613481Sgiacomo.travaglini@arm.com// output created using the software may be prepared, but only for 3713481Sgiacomo.travaglini@arm.com// Non-Commercial Uses. Derivatives of the software may be shared with 3813481Sgiacomo.travaglini@arm.com// others provided: (i) the others agree to abide by the list of 3913481Sgiacomo.travaglini@arm.com// conditions herein which includes the Non-Commercial Use restrictions; 4013481Sgiacomo.travaglini@arm.com// and (ii) such Derivatives of the software include the above copyright 4113481Sgiacomo.travaglini@arm.com// notice to acknowledge the contribution from this software where 4213481Sgiacomo.travaglini@arm.com// applicable, this list of conditions and the disclaimer below. 4313481Sgiacomo.travaglini@arm.com// 4413481Sgiacomo.travaglini@arm.com// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 4513481Sgiacomo.travaglini@arm.com// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 4613481Sgiacomo.travaglini@arm.com// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 4713481Sgiacomo.travaglini@arm.com// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 4813481Sgiacomo.travaglini@arm.com// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 4913481Sgiacomo.travaglini@arm.com// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 5013481Sgiacomo.travaglini@arm.com// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 5113481Sgiacomo.travaglini@arm.com// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 5213481Sgiacomo.travaglini@arm.com// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 5313481Sgiacomo.travaglini@arm.com// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5413481Sgiacomo.travaglini@arm.com// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 5513481Sgiacomo.travaglini@arm.com// 5613481Sgiacomo.travaglini@arm.com// Authors: Gabe Black 5713481Sgiacomo.travaglini@arm.com 5813481Sgiacomo.travaglini@arm.com//////////////////////////////////////////////////////////////////// 5913481Sgiacomo.travaglini@arm.com// 6013481Sgiacomo.travaglini@arm.com// "Format" which describes an instruction whose only purpose is to 6113481Sgiacomo.travaglini@arm.com// call a syscall in SE mode. 6213481Sgiacomo.travaglini@arm.com// 6313481Sgiacomo.travaglini@arm.com 6413481Sgiacomo.travaglini@arm.comoutput header {{ 6513481Sgiacomo.travaglini@arm.com class SyscallInst : public X86ISA::X86StaticInst 6613481Sgiacomo.travaglini@arm.com { 6713481Sgiacomo.travaglini@arm.com public: 6813481Sgiacomo.travaglini@arm.com static const RegIndex foldOBit = 0; 6913481Sgiacomo.travaglini@arm.com /// Constructor 7013481Sgiacomo.travaglini@arm.com SyscallInst(const char *_mnemonic, ExtMachInst _machInst, 7113481Sgiacomo.travaglini@arm.com OpClass __opClass) : 7213481Sgiacomo.travaglini@arm.com X86ISA::X86StaticInst(_mnemonic, _machInst, __opClass) 7313481Sgiacomo.travaglini@arm.com { 7413481Sgiacomo.travaglini@arm.com } 7513481Sgiacomo.travaglini@arm.com 7613481Sgiacomo.travaglini@arm.com std::string generateDisassembly(Addr pc, 7713481Sgiacomo.travaglini@arm.com const SymbolTable *symtab) const; 7813481Sgiacomo.travaglini@arm.com }; 7913481Sgiacomo.travaglini@arm.com}}; 8013481Sgiacomo.travaglini@arm.com 8113481Sgiacomo.travaglini@arm.comoutput decoder {{ 8213481Sgiacomo.travaglini@arm.com std::string SyscallInst::generateDisassembly(Addr PC, 8313481Sgiacomo.travaglini@arm.com const SymbolTable *symtab) const 8413481Sgiacomo.travaglini@arm.com { 8513481Sgiacomo.travaglini@arm.com std::stringstream response; 8613481Sgiacomo.travaglini@arm.com 8713481Sgiacomo.travaglini@arm.com printMnemonic(response, mnemonic); 8813481Sgiacomo.travaglini@arm.com ccprintf(response, " "); 8913481Sgiacomo.travaglini@arm.com printReg(response, _srcRegIdx[0], machInst.opSize); 9013481Sgiacomo.travaglini@arm.com return response.str(); 9113481Sgiacomo.travaglini@arm.com } 9213481Sgiacomo.travaglini@arm.com}}; 9313481Sgiacomo.travaglini@arm.com 9413481Sgiacomo.travaglini@arm.comdef template SyscallExecute {{ 9513481Sgiacomo.travaglini@arm.com Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 9613481Sgiacomo.travaglini@arm.com Trace::InstRecord *traceData) const 9713481Sgiacomo.travaglini@arm.com { 9813481Sgiacomo.travaglini@arm.com Fault fault = NoFault; 9913481Sgiacomo.travaglini@arm.com %(op_decl)s; 10013481Sgiacomo.travaglini@arm.com %(op_rd)s; 10113481Sgiacomo.travaglini@arm.com %(code)s; 10213481Sgiacomo.travaglini@arm.com return fault; 10313481Sgiacomo.travaglini@arm.com } 10413481Sgiacomo.travaglini@arm.com}}; 10513481Sgiacomo.travaglini@arm.com 10613481Sgiacomo.travaglini@arm.comdef format SyscallInst(code, *opt_flags) {{ 10713481Sgiacomo.travaglini@arm.com iop = InstObjParams(name, Name, 'SyscallInst', code, opt_flags) 10813481Sgiacomo.travaglini@arm.com header_output = BasicDeclare.subst(iop) 10913481Sgiacomo.travaglini@arm.com decoder_output = BasicConstructor.subst(iop) 11013481Sgiacomo.travaglini@arm.com decode_block = BasicDecode.subst(iop) 11113481Sgiacomo.travaglini@arm.com exec_output = SyscallExecute.subst(iop) 11213481Sgiacomo.travaglini@arm.com}}; 11313481Sgiacomo.travaglini@arm.com 11413481Sgiacomo.travaglini@arm.com