one_byte_opcodes.isa revision 7718:6333e66ce74b
1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license 9// terms below provided that you ensure that this notice is replicated 10// unmodified and in its entirety in all distributions of the software, 11// modified or unmodified, in source code or in binary form. 12// 13// Redistribution and use in source and binary forms, with or without 14// modification, are permitted provided that the following conditions are 15// met: redistributions of source code must retain the above copyright 16// notice, this list of conditions and the following disclaimer; 17// redistributions in binary form must reproduce the above copyright 18// notice, this list of conditions and the following disclaimer in the 19// documentation and/or other materials provided with the distribution; 20// neither the name of the copyright holders nor the names of its 21// contributors may be used to endorse or promote products derived from 22// this software without specific prior written permission. 23// 24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35// 36// Authors: Gabe Black 37 38//////////////////////////////////////////////////////////////////// 39// 40// Decode the one byte opcodes 41// 42 430x1: decode OPCODE_OP_TOP5 { 44 format Inst { 45 0x00: decode OPCODE_OP_BOTTOM3 { 46 0x6: decode MODE_SUBMODE { 47 0x0: UD2(); 48 default: WarnUnimpl::push_ES(); 49 } 50 0x7: decode MODE_SUBMODE { 51 0x0: UD2(); 52 default: WarnUnimpl::pop_ES(); 53 } 54 default: MultiInst::ADD(OPCODE_OP_BOTTOM3, 55 [Eb,Gb], [Ev,Gv], 56 [Gb,Eb], [Gv,Ev], 57 [rAb,Ib], [rAv,Iz]); 58 } 59 0x01: decode OPCODE_OP_BOTTOM3 { 60 0x6: decode MODE_SUBMODE { 61 0x0: UD2(); 62 default: WarnUnimpl::push_CS(); 63 } 64 //Any time this is seen, it should generate a two byte opcode 65 0x7: M5InternalError::error( 66 {{"Saw a one byte opcode whose value was 0x0F!"}}); 67 default: MultiInst::OR(OPCODE_OP_BOTTOM3, 68 [Eb,Gb], [Ev,Gv], 69 [Gb,Eb], [Gv,Ev], 70 [rAb,Ib], [rAv,Iz]); 71 } 72 0x02: decode OPCODE_OP_BOTTOM3 { 73 0x6: decode MODE_SUBMODE { 74 0x0: UD2(); 75 default: WarnUnimpl::push_SS(); 76 } 77 0x7: decode MODE_SUBMODE { 78 0x0: UD2(); 79 default: WarnUnimpl::pop_SS(); 80 } 81 default: MultiInst::ADC(OPCODE_OP_BOTTOM3, 82 [Eb,Gb], [Ev,Gv], 83 [Gb,Eb], [Gv,Ev], 84 [rAb,Ib], [rAv,Iz]); 85 } 86 0x03: decode OPCODE_OP_BOTTOM3 { 87 0x6: decode MODE_SUBMODE { 88 0x0: UD2(); 89 default: WarnUnimpl::push_DS(); 90 } 91 0x7: decode MODE_SUBMODE { 92 0x0: UD2(); 93 default: WarnUnimpl::pop_DS(); 94 } 95 default: MultiInst::SBB(OPCODE_OP_BOTTOM3, 96 [Eb,Gb], [Ev,Gv], 97 [Gb,Eb], [Gv,Ev], 98 [rAb,Ib], [rAv,Iz]); 99 } 100 0x04: decode OPCODE_OP_BOTTOM3 { 101 0x6: M5InternalError::error( 102 {{"Tried to execute the ES segment override prefix!"}}); 103 0x7: decode MODE_SUBMODE { 104 0x0: UD2(); 105 default: WarnUnimpl::daa(); 106 } 107 default: MultiInst::AND(OPCODE_OP_BOTTOM3, 108 [Eb,Gb], [Ev,Gv], 109 [Gb,Eb], [Gv,Ev], 110 [rAb,Ib], [rAv,Iz]); 111 } 112 0x05: decode OPCODE_OP_BOTTOM3 { 113 0x6: M5InternalError::error( 114 {{"Tried to execute the CS segment override prefix!"}}); 115 0x7: decode MODE_SUBMODE { 116 0x0: UD2(); 117 default: WarnUnimpl::das(); 118 } 119 default: MultiInst::SUB(OPCODE_OP_BOTTOM3, 120 [Eb,Gb], [Ev,Gv], 121 [Gb,Eb], [Gv,Ev], 122 [rAb,Ib], [rAv,Iz]); 123 } 124 0x06: decode OPCODE_OP_BOTTOM3 { 125 0x6: M5InternalError::error( 126 {{"Tried to execute the SS segment override prefix!"}}); 127 0x7: decode MODE_SUBMODE { 128 0x0: UD2(); 129 default: WarnUnimpl::aaa(); 130 } 131 default: MultiInst::XOR(OPCODE_OP_BOTTOM3, 132 [Eb,Gb], [Ev,Gv], 133 [Gb,Eb], [Gv,Ev], 134 [rAb,Ib], [rAv,Iz]); 135 } 136 0x07: decode OPCODE_OP_BOTTOM3 { 137 0x6: M5InternalError::error( 138 {{"Tried to execute the DS segment override prefix!"}}); 139 0x7: decode MODE_SUBMODE { 140 0x0: UD2(); 141 default: WarnUnimpl::aas(); 142 } 143 default: MultiInst::CMP(OPCODE_OP_BOTTOM3, 144 [Eb,Gb], [Ev,Gv], 145 [Gb,Eb], [Gv,Ev], 146 [rAb,Ib], [rAv,Iz]); 147 } 148 0x08: decode MODE_SUBMODE { 149 0x0: M5InternalError::error ( 150 {{"Tried to execute an REX prefix!"}}); 151 default: INC(Bv); 152 } 153 0x09: decode MODE_SUBMODE { 154 0x0: M5InternalError::error ( 155 {{"Tried to execute an REX prefix!"}}); 156 default: DEC(Bv); 157 } 158 0x0A: PUSH(Bv); 159 0x0B: POP(Bv); 160 0x0C: decode OPCODE_OP_BOTTOM3 { 161 0x0: decode MODE_SUBMODE { 162 0x0: UD2(); 163 default: PUSHA(); 164 } 165 0x1: decode MODE_SUBMODE { 166 0x0: UD2(); 167 default: POPA(); 168 } 169 0x2: decode MODE_SUBMODE { 170 0x0: UD2(); 171 default: BOUND(Gv,Mv); 172 } 173 0x3: decode MODE_SUBMODE { 174 //The second operand should really be of size "d", but it's 175 //set to "v" in order to have a consistent register size. 176 //This shouldn't affect behavior. 177 0x0: MOVSXD(Gv,Ev); 178 default: WarnUnimpl::arpl_Ew_Gw(); 179 } 180 0x4: M5InternalError::error( 181 {{"Tried to execute the FS segment override prefix!"}}); 182 0x5: M5InternalError::error( 183 {{"Tried to execute the GS segment override prefix!"}}); 184 0x6: M5InternalError::error( 185 {{"Tried to execute the operand size override prefix!"}}); 186 0x7: M5InternalError::error( 187 {{"Tried to execute the DS address size override prefix!"}}); 188 } 189 0x0D: decode OPCODE_OP_BOTTOM3 { 190 0x0: PUSH(Iz); 191 0x1: IMUL(Gv,Ev,Iz); 192 0x2: PUSH(Ib); 193 0x3: IMUL(Gv,Ev,Ib); 194 0x4: StringInst::INS(Yb,rD); 195 0x5: StringInst::INS(Yz,rD); 196 0x6: StringInst::OUTS(rD,Xb); 197 0x7: StringInst::OUTS(rD,Xz); 198 } 199 0x0E: decode OPCODE_OP_BOTTOM3 { 200 0x0: JO(Jb); 201 0x1: JNO(Jb); 202 0x2: JB(Jb); 203 0x3: JNB(Jb); 204 0x4: JZ(Jb); 205 0x5: JNZ(Jb); 206 0x6: JBE(Jb); 207 0x7: JNBE(Jb); 208 } 209 0x0F: decode OPCODE_OP_BOTTOM3 { 210 0x0: JS(Jb); 211 0x1: JNS(Jb); 212 0x2: JP(Jb); 213 0x3: JNP(Jb); 214 0x4: JL(Jb); 215 0x5: JNL(Jb); 216 0x6: JLE(Jb); 217 0x7: JNLE(Jb); 218 } 219 0x10: decode OPCODE_OP_BOTTOM3 { 220 //0x0: group1_Eb_Ib(); 221 0x0: decode MODRM_REG { 222 0x0: ADD(Eb,Ib); 223 0x1: OR(Eb,Ib); 224 0x2: ADC(Eb,Ib); 225 0x3: SBB(Eb,Ib); 226 0x4: AND(Eb,Ib); 227 0x5: SUB(Eb,Ib); 228 0x6: XOR(Eb,Ib); 229 0x7: CMP(Eb,Ib); 230 } 231 //0x1: group1_Ev_Iz(); 232 0x1: decode MODRM_REG { 233 0x0: ADD(Ev,Iz); 234 0x1: OR(Ev,Iz); 235 0x2: ADC(Ev,Iz); 236 0x3: SBB(Ev,Iz); 237 0x4: AND(Ev,Iz); 238 0x5: SUB(Ev,Iz); 239 0x6: XOR(Ev,Iz); 240 0x7: CMP(Ev,Iz); 241 } 242 0x2: decode MODE_SUBMODE { 243 0x0: UD2(); 244 //default: group1_Eb_Ib(); 245 default: decode MODRM_REG { 246 0x0: ADD(Eb,Ib); 247 0x1: OR(Eb,Ib); 248 0x2: ADC(Eb,Ib); 249 0x3: SBB(Eb,Ib); 250 0x4: AND(Eb,Ib); 251 0x5: SUB(Eb,Ib); 252 0x6: XOR(Eb,Ib); 253 0x7: CMP(Eb,Ib); 254 } 255 } 256 //0x3: group1_Ev_Ib(); 257 0x3: decode MODRM_REG { 258 0x0: ADD(Ev,Ib); 259 0x1: OR(Ev,Ib); 260 0x2: ADC(Ev,Ib); 261 0x3: SBB(Ev,Ib); 262 0x4: AND(Ev,Ib); 263 0x5: SUB(Ev,Ib); 264 0x6: XOR(Ev,Ib); 265 0x7: CMP(Ev,Ib); 266 } 267 0x4: TEST(Eb,Gb); 268 0x5: TEST(Ev,Gv); 269 0x6: XCHG(Eb,Gb); 270 0x7: XCHG(Ev,Gv); 271 } 272 0x11: decode OPCODE_OP_BOTTOM3 { 273 0x0: MOV(Eb,Gb); 274 0x1: MOV(Ev,Gv); 275 0x2: MOV(Gb,Eb); 276 0x3: MOV(Gv,Ev); 277 0x4: decode MODRM_REG { 278 0x0, 0x1, 0x2, 279 0x3, 0x4, 0x5: MOV(Ev,Sv); 280 } 281 0x5: LEA(Gv,M); 282 0x6: decode MODE_SUBMODE { 283 0x3, 0x4: MOV_REAL(Sv,Ev); 284 default: decode MODRM_REG { 285 0x1: UD2(); // Moving to the CS selector is illegal. 286 0x2: MOVSS(Sv,Ev); 287 0x0, 0x3, 288 0x4, 0x5: MOV(Sv,Ev); 289 default: UD2(); 290 } 291 } 292 //0x7: group10_Ev(); 293 0x7: decode MODRM_REG { 294 0x0: POP(Ev); 295 default: UD2(); 296 } 297 } 298 0x12: decode OPCODE_OP_BOTTOM3 { 299 0x0: NopInst::NOP(); //XXX repe makes this a "pause" 300 default: XCHG(Bv,rAv); 301 } 302 0x13: decode OPCODE_OP_BOTTOM3 { 303 0x0: CDQE(rAv); 304 0x1: CQO(rAv,rDv); 305 0x2: decode MODE_SUBMODE { 306 0x0: UD2(); 307 default: WarnUnimpl::call_far_Ap(); 308 } 309 0x3: WarnUnimpl::fwait(); //aka wait 310 0x4: PUSHF(); 311 0x5: POPF(); 312 //The 64 bit versions of both of these should be illegal only 313 //if CPUID says it isn't supported. For now, we'll just assume 314 //that it's supported. 315 0x6: SAHF(); 316 0x7: LAHF(); 317 } 318 0x14: decode OPCODE_OP_BOTTOM3 { 319 0x0: MOV(rAb, Ob); 320 0x1: MOV(rAv, Ov); 321 0x2: MOV(Ob, rAb); 322 0x3: MOV(Ov, rAv); 323 0x4: StringInst::MOVS(Yb,Xb); 324 0x5: StringInst::MOVS(Yv,Xv); 325 0x6: StringTestInst::CMPS(Yb,Xb); 326 0x7: StringTestInst::CMPS(Yv,Xv); 327 } 328 0x15: decode OPCODE_OP_BOTTOM3 { 329 0x0: TEST(rAb,Ib); 330 0x1: TEST(rAv,Iz); 331 0x2: StringInst::STOS(Yb); 332 0x3: StringInst::STOS(Yv); 333 0x4: StringInst::LODS(Xb); 334 0x5: StringInst::LODS(Xv); 335 0x6: StringTestInst::SCAS(Yb); 336 0x7: StringTestInst::SCAS(Yv); 337 } 338 0x16: MOV(Bb,Ib); 339 0x17: MOV(Bv,Iv); 340 0x18: decode OPCODE_OP_BOTTOM3 { 341 //0x0: group2_Eb_Ib(); 342 0x0: decode MODRM_REG { 343 0x0: ROL(Eb,Ib); 344 0x1: ROR(Eb,Ib); 345 0x2: RCL(Eb,Ib); 346 0x3: RCR(Eb,Ib); 347 0x4: SAL(Eb,Ib); 348 0x5: SHR(Eb,Ib); 349 0x6: SAL(Eb,Ib); 350 0x7: SAR(Eb,Ib); 351 } 352 //0x1: group2_Ev_Ib(); 353 0x1: decode MODRM_REG { 354 0x0: ROL(Ev,Ib); 355 0x1: ROR(Ev,Ib); 356 0x2: RCL(Ev,Ib); 357 0x3: RCR(Ev,Ib); 358 0x4: SAL(Ev,Ib); 359 0x5: SHR(Ev,Ib); 360 0x6: SAL(Ev,Ib); 361 0x7: SAR(Ev,Ib); 362 } 363 0x2: RET_NEAR(Iw); 364 0x3: RET_NEAR(); 365 0x4: decode MODE_SUBMODE { 366 0x0: UD2(); 367 default: WarnUnimpl::les_Gz_Mp(); 368 } 369 0x5: decode MODE_SUBMODE { 370 0x0: UD2(); 371 default: WarnUnimpl::lds_Gz_Mp(); 372 } 373 //0x6: group12_Eb_Ib(); 374 0x6: decode MODRM_REG { 375 0x0: MOV(Eb,Ib); 376 default: UD2(); 377 } 378 //0x7: group12_Ev_Iz(); 379 0x7: decode MODRM_REG { 380 0x0: MOV(Ev,Iz); 381 default: UD2(); 382 } 383 } 384 format WarnUnimpl { 385 0x19: decode OPCODE_OP_BOTTOM3 { 386 // The second parameter here should be of size b, but 387 // immediate sizes are determined elsewhere and this would 388 // confuse the instruction type specialization code. 389 0x0: Inst::ENTER(Iw,Iw); 390 0x1: Inst::LEAVE(); 391 0x2: ret_far_Iw(); 392 0x3: decode MODE_SUBMODE { 393 0x3, 0x4: ret_far_real(); 394 default: Inst::RET_FAR(); 395 } 396 0x4: int3(); 397#if FULL_SYSTEM 398 0x5: int_Ib(); 399#else 400 // Really only the LSB matters, but the predecoder will sign 401 // extend it, and there's no easy way to specify only checking 402 // the first byte. 403 0x5: decode IMMEDIATE { 404 -0x80: 405 SyscallInst::int80('xc->syscall(Rax)', 406 IsSyscall, IsNonSpeculative, IsSerializeAfter); 407 default: int_Ib(); 408 } 409#endif 410 0x6: decode MODE_SUBMODE { 411 0x0: Inst::UD2(); 412 default: into(); 413 } 414 0x7: decode MODE_SUBMODE { 415 0x4: Inst::IRET_REAL(); 416 0x3: Inst::IRET_VIRT(); 417 default: Inst::IRET_PROT(); 418 } 419 } 420 } 421 0x1A: decode OPCODE_OP_BOTTOM3 { 422 //0x0: group2_Eb_1(); 423 0x0: decode MODRM_REG { 424 0x0: ROL_1(Eb); 425 0x1: ROR_1(Eb); 426 0x2: RCL_1(Eb); 427 0x3: RCR_1(Eb); 428 0x4: SAL_1(Eb); 429 0x5: SHR_1(Eb); 430 0x6: SAL_1(Eb); 431 0x7: SAR_1(Eb); 432 } 433 //0x1: group2_Ev_1(); 434 0x1: decode MODRM_REG { 435 0x0: ROL_1(Ev); 436 0x1: ROR_1(Ev); 437 0x2: RCL_1(Ev); 438 0x3: RCR_1(Ev); 439 0x4: SAL_1(Ev); 440 0x5: SHR_1(Ev); 441 0x6: SAL_1(Ev); 442 0x7: SAR_1(Ev); 443 } 444 //0x2: group2_Eb_Cl(); 445 0x2: decode MODRM_REG { 446 0x0: ROL(Eb,rCb); 447 0x1: ROR(Eb,rCb); 448 0x2: RCL(Eb,rCb); 449 0x3: RCR(Eb,rCb); 450 0x4: SAL(Eb,rCb); 451 0x5: SHR(Eb,rCb); 452 0x6: SAL(Eb,rCb); 453 0x7: SAR(Eb,rCb); 454 } 455 //The second operand should have size "b", but to have 456 //consistent register sizes it's "v". This shouldn't have 457 //any affect on functionality. 458 //0x3: group2_Ev_Cl(); 459 0x3: decode MODRM_REG { 460 0x0: ROL(Ev,rCv); 461 0x1: ROR(Ev,rCv); 462 0x2: RCL(Ev,rCv); 463 0x3: RCR(Ev,rCv); 464 0x4: SAL(Ev,rCv); 465 0x5: SHR(Ev,rCv); 466 0x6: SAL(Ev,rCv); 467 0x7: SAR(Ev,rCv); 468 } 469 0x4: decode MODE_SUBMODE { 470 0x0: UD2(); 471 default: WarnUnimpl::aam_Ib(); 472 } 473 0x5: decode MODE_SUBMODE { 474 0x0: UD2(); 475 default: WarnUnimpl::aad_Ib(); 476 } 477 0x6: decode MODE_SUBMODE { 478 0x0: UD2(); 479 default: SALC(rAb); 480 } 481 0x7: XLAT(); 482 } 483 ##include "x87.isa" 484 0x1C: decode OPCODE_OP_BOTTOM3 { 485 0x0: LOOPNE(Jb); 486 0x1: LOOPE(Jb); 487 0x2: LOOP(Jb); 488 0x3: JRCX(Jb); 489 0x4: IN(rAb,Ib); 490 0x5: IN(rAv,Iv); 491 0x6: OUT(Ib,rAb); 492 0x7: OUT(Iv,rAv); 493 } 494 0x1D: decode OPCODE_OP_BOTTOM3 { 495 0x0: CALL_NEAR(Jz); 496 0x1: JMP(Jz); 497 0x2: decode MODE_SUBMODE { 498 0x0: UD2(); 499 0x1: JMP_FAR(Iz); 500 0x2: JMP_FAR(Iz); 501 0x3: JMP_FAR_REAL(Iz); 502 0x4: JMP_FAR_REAL(Iz); 503 } 504 0x3: JMP(Jb); 505 0x4: IN(rAb,rD); 506 0x5: IN(rAv,rD); 507 0x6: OUT(rD,rAb); 508 0x7: OUT(rD,rAv); 509 } 510 0x1E: decode OPCODE_OP_BOTTOM3 { 511 0x0: M5InternalError::error( 512 {{"Tried to execute the lock prefix!"}}); 513 0x1: WarnUnimpl::int1(); 514 0x2: M5InternalError::error( 515 {{"Tried to execute the repne prefix!"}}); 516 0x3: M5InternalError::error( 517 {{"Tried to execute the rep/repe prefix!"}}); 518 0x4: HLT(); 519 0x5: CMC(); 520 //0x6: group3_Eb(); 521 0x6: decode MODRM_REG { 522 0x0: TEST(Eb,Iz); 523 0x1: TEST(Eb,Iz); 524 0x2: NOT(Eb); 525 0x3: NEG(Eb); 526 0x4: MUL_B(Eb); 527 0x5: IMUL_B(Eb); 528 //This should be Eb, but it access the entire word value ax. 529 0x6: DIV_B(Ew); 530 0x7: IDIV_B(Eb); 531 } 532 //0x7: group3_Ev(); 533 0x7: decode MODRM_REG { 534 0x0: TEST(Ev,Iz); 535 0x1: TEST(Ev,Iz); 536 0x2: NOT(Ev); 537 0x3: NEG(Ev); 538 0x4: MUL(Ev); 539 0x5: IMUL(Ev); 540 0x6: DIV(Ev); 541 0x7: IDIV(Ev); 542 } 543 } 544 0x1F: decode OPCODE_OP_BOTTOM3 { 545 0x0: CLC(); 546 0x1: STC(); 547 0x2: CLI(); 548 0x3: STI(); 549 0x4: CLD(); 550 0x5: STD(); 551 //0x6: group4(); 552 0x6: decode MODRM_REG { 553 0x0: INC(Eb); 554 0x1: DEC(Eb); 555 default: UD2(); 556 } 557 //0x7: group5(); 558 0x7: decode MODRM_REG { 559 0x0: INC(Ev); 560 0x1: DEC(Ev); 561 0x2: CALL_NEAR(Ev); 562 0x3: WarnUnimpl::call_far_Mp(); 563 0x4: JMP(Ev); 564 0x5: decode MODE_SUBMODE { 565 0x0: JMP_FAR(Mz); 566 0x1: JMP_FAR(Mz); 567 0x2: JMP_FAR(Mz); 568 0x3: JMP_FAR_REAL(Mz); 569 0x4: JMP_FAR_REAL(Mz); 570 } 571 0x6: PUSH(Ev); 572 0x7: UD2(); 573 } 574 } 575 } 576 default: FailUnimpl::oneByteOps(); 577} 578