isa.hh revision 9376
16313Sgblack@eecs.umich.edu/*
26313Sgblack@eecs.umich.edu * Copyright (c) 2009 The Regents of The University of Michigan
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46313Sgblack@eecs.umich.edu *
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66313Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
76313Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
86313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
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146313Sgblack@eecs.umich.edu * this software without specific prior written permission.
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276313Sgblack@eecs.umich.edu *
286313Sgblack@eecs.umich.edu * Authors: Gabe Black
296313Sgblack@eecs.umich.edu */
306313Sgblack@eecs.umich.edu
316313Sgblack@eecs.umich.edu#ifndef __ARCH_X86_ISA_HH__
326313Sgblack@eecs.umich.edu#define __ARCH_X86_ISA_HH__
336313Sgblack@eecs.umich.edu
348229Snate@binkert.org#include <iostream>
358229Snate@binkert.org#include <string>
368229Snate@binkert.org
377629Sgblack@eecs.umich.edu#include "arch/x86/regs/float.hh"
387629Sgblack@eecs.umich.edu#include "arch/x86/regs/misc.hh"
398229Snate@binkert.org#include "arch/x86/registers.hh"
406336Sgblack@eecs.umich.edu#include "base/types.hh"
416336Sgblack@eecs.umich.edu
426313Sgblack@eecs.umich.educlass Checkpoint;
436313Sgblack@eecs.umich.educlass EventManager;
446336Sgblack@eecs.umich.educlass ThreadContext;
456313Sgblack@eecs.umich.edu
466313Sgblack@eecs.umich.edunamespace X86ISA
476313Sgblack@eecs.umich.edu{
486313Sgblack@eecs.umich.edu    class ISA
496313Sgblack@eecs.umich.edu    {
506313Sgblack@eecs.umich.edu      protected:
516336Sgblack@eecs.umich.edu        MiscReg regVal[NUM_MISCREGS];
526336Sgblack@eecs.umich.edu        void updateHandyM5Reg(Efer efer, CR0 cr0,
539376Sgblack@eecs.umich.edu                SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags,
549376Sgblack@eecs.umich.edu                ThreadContext *tc);
556313Sgblack@eecs.umich.edu
566313Sgblack@eecs.umich.edu      public:
576313Sgblack@eecs.umich.edu        void clear();
586313Sgblack@eecs.umich.edu
596336Sgblack@eecs.umich.edu        ISA()
606336Sgblack@eecs.umich.edu        {
616336Sgblack@eecs.umich.edu            clear();
626336Sgblack@eecs.umich.edu        }
636336Sgblack@eecs.umich.edu
646313Sgblack@eecs.umich.edu        MiscReg readMiscRegNoEffect(int miscReg);
656313Sgblack@eecs.umich.edu        MiscReg readMiscReg(int miscReg, ThreadContext *tc);
666313Sgblack@eecs.umich.edu
676336Sgblack@eecs.umich.edu        void setMiscRegNoEffect(int miscReg, MiscReg val);
686336Sgblack@eecs.umich.edu        void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
696313Sgblack@eecs.umich.edu
706359Sgblack@eecs.umich.edu        int
716359Sgblack@eecs.umich.edu        flattenIntIndex(int reg)
726359Sgblack@eecs.umich.edu        {
736361Sgblack@eecs.umich.edu            return reg & ~IntFoldBit;
746359Sgblack@eecs.umich.edu        }
756359Sgblack@eecs.umich.edu
766359Sgblack@eecs.umich.edu        int
776359Sgblack@eecs.umich.edu        flattenFloatIndex(int reg)
786359Sgblack@eecs.umich.edu        {
796359Sgblack@eecs.umich.edu            if (reg >= NUM_FLOATREGS) {
806359Sgblack@eecs.umich.edu                reg = FLOATREG_STACK(reg - NUM_FLOATREGS,
816359Sgblack@eecs.umich.edu                                     regVal[MISCREG_X87_TOP]);
826359Sgblack@eecs.umich.edu            }
836359Sgblack@eecs.umich.edu            return reg;
846359Sgblack@eecs.umich.edu        }
856313Sgblack@eecs.umich.edu
866313Sgblack@eecs.umich.edu        void serialize(EventManager *em, std::ostream &os);
876313Sgblack@eecs.umich.edu        void unserialize(EventManager *em, Checkpoint *cp,
886313Sgblack@eecs.umich.edu                const std::string &section);
896313Sgblack@eecs.umich.edu    };
906313Sgblack@eecs.umich.edu}
916313Sgblack@eecs.umich.edu
926313Sgblack@eecs.umich.edu#endif
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