isa.cc revision 6313:95f69a436c82
1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "arch/x86/isa.hh" 32#include "arch/x86/floatregs.hh" 33#include "cpu/thread_context.hh" 34 35namespace X86ISA 36{ 37 38void 39ISA::clear() 40{ 41 miscRegFile.clear(); 42} 43 44MiscReg 45ISA::readMiscRegNoEffect(int miscReg) 46{ 47 return miscRegFile.readRegNoEffect((MiscRegIndex)miscReg); 48} 49 50MiscReg 51ISA::readMiscReg(int miscReg, ThreadContext *tc) 52{ 53 return miscRegFile.readReg((MiscRegIndex)miscReg, tc); 54} 55 56void 57ISA::setMiscRegNoEffect(int miscReg, const MiscReg val) 58{ 59 miscRegFile.setRegNoEffect((MiscRegIndex)miscReg, val); 60} 61 62void 63ISA::setMiscReg(int miscReg, const MiscReg val, ThreadContext *tc) 64{ 65 miscRegFile.setReg((MiscRegIndex)miscReg, val, tc); 66} 67 68int 69ISA::flattenIntIndex(int reg) 70{ 71 //If we need to fold over the index to match byte semantics, do that. 72 //Otherwise, just strip off any extra bits and pass it through. 73 if (reg & (1 << 6)) 74 return (reg & (~(1 << 6) - 0x4)); 75 else 76 return (reg & ~(1 << 6)); 77} 78 79int 80ISA::flattenFloatIndex(int reg) 81{ 82 if (reg >= NUM_FLOATREGS) { 83 int top = miscRegFile.readRegNoEffect(MISCREG_X87_TOP); 84 reg = FLOATREG_STACK(reg - NUM_FLOATREGS, top); 85 } 86 return reg; 87} 88 89void 90ISA::serialize(EventManager *em, std::ostream &os) 91{ 92 miscRegFile.serialize(os); 93} 94 95void 96ISA::unserialize(EventManager *em, Checkpoint *cp, const std::string §ion) 97{ 98 miscRegFile.unserialize(cp, section); 99} 100 101} 102