interrupts.hh revision 5647:b06b49498c79
1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * 9 * The software must be used only for Non-Commercial Use which means any 10 * use which is NOT directed to receiving any direct monetary 11 * compensation for, or commercial advantage from such use. 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Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_INTERRUPTS_HH__ 59#define __ARCH_X86_INTERRUPTS_HH__ 60 61#include "arch/x86/apicregs.hh" 62#include "arch/x86/faults.hh" 63#include "cpu/thread_context.hh" 64#include "params/X86LocalApic.hh" 65#include "sim/eventq.hh" 66#include "sim/sim_object.hh" 67 68class ThreadContext; 69 70namespace X86ISA 71{ 72 73class Interrupts : public SimObject 74{ 75 protected: 76 uint32_t regs[NUM_APIC_REGS]; 77 78 class ApicTimerEvent : public Event 79 { 80 public: 81 ApicTimerEvent() : Event() 82 {} 83 84 void process() 85 { 86 warn("Local APIC timer event doesn't do anything!\n"); 87 } 88 }; 89 90 ApicTimerEvent apicTimerEvent; 91 92 public: 93 typedef X86LocalApicParams Params; 94 95 const Params * 96 params() const 97 { 98 return dynamic_cast<const Params *>(_params); 99 } 100 101 uint32_t readRegNoEffect(ApicRegIndex reg); 102 uint32_t readReg(ApicRegIndex miscReg, ThreadContext *tc); 103 104 void setRegNoEffect(ApicRegIndex reg, uint32_t val); 105 void setReg(ApicRegIndex reg, uint32_t val, ThreadContext *tc); 106 107 Interrupts(Params * p) : SimObject(p) 108 { 109 //Set the local apic DFR to the flat model. 110 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1); 111 memset(regs, 0, sizeof(regs)); 112 clear_all(); 113 } 114 115 int InterruptLevel(uint64_t softint) 116 { 117 panic("Interrupts::InterruptLevel unimplemented!\n"); 118 return 0; 119 } 120 121 void post(int int_num, int index) 122 { 123 panic("Interrupts::post unimplemented!\n"); 124 } 125 126 void clear(int int_num, int index) 127 { 128 warn("Interrupts::clear unimplemented!\n"); 129 } 130 131 void clear_all() 132 { 133 warn("Interrupts::clear_all unimplemented!\n"); 134 } 135 136 bool check_interrupts(ThreadContext * tc) const 137 { 138 return false; 139 } 140 141 Fault getInterrupt(ThreadContext * tc) 142 { 143 return NoFault; 144 } 145 146 void updateIntrInfo(ThreadContext * tc) 147 { 148 panic("Interrupts::updateIntrInfo unimplemented!\n"); 149 } 150 151 void serialize(std::ostream & os) 152 { 153 panic("Interrupts::serialize unimplemented!\n"); 154 } 155 156 void unserialize(Checkpoint * cp, const std::string & section) 157 { 158 panic("Interrupts::unserialize unimplemented!\n"); 159 } 160}; 161 162}; 163 164#endif // __ARCH_X86_INTERRUPTS_HH__ 165