microregop.hh revision 7620
16019SN/A/*
26019SN/A * Copyright (c) 2007 The Hewlett-Packard Development Company
312763Sgiacomo.travaglini@arm.com * All rights reserved.
47102SN/A *
57102SN/A * The license below extends only to copyright in the software and shall
67102SN/A * not be construed as granting a license to any other intellectual
77102SN/A * property including but not limited to intellectual property relating
87102SN/A * to a hardware implementation of the functionality of the software
97102SN/A * licensed hereunder.  You may use the software subject to the license
107102SN/A * terms below provided that you ensure that this notice is replicated
117102SN/A * unmodified and in its entirety in all distributions of the software,
127102SN/A * modified or unmodified, in source code or in binary form.
137102SN/A *
147102SN/A * Redistribution and use in source and binary forms, with or without
157102SN/A * modification, are permitted provided that the following conditions are
166019SN/A * met: redistributions of source code must retain the above copyright
176019SN/A * notice, this list of conditions and the following disclaimer;
186019SN/A * redistributions in binary form must reproduce the above copyright
196019SN/A * notice, this list of conditions and the following disclaimer in the
206019SN/A * documentation and/or other materials provided with the distribution;
216019SN/A * neither the name of the copyright holders nor the names of its
226019SN/A * contributors may be used to endorse or promote products derived from
236019SN/A * this software without specific prior written permission.
246019SN/A *
256019SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
266019SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
276019SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
286019SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
296019SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
306019SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
316019SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
326019SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
336019SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
346019SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
356019SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
366019SN/A *
376019SN/A * Authors: Gabe Black
386019SN/A */
396019SN/A
406019SN/A#ifndef __ARCH_X86_INSTS_MICROREGOP_HH__
417102SN/A#define __ARCH_X86_INSTS_MICROREGOP_HH__
426019SN/A
4312763Sgiacomo.travaglini@arm.com#include "arch/x86/insts/microop.hh"
4412763Sgiacomo.travaglini@arm.com
4512763Sgiacomo.travaglini@arm.comnamespace X86ISA
4612763Sgiacomo.travaglini@arm.com{
4712763Sgiacomo.travaglini@arm.com    /**
4812763Sgiacomo.travaglini@arm.com     * Base classes for RegOps which provides a generateDisassembly method.
4912763Sgiacomo.travaglini@arm.com     */
5012763Sgiacomo.travaglini@arm.com    class RegOpBase : public X86MicroopBase
5112763Sgiacomo.travaglini@arm.com    {
5210611SAndreas.Sandberg@ARM.com      protected:
5312763Sgiacomo.travaglini@arm.com        const RegIndex src1;
5410611SAndreas.Sandberg@ARM.com        const RegIndex dest;
5510611SAndreas.Sandberg@ARM.com        const uint8_t dataSize;
5610037SARM gem5 Developers        const uint16_t ext;
57        RegIndex foldOBit;
58
59        // Constructor
60        RegOpBase(ExtMachInst _machInst,
61                const char *mnem, const char *_instMnem, uint64_t setFlags,
62                InstRegIndex _src1, InstRegIndex _dest,
63                uint8_t _dataSize, uint16_t _ext,
64                OpClass __opClass) :
65            X86MicroopBase(_machInst, mnem, _instMnem, setFlags,
66                    __opClass),
67            src1(_src1.idx), dest(_dest.idx),
68            dataSize(_dataSize), ext(_ext)
69        {
70            foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
71        }
72
73        //Figure out what the condition code flags should be.
74        uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask,
75                uint64_t _dest, uint64_t _src1, uint64_t _src2,
76                bool subtract = false) const;
77    };
78
79    class RegOp : public RegOpBase
80    {
81      protected:
82        const RegIndex src2;
83
84        // Constructor
85        RegOp(ExtMachInst _machInst,
86                const char *mnem, const char *_instMnem, uint64_t setFlags,
87                InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
88                uint8_t _dataSize, uint16_t _ext,
89                OpClass __opClass) :
90            RegOpBase(_machInst, mnem, _instMnem, setFlags,
91                    _src1, _dest, _dataSize, _ext,
92                    __opClass),
93            src2(_src2.idx)
94        {
95        }
96
97        std::string generateDisassembly(Addr pc,
98            const SymbolTable *symtab) const;
99    };
100
101    class RegOpImm : public RegOpBase
102    {
103      protected:
104        const uint8_t imm8;
105
106        // Constructor
107        RegOpImm(ExtMachInst _machInst,
108                const char * mnem, const char *_instMnem, uint64_t setFlags,
109                InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
110                uint8_t _dataSize, uint16_t _ext,
111                OpClass __opClass) :
112            RegOpBase(_machInst, mnem, _instMnem, setFlags,
113                    _src1, _dest, _dataSize, _ext,
114                    __opClass),
115            imm8(_imm8)
116        {
117        }
118
119        std::string generateDisassembly(Addr pc,
120            const SymbolTable *symtab) const;
121    };
122}
123
124#endif //__ARCH_X86_INSTS_MICROREGOP_HH__
125