microregop.hh revision 4804:4a707cb7065b
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Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_INSTS_MICROREGOP_HH__ 59#define __ARCH_X86_INSTS_MICROREGOP_HH__ 60 61#include "arch/x86/insts/microop.hh" 62 63namespace X86ISA 64{ 65 namespace ConditionTests 66 { 67 enum CondTest { 68 True, 69 NotFalse = True, 70 ECF, 71 EZF, 72 SZnZF, 73 MSTRZ, 74 STRZ, 75 MSTRC, 76 STRZnZF, 77 OF, 78 CF, 79 ZF, 80 CvZF, 81 SF, 82 PF, 83 SxOF, 84 SxOvZF, 85 86 False, 87 NotTrue = False, 88 NotECF, 89 NotEZF, 90 NotSZnZF, 91 NotMSTRZ, 92 NotSTRZ, 93 NotMSTRC, 94 NotSTRZnZF, 95 NotOF, 96 NotCF, 97 NotZF, 98 NotCvZF, 99 NotSF, 100 NotPF, 101 NotSxOF, 102 NotSxOvZF 103 }; 104 } 105 106 /** 107 * Base classes for RegOps which provides a generateDisassembly method. 108 */ 109 class RegOpBase : public X86MicroopBase 110 { 111 protected: 112 const RegIndex src1; 113 const RegIndex dest; 114 const uint8_t dataSize; 115 const uint16_t ext; 116 RegIndex foldOBit; 117 118 // Constructor 119 RegOpBase(ExtMachInst _machInst, 120 const char *mnem, const char *_instMnem, 121 bool isMicro, bool isDelayed, 122 bool isFirst, bool isLast, 123 RegIndex _src1, RegIndex _dest, 124 uint8_t _dataSize, uint16_t _ext, 125 OpClass __opClass) : 126 X86MicroopBase(_machInst, mnem, _instMnem, 127 isMicro, isDelayed, isFirst, isLast, 128 __opClass), 129 src1(_src1), dest(_dest), 130 dataSize(_dataSize), ext(_ext) 131 { 132 foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 133 } 134 135 //Figure out what the condition code flags should be. 136 uint64_t genFlags(uint64_t oldFlags, uint64_t flagMask, 137 uint64_t _dest, uint64_t _src1, uint64_t _src2, 138 bool subtract = false) const; 139 bool checkCondition(uint64_t flags) const; 140 }; 141 142 class RegOp : public RegOpBase 143 { 144 protected: 145 const RegIndex src2; 146 147 // Constructor 148 RegOp(ExtMachInst _machInst, 149 const char *mnem, const char *_instMnem, 150 bool isMicro, bool isDelayed, 151 bool isFirst, bool isLast, 152 RegIndex _src1, RegIndex _src2, RegIndex _dest, 153 uint8_t _dataSize, uint16_t _ext, 154 OpClass __opClass) : 155 RegOpBase(_machInst, mnem, _instMnem, 156 isMicro, isDelayed, isFirst, isLast, 157 _src1, _dest, _dataSize, _ext, 158 __opClass), 159 src2(_src2) 160 { 161 } 162 163 std::string generateDisassembly(Addr pc, 164 const SymbolTable *symtab) const; 165 }; 166 167 class RegOpImm : public RegOpBase 168 { 169 protected: 170 const uint8_t imm8; 171 172 // Constructor 173 RegOpImm(ExtMachInst _machInst, 174 const char * mnem, const char *_instMnem, 175 bool isMicro, bool isDelayed, 176 bool isFirst, bool isLast, 177 RegIndex _src1, uint8_t _imm8, RegIndex _dest, 178 uint8_t _dataSize, uint16_t _ext, 179 OpClass __opClass) : 180 RegOpBase(_machInst, mnem, _instMnem, 181 isMicro, isDelayed, isFirst, isLast, 182 _src1, _dest, _dataSize, _ext, 183 __opClass), 184 imm8(_imm8) 185 { 186 } 187 188 std::string generateDisassembly(Addr pc, 189 const SymbolTable *symtab) const; 190 }; 191} 192 193#endif //__ARCH_X86_INSTS_MICROREGOP_HH__ 194