faults.cc revision 5245
15124Sgblack@eecs.umich.edu/*
25124Sgblack@eecs.umich.edu * Copyright (c) 2003-2007 The Regents of The University of Michigan
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45124Sgblack@eecs.umich.edu *
55124Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
65124Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
75124Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
85124Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
95124Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
105124Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
115124Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
125124Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
135124Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
145124Sgblack@eecs.umich.edu * this software without specific prior written permission.
155124Sgblack@eecs.umich.edu *
165124Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175124Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185124Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195124Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205124Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215124Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225124Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235124Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245124Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255124Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265124Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275124Sgblack@eecs.umich.edu *
285124Sgblack@eecs.umich.edu * Authors: Gabe Black
295124Sgblack@eecs.umich.edu */
305124Sgblack@eecs.umich.edu
315124Sgblack@eecs.umich.edu/*
325124Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company
335124Sgblack@eecs.umich.edu * All rights reserved.
345124Sgblack@eecs.umich.edu *
355124Sgblack@eecs.umich.edu * Redistribution and use of this software in source and binary forms,
365124Sgblack@eecs.umich.edu * with or without modification, are permitted provided that the
375124Sgblack@eecs.umich.edu * following conditions are met:
385124Sgblack@eecs.umich.edu *
395124Sgblack@eecs.umich.edu * The software must be used only for Non-Commercial Use which means any
405124Sgblack@eecs.umich.edu * use which is NOT directed to receiving any direct monetary
415124Sgblack@eecs.umich.edu * compensation for, or commercial advantage from such use.  Illustrative
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565124Sgblack@eecs.umich.edu * Redistributions of source code must retain the above copyright notice,
575124Sgblack@eecs.umich.edu * this list of conditions and the following disclaimer.  Redistributions
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595124Sgblack@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or
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645124Sgblack@eecs.umich.edu * sublicense is granted herewith.  Derivatives of the software and
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715124Sgblack@eecs.umich.edu * applicable, this list of conditions and the disclaimer below.
725124Sgblack@eecs.umich.edu *
735124Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
745124Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
755124Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
765124Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
775124Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
785124Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
795124Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
805124Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
815124Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
825124Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
835124Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
845124Sgblack@eecs.umich.edu *
855124Sgblack@eecs.umich.edu * Authors: Gabe Black
865124Sgblack@eecs.umich.edu */
875124Sgblack@eecs.umich.edu
885124Sgblack@eecs.umich.edu#include "arch/x86/faults.hh"
895124Sgblack@eecs.umich.edu#include "base/trace.hh"
905124Sgblack@eecs.umich.edu#include "config/full_system.hh"
915124Sgblack@eecs.umich.edu#include "cpu/thread_context.hh"
925124Sgblack@eecs.umich.edu#if !FULL_SYSTEM
935124Sgblack@eecs.umich.edu#include "arch/x86/isa_traits.hh"
945124Sgblack@eecs.umich.edu#include "mem/page_table.hh"
955124Sgblack@eecs.umich.edu#include "sim/process.hh"
965237Sgblack@eecs.umich.edu#else
975237Sgblack@eecs.umich.edu#include "arch/x86/tlb.hh"
985124Sgblack@eecs.umich.edu#endif
995124Sgblack@eecs.umich.edu
1005124Sgblack@eecs.umich.edunamespace X86ISA
1015124Sgblack@eecs.umich.edu{
1025124Sgblack@eecs.umich.edu#if FULL_SYSTEM
1035130Sgblack@eecs.umich.edu    void X86Trap::invoke(ThreadContext * tc)
1045124Sgblack@eecs.umich.edu    {
1055124Sgblack@eecs.umich.edu        panic("X86 faults are not implemented!");
1065124Sgblack@eecs.umich.edu    }
1075124Sgblack@eecs.umich.edu
1085130Sgblack@eecs.umich.edu    void X86Abort::invoke(ThreadContext * tc)
1095124Sgblack@eecs.umich.edu    {
1105124Sgblack@eecs.umich.edu        panic("X86 faults are not implemented!");
1115124Sgblack@eecs.umich.edu    }
1125124Sgblack@eecs.umich.edu
1135130Sgblack@eecs.umich.edu    void X86Interrupt::invoke(ThreadContext * tc)
1145124Sgblack@eecs.umich.edu    {
1155124Sgblack@eecs.umich.edu        panic("X86 faults are not implemented!");
1165124Sgblack@eecs.umich.edu    }
1175237Sgblack@eecs.umich.edu
1185237Sgblack@eecs.umich.edu    void FakeITLBFault::invoke(ThreadContext * tc)
1195237Sgblack@eecs.umich.edu    {
1205237Sgblack@eecs.umich.edu        // Start the page table walker.
1215245Sgblack@eecs.umich.edu        tc->getITBPtr()->walk(tc, vaddr);
1225237Sgblack@eecs.umich.edu    }
1235237Sgblack@eecs.umich.edu
1245237Sgblack@eecs.umich.edu    void FakeDTLBFault::invoke(ThreadContext * tc)
1255237Sgblack@eecs.umich.edu    {
1265237Sgblack@eecs.umich.edu        // Start the page table walker.
1275245Sgblack@eecs.umich.edu        tc->getDTBPtr()->walk(tc, vaddr);
1285237Sgblack@eecs.umich.edu    }
1295237Sgblack@eecs.umich.edu
1305124Sgblack@eecs.umich.edu#else // !FULL_SYSTEM
1315124Sgblack@eecs.umich.edu    void FakeITLBFault::invoke(ThreadContext * tc)
1325124Sgblack@eecs.umich.edu    {
1335124Sgblack@eecs.umich.edu        DPRINTF(TLB, "Invoking an ITLB fault for address %#x at pc %#x.\n",
1345124Sgblack@eecs.umich.edu                vaddr, tc->readPC());
1355124Sgblack@eecs.umich.edu        Process *p = tc->getProcessPtr();
1365184Sgblack@eecs.umich.edu        TlbEntry entry;
1375184Sgblack@eecs.umich.edu        bool success = p->pTable->lookup(vaddr, entry);
1385124Sgblack@eecs.umich.edu        if(!success) {
1395124Sgblack@eecs.umich.edu            panic("Tried to execute unmapped address %#x.\n", vaddr);
1405124Sgblack@eecs.umich.edu        } else {
1415124Sgblack@eecs.umich.edu            Addr alignedVaddr = p->pTable->pageAlign(vaddr);
1425188Sgblack@eecs.umich.edu            DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
1435188Sgblack@eecs.umich.edu                    entry.pageStart());
1445124Sgblack@eecs.umich.edu            tc->getITBPtr()->insert(alignedVaddr, entry);
1455124Sgblack@eecs.umich.edu        }
1465124Sgblack@eecs.umich.edu    }
1475124Sgblack@eecs.umich.edu
1485124Sgblack@eecs.umich.edu    void FakeDTLBFault::invoke(ThreadContext * tc)
1495124Sgblack@eecs.umich.edu    {
1505124Sgblack@eecs.umich.edu        DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n",
1515124Sgblack@eecs.umich.edu                vaddr, tc->readPC());
1525124Sgblack@eecs.umich.edu        Process *p = tc->getProcessPtr();
1535184Sgblack@eecs.umich.edu        TlbEntry entry;
1545184Sgblack@eecs.umich.edu        bool success = p->pTable->lookup(vaddr, entry);
1555124Sgblack@eecs.umich.edu        if(!success) {
1565124Sgblack@eecs.umich.edu            p->checkAndAllocNextPage(vaddr);
1575184Sgblack@eecs.umich.edu            success = p->pTable->lookup(vaddr, entry);
1585124Sgblack@eecs.umich.edu        }
1595124Sgblack@eecs.umich.edu        if(!success) {
1605124Sgblack@eecs.umich.edu            panic("Tried to access unmapped address %#x.\n", vaddr);
1615124Sgblack@eecs.umich.edu        } else {
1625124Sgblack@eecs.umich.edu            Addr alignedVaddr = p->pTable->pageAlign(vaddr);
1635188Sgblack@eecs.umich.edu            DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
1645188Sgblack@eecs.umich.edu                    entry.pageStart());
1655124Sgblack@eecs.umich.edu            tc->getDTBPtr()->insert(alignedVaddr, entry);
1665124Sgblack@eecs.umich.edu        }
1675124Sgblack@eecs.umich.edu    }
1685124Sgblack@eecs.umich.edu#endif
1695124Sgblack@eecs.umich.edu} // namespace X86ISA
1705124Sgblack@eecs.umich.edu
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