faults.cc revision 5130
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IN NO EVENT SHALL THE COPYRIGHT 205124Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215124Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225124Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235124Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245124Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255124Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265124Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275124Sgblack@eecs.umich.edu * 285124Sgblack@eecs.umich.edu * Authors: Gabe Black 295124Sgblack@eecs.umich.edu */ 305124Sgblack@eecs.umich.edu 315124Sgblack@eecs.umich.edu/* 325124Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 335124Sgblack@eecs.umich.edu * All rights reserved. 345124Sgblack@eecs.umich.edu * 355124Sgblack@eecs.umich.edu * Redistribution and use of this software in source and binary forms, 365124Sgblack@eecs.umich.edu * with or without modification, are permitted provided that the 375124Sgblack@eecs.umich.edu * following conditions are met: 385124Sgblack@eecs.umich.edu * 395124Sgblack@eecs.umich.edu * The software must be used only for Non-Commercial Use which means any 405124Sgblack@eecs.umich.edu * use which is NOT directed to receiving any direct monetary 415124Sgblack@eecs.umich.edu * compensation for, or commercial advantage from such use. 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IN NO EVENT SHALL THE COPYRIGHT 775124Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 785124Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 795124Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 805124Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 815124Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 825124Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 835124Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 845124Sgblack@eecs.umich.edu * 855124Sgblack@eecs.umich.edu * Authors: Gabe Black 865124Sgblack@eecs.umich.edu */ 875124Sgblack@eecs.umich.edu 885124Sgblack@eecs.umich.edu#include "arch/x86/faults.hh" 895124Sgblack@eecs.umich.edu#include "base/trace.hh" 905124Sgblack@eecs.umich.edu#include "config/full_system.hh" 915124Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 925124Sgblack@eecs.umich.edu#if !FULL_SYSTEM 935124Sgblack@eecs.umich.edu#include "arch/x86/isa_traits.hh" 945124Sgblack@eecs.umich.edu#include "mem/page_table.hh" 955124Sgblack@eecs.umich.edu#include "sim/process.hh" 965124Sgblack@eecs.umich.edu#endif 975124Sgblack@eecs.umich.edu 985124Sgblack@eecs.umich.edunamespace X86ISA 995124Sgblack@eecs.umich.edu{ 1005124Sgblack@eecs.umich.edu#if FULL_SYSTEM 1015130Sgblack@eecs.umich.edu void X86Trap::invoke(ThreadContext * tc) 1025124Sgblack@eecs.umich.edu { 1035124Sgblack@eecs.umich.edu panic("X86 faults are not implemented!"); 1045124Sgblack@eecs.umich.edu } 1055124Sgblack@eecs.umich.edu 1065130Sgblack@eecs.umich.edu void X86Abort::invoke(ThreadContext * tc) 1075124Sgblack@eecs.umich.edu { 1085124Sgblack@eecs.umich.edu panic("X86 faults are not implemented!"); 1095124Sgblack@eecs.umich.edu } 1105124Sgblack@eecs.umich.edu 1115130Sgblack@eecs.umich.edu void X86Interrupt::invoke(ThreadContext * tc) 1125124Sgblack@eecs.umich.edu { 1135124Sgblack@eecs.umich.edu panic("X86 faults are not implemented!"); 1145124Sgblack@eecs.umich.edu } 1155124Sgblack@eecs.umich.edu#else // !FULL_SYSTEM 1165124Sgblack@eecs.umich.edu void FakeITLBFault::invoke(ThreadContext * tc) 1175124Sgblack@eecs.umich.edu { 1185124Sgblack@eecs.umich.edu DPRINTF(TLB, "Invoking an ITLB fault for address %#x at pc %#x.\n", 1195124Sgblack@eecs.umich.edu vaddr, tc->readPC()); 1205124Sgblack@eecs.umich.edu Process *p = tc->getProcessPtr(); 1215124Sgblack@eecs.umich.edu Addr paddr; 1225124Sgblack@eecs.umich.edu bool success = p->pTable->translate(vaddr, paddr); 1235124Sgblack@eecs.umich.edu if(!success) { 1245124Sgblack@eecs.umich.edu panic("Tried to execute unmapped address %#x.\n", vaddr); 1255124Sgblack@eecs.umich.edu } else { 1265124Sgblack@eecs.umich.edu TlbEntry entry; 1275124Sgblack@eecs.umich.edu entry.pageStart = p->pTable->pageAlign(paddr); 1285124Sgblack@eecs.umich.edu entry.writeable = false; 1295124Sgblack@eecs.umich.edu entry.user = true; 1305124Sgblack@eecs.umich.edu entry.uncacheable = false; 1315124Sgblack@eecs.umich.edu entry.global = false; 1325124Sgblack@eecs.umich.edu entry.patBit = 0; 1335124Sgblack@eecs.umich.edu entry.noExec = false; 1345124Sgblack@eecs.umich.edu entry.size = PageBytes; 1355124Sgblack@eecs.umich.edu Addr alignedVaddr = p->pTable->pageAlign(vaddr); 1365124Sgblack@eecs.umich.edu DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, entry.pageStart); 1375124Sgblack@eecs.umich.edu tc->getITBPtr()->insert(alignedVaddr, entry); 1385124Sgblack@eecs.umich.edu } 1395124Sgblack@eecs.umich.edu } 1405124Sgblack@eecs.umich.edu 1415124Sgblack@eecs.umich.edu void FakeDTLBFault::invoke(ThreadContext * tc) 1425124Sgblack@eecs.umich.edu { 1435124Sgblack@eecs.umich.edu DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n", 1445124Sgblack@eecs.umich.edu vaddr, tc->readPC()); 1455124Sgblack@eecs.umich.edu Process *p = tc->getProcessPtr(); 1465124Sgblack@eecs.umich.edu Addr paddr; 1475124Sgblack@eecs.umich.edu bool success = p->pTable->translate(vaddr, paddr); 1485124Sgblack@eecs.umich.edu if(!success) { 1495124Sgblack@eecs.umich.edu p->checkAndAllocNextPage(vaddr); 1505124Sgblack@eecs.umich.edu success = p->pTable->translate(vaddr, paddr); 1515124Sgblack@eecs.umich.edu } 1525124Sgblack@eecs.umich.edu if(!success) { 1535124Sgblack@eecs.umich.edu panic("Tried to access unmapped address %#x.\n", vaddr); 1545124Sgblack@eecs.umich.edu } else { 1555124Sgblack@eecs.umich.edu TlbEntry entry; 1565124Sgblack@eecs.umich.edu entry.pageStart = p->pTable->pageAlign(paddr); 1575124Sgblack@eecs.umich.edu entry.writeable = true; 1585124Sgblack@eecs.umich.edu entry.user = true; 1595124Sgblack@eecs.umich.edu entry.uncacheable = false; 1605124Sgblack@eecs.umich.edu entry.global = false; 1615124Sgblack@eecs.umich.edu entry.patBit = 0; 1625124Sgblack@eecs.umich.edu entry.noExec = true; 1635124Sgblack@eecs.umich.edu entry.size = PageBytes; 1645124Sgblack@eecs.umich.edu Addr alignedVaddr = p->pTable->pageAlign(vaddr); 1655124Sgblack@eecs.umich.edu DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, entry.pageStart); 1665124Sgblack@eecs.umich.edu tc->getDTBPtr()->insert(alignedVaddr, entry); 1675124Sgblack@eecs.umich.edu } 1685124Sgblack@eecs.umich.edu } 1695124Sgblack@eecs.umich.edu#endif 1705124Sgblack@eecs.umich.edu} // namespace X86ISA 1715124Sgblack@eecs.umich.edu 172