emulenv.cc revision 4863
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IN NO EVENT SHALL THE COPYRIGHT 474604Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 484604Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 494604Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 504604Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 514604Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 524604Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 534604Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 544604Sgblack@eecs.umich.edu * 554604Sgblack@eecs.umich.edu * Authors: Gabe Black 564604Sgblack@eecs.umich.edu */ 574604Sgblack@eecs.umich.edu 584604Sgblack@eecs.umich.edu#include "arch/x86/emulenv.hh" 594604Sgblack@eecs.umich.edu#include "base/misc.hh" 604604Sgblack@eecs.umich.edu 614604Sgblack@eecs.umich.eduusing namespace X86ISA; 624604Sgblack@eecs.umich.edu 634604Sgblack@eecs.umich.eduvoid EmulEnv::doModRM(const ExtMachInst & machInst) 644604Sgblack@eecs.umich.edu{ 654604Sgblack@eecs.umich.edu assert(machInst.modRM.mod != 3); 664604Sgblack@eecs.umich.edu //Use the SIB byte for addressing if the modrm byte calls for it. 674604Sgblack@eecs.umich.edu if (machInst.modRM.rm == 4 && machInst.addrSize != 2) { 684604Sgblack@eecs.umich.edu scale = 1 << machInst.sib.scale; 694712Sgblack@eecs.umich.edu index = machInst.sib.index | (machInst.rex.x << 3); 704712Sgblack@eecs.umich.edu base = machInst.sib.base | (machInst.rex.b << 3); 714604Sgblack@eecs.umich.edu //In this special case, we don't use a base. The displacement also 724604Sgblack@eecs.umich.edu //changes, but that's managed by the predecoder. 734604Sgblack@eecs.umich.edu if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0) 744604Sgblack@eecs.umich.edu base = NUM_INTREGS; 754604Sgblack@eecs.umich.edu //In -this- special case, we don't use an index. 764848Sgblack@eecs.umich.edu if (index == INTREG_RSP) 774604Sgblack@eecs.umich.edu index = NUM_INTREGS; 784604Sgblack@eecs.umich.edu } else { 794604Sgblack@eecs.umich.edu if (machInst.addrSize == 2) { 804604Sgblack@eecs.umich.edu warn("I'm not really using 16 bit MODRM like I'm supposed to!\n"); 814604Sgblack@eecs.umich.edu } else { 824604Sgblack@eecs.umich.edu scale = 0; 834712Sgblack@eecs.umich.edu base = machInst.modRM.rm | (machInst.rex.b << 3); 844604Sgblack@eecs.umich.edu if (machInst.modRM.mod == 0 && machInst.modRM.rm == 5) { 854712Sgblack@eecs.umich.edu //Since we need to use a different encoding of this 864712Sgblack@eecs.umich.edu //instruction anyway, just ignore the base in those cases 874848Sgblack@eecs.umich.edu base = NUM_INTREGS; 884604Sgblack@eecs.umich.edu } 894604Sgblack@eecs.umich.edu } 904604Sgblack@eecs.umich.edu } 914863Sgblack@eecs.umich.edu //Figure out what segment to use. This won't be entirely accurate since 924863Sgblack@eecs.umich.edu //the presence of a displacement is supposed to make the instruction 934863Sgblack@eecs.umich.edu //default to the data segment. 944863Sgblack@eecs.umich.edu if (base != INTREG_RBP && base != INTREG_RSP || 954863Sgblack@eecs.umich.edu 0/*Has an immediate offset*/) { 964863Sgblack@eecs.umich.edu seg = SEGMENT_REG_DS; 974863Sgblack@eecs.umich.edu //Handle any segment override that might have been in the instruction 984863Sgblack@eecs.umich.edu int segFromInst = machInst.legacy.seg; 994863Sgblack@eecs.umich.edu if (segFromInst) 1004863Sgblack@eecs.umich.edu seg = (SegmentRegIndex)(segFromInst - 1); 1014863Sgblack@eecs.umich.edu } else { 1024863Sgblack@eecs.umich.edu seg = SEGMENT_REG_SS; 1034863Sgblack@eecs.umich.edu } 1044604Sgblack@eecs.umich.edu} 1054604Sgblack@eecs.umich.edu 106